diff options
Diffstat (limited to 'arch')
110 files changed, 2415 insertions, 597 deletions
diff --git a/arch/arm/boot/dts/am335x-nano.dts b/arch/arm/boot/dts/am335x-nano.dts index b6f2567bd65a..c447aebd8d86 100644 --- a/arch/arm/boot/dts/am335x-nano.dts +++ b/arch/arm/boot/dts/am335x-nano.dts @@ -120,8 +120,8 @@ uart3_pins: uart3_pins { pinctrl-single,pins = < - AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_INPUT_PULLUP, MUX_MODE6) /* lcd_data10.uart3_ctsn */ - AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE6) /* lcd_data11.uart3_rtsn */ + AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_INPUT_PULLUP, MUX_MODE7) /* lcd_data10.gpio2[16] */ + AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE7) /* lcd_data11.gpio2[17] */ AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE1) /* spi0_cs1.uart3_rxd */ AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT, MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */ >; @@ -129,8 +129,8 @@ uart4_pins: uart4_pins { pinctrl-single,pins = < - AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT_PULLUP, MUX_MODE6) /* lcd_data12.uart4_ctsn */ - AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE6) /* lcd_data13.uart4_rtsn */ + AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT_PULLUP, MUX_MODE7) /* lcd_data12.gpio0[8] */ + AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE7) /* lcd_data13.gpio0[9] */ AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE1) /* uart0_ctsn.uart4_rxd */ AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT, MUX_MODE1) /* uart0_rtsn.uart4_txd */ >; @@ -187,12 +187,22 @@ &uart3 { pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; + rts-gpio = <&gpio2 17 GPIO_ACTIVE_HIGH>; + rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <1 1>; + linux,rs485-enabled-at-boot-time; status = "okay"; }; &uart4 { pinctrl-names = "default"; pinctrl-0 = <&uart4_pins>; + rts-gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>; + rs485-rts-active-high; + rs485-rx-during-tx; + rs485-rts-delay = <1 1>; + linux,rs485-enabled-at-boot-time; status = "okay"; }; @@ -220,6 +230,11 @@ reg = <0x24>; }; + temperature-sensor@48 { + compatible = "lm75"; + reg = <0x48>; + }; + eeprom@53 { compatible = "microchip,24c02", "atmel,24c02"; reg = <0x53>; @@ -403,8 +418,13 @@ pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; bus-width = <4>; - cd-gpios = <&gpio3 8 0>; - wp-gpios = <&gpio3 18 0>; + cd-debounce-delay-ms = <5>; + cd-gpios = <&gpio3 8 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; +}; + +&usb0 { + dr_mode = "host"; }; #include "tps65217.dtsi" diff --git a/arch/arm/boot/dts/am3874-iceboard.dts b/arch/arm/boot/dts/am3874-iceboard.dts index d039af879367..791478e81c5a 100644 --- a/arch/arm/boot/dts/am3874-iceboard.dts +++ b/arch/arm/boot/dts/am3874-iceboard.dts @@ -106,7 +106,7 @@ * "i2c-mux-idle-disconnect" is important. */ - pca9548@70 { + i2c-mux@70 { compatible = "nxp,pca9548"; reg = <0x70>; #address-cells = <1>; @@ -256,7 +256,7 @@ }; &i2c2 { - pca9548@71 { + i2c-mux@71 { compatible = "nxp,pca9548"; reg = <0x71>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/at91-gatwick.dts b/arch/arm/boot/dts/at91-gatwick.dts index 2c718cf84d7b..551300fd7746 100644 --- a/arch/arm/boot/dts/at91-gatwick.dts +++ b/arch/arm/boot/dts/at91-gatwick.dts @@ -31,37 +31,37 @@ leds { compatible = "gpio-leds"; - ethernet { + led-ethernet { label = "gatwick:yellow:ethernet"; gpios = <&pioA 10 GPIO_ACTIVE_LOW>; default-state = "off"; }; - wifi { + led-wifi { label = "gatwick:green:wifi"; gpios = <&pioA 28 GPIO_ACTIVE_LOW>; default-state = "off"; }; - ble { + led-ble { label = "gatwick:blue:ble"; gpios = <&pioA 22 GPIO_ACTIVE_LOW>; default-state = "off"; }; - lora { + led-lora { label = "gatwick:orange:lora"; gpios = <&pioA 26 GPIO_ACTIVE_LOW>; default-state = "off"; }; - blank { + led-blank { label = "gatwick:green:blank"; gpios = <&pioA 24 GPIO_ACTIVE_LOW>; default-state = "off"; }; - user { + led-user { label = "gatwick:yellow:user"; gpios = <&pioA 12 GPIO_ACTIVE_LOW>; default-state = "off"; diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 0dc6ca377b0c..52ddd0571f1c 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -498,17 +498,17 @@ pinctrl-0 = <&pinctrl_led_gpio_default>; status = "okay"; /* Conflict with pwm0. */ - red { + led-red { label = "red"; gpios = <&pioA PIN_PA10 GPIO_ACTIVE_HIGH>; }; - green { + led-green { label = "green"; gpios = <&pioA PIN_PB1 GPIO_ACTIVE_HIGH>; }; - blue { + led-blue { label = "blue"; gpios = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts index b665ddc6b0de..e055b9e2fe34 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts @@ -46,17 +46,17 @@ pinctrl-0 = <&pinctrl_led_gpio_default>; status = "okay"; - red { + led-red { label = "red"; gpios = <&pioA PIN_PA6 GPIO_ACTIVE_HIGH>; }; - green { + led-green { label = "green"; gpios = <&pioA PIN_PA7 GPIO_ACTIVE_HIGH>; }; - blue { + led-blue { label = "blue"; gpios = <&pioA PIN_PA8 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/at91-sama5d2_icp.dts b/arch/arm/boot/dts/at91-sama5d2_icp.dts index dd1dec9d4e07..1346b8f2b259 100644 --- a/arch/arm/boot/dts/at91-sama5d2_icp.dts +++ b/arch/arm/boot/dts/at91-sama5d2_icp.dts @@ -62,17 +62,17 @@ pinctrl-0 = <&pinctrl_led_gpio_default>; status = "okay"; /* conflict with pwm0 */ - red { + led-red { label = "red"; gpios = <&pioA PIN_PB0 GPIO_ACTIVE_HIGH>; }; - green { + led-green { label = "green"; gpios = <&pioA PIN_PB1 GPIO_ACTIVE_HIGH>; }; - blue { + led-blue { label = "blue"; gpios = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts index 76a711b167b0..bf1c9ca72a9f 100644 --- a/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts @@ -416,17 +416,17 @@ pinctrl-0 = <&pinctrl_led_gpio_default>; status = "okay"; - red { + led-red { label = "red"; gpios = <&pioA PIN_PB10 GPIO_ACTIVE_HIGH>; }; - green { + led-green { label = "green"; gpios = <&pioA PIN_PB8 GPIO_ACTIVE_HIGH>; }; - blue { + led-blue { label = "blue"; gpios = <&pioA PIN_PB6 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 85949c24b687..2d53c47d7cc8 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -725,18 +725,18 @@ pinctrl-0 = <&pinctrl_led_gpio_default>; status = "okay"; /* conflict with pwm0 */ - red { + led-red { label = "red"; gpios = <&pioA PIN_PB6 GPIO_ACTIVE_LOW>; }; - green { + led-green { label = "green"; gpios = <&pioA PIN_PB5 GPIO_ACTIVE_LOW>; }; - blue { + led-blue { label = "blue"; gpios = <&pioA PIN_PB0 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts index 1f42a6a981bf..820033727088 100644 --- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts @@ -392,13 +392,13 @@ pinctrl-0 = <&pinctrl_gpio_leds>; status = "okay"; - d2 { + led-d2 { label = "d2"; gpios = <&pioE 23 GPIO_ACTIVE_LOW>; /* PE23, conflicts with A23, CTS2 */ linux,default-trigger = "heartbeat"; }; - d3 { + led-d3 { label = "d3"; /* Conflict with EBI CS0, USART2 CTS. */ gpios = <&pioE 24 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts b/arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts index 4d7cee569ff2..8adf567f2f0f 100644 --- a/arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts +++ b/arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts @@ -115,19 +115,19 @@ compatible = "gpio-leds"; status = "okay"; - user1 { + led-user1 { label = "user1"; gpios = <&pioD 28 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; - user2 { + led-user2 { label = "user2"; gpios = <&pioD 29 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; - user3 { + led-user3 { label = "user3"; gpios = <&pioD 30 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts b/arch/arm/boot/dts/at91-sama5d4_xplained.dts index f122f302f8e0..95d701d13fef 100644 --- a/arch/arm/boot/dts/at91-sama5d4_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d4_xplained.dts @@ -262,13 +262,13 @@ pinctrl-0 = <&pinctrl_gpio_leds>; status = "okay"; - d8 { + led-d8 { label = "d8"; gpios = <&pioD 30 GPIO_ACTIVE_HIGH>; default-state = "on"; }; - d10 { + led-d10 { label = "d10"; gpios = <&pioE 15 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/at91-sama5d4ek.dts b/arch/arm/boot/dts/at91-sama5d4ek.dts index fce4e93c6bee..20ac775059ca 100644 --- a/arch/arm/boot/dts/at91-sama5d4ek.dts +++ b/arch/arm/boot/dts/at91-sama5d4ek.dts @@ -287,18 +287,18 @@ compatible = "gpio-leds"; status = "okay"; - d8 { + led-d8 { label = "d8"; /* PE28, conflicts with usart4 rts pin */ gpios = <&pioE 28 GPIO_ACTIVE_LOW>; }; - d9 { + led-d9 { label = "d9"; gpios = <&pioE 9 GPIO_ACTIVE_HIGH>; }; - d10 { + led-d10 { label = "d10"; gpios = <&pioE 8 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/at91-tse850-3.dts b/arch/arm/boot/dts/at91-tse850-3.dts index 7e5c598e7e68..b99a4fb44a36 100644 --- a/arch/arm/boot/dts/at91-tse850-3.dts +++ b/arch/arm/boot/dts/at91-tse850-3.dts @@ -106,35 +106,35 @@ leds { compatible = "gpio-leds"; - ch1-red { + led-ch1-red { label = "ch-1:red"; gpios = <&pioA 23 GPIO_ACTIVE_LOW>; }; - ch1-green { + led-ch1-green { label = "ch-1:green"; gpios = <&pioA 22 GPIO_ACTIVE_LOW>; }; - ch2-red { + led-ch2-red { label = "ch-2:red"; gpios = <&pioA 21 GPIO_ACTIVE_LOW>; }; - ch2-green { + led-ch2-green { label = "ch-2:green"; gpios = <&pioA 20 GPIO_ACTIVE_LOW>; }; - data-red { + led-data-red { label = "data:red"; gpios = <&pioA 19 GPIO_ACTIVE_LOW>; }; - data-green { + led-data-green { label = "data:green"; gpios = <&pioA 18 GPIO_ACTIVE_LOW>; }; - alarm-red { + led-alarm-red { label = "alarm:red"; gpios = <&pioA 17 GPIO_ACTIVE_LOW>; }; - alarm-green { + led-alarm-green { label = "alarm:green"; gpios = <&pioA 16 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/dove-cm-a510.dtsi b/arch/arm/boot/dts/dove-cm-a510.dtsi index 9b9dfbe07be4..0af9e9fda7d3 100644 --- a/arch/arm/boot/dts/dove-cm-a510.dtsi +++ b/arch/arm/boot/dts/dove-cm-a510.dtsi @@ -101,7 +101,7 @@ pinctrl-0 = <&pmx_nand_gpo>; pinctrl-names = "default"; - system { + led-system { label = "cm-a510:system:green"; gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; default-state = "keep"; diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts index 2639b9fe0ab4..c0e8d6bc4083 100644 --- a/arch/arm/boot/dts/dove-cubox.dts +++ b/arch/arm/boot/dts/dove-cubox.dts @@ -21,7 +21,7 @@ pinctrl-0 = <&pmx_gpio_18>; pinctrl-names = "default"; - power { + led-power { label = "Power"; gpios = <&gpio0 18 1>; default-state = "keep"; diff --git a/arch/arm/boot/dts/dove-d2plug.dts b/arch/arm/boot/dts/dove-d2plug.dts index a0e8996c2ffd..79ee2b32409d 100644 --- a/arch/arm/boot/dts/dove-d2plug.dts +++ b/arch/arm/boot/dts/dove-d2plug.dts @@ -21,17 +21,17 @@ pinctrl-0 = <&pmx_gpio_0 &pmx_gpio_1 &pmx_gpio_2>; pinctrl-names = "default"; - wlan-ap { + led-wlan-ap { label = "wlan-ap"; gpios = <&gpio0 0 1>; }; - wlan-act { + led-wlan-act { label = "wlan-act"; gpios = <&gpio0 1 1>; }; - bluetooth-act { + led-bluetooth-act { label = "bt-act"; gpios = <&gpio0 2 1>; }; diff --git a/arch/arm/boot/dts/dove-d3plug.dts b/arch/arm/boot/dts/dove-d3plug.dts index 1e81d1b97055..5aa5d4a7d51d 100644 --- a/arch/arm/boot/dts/dove-d3plug.dts +++ b/arch/arm/boot/dts/dove-d3plug.dts @@ -21,17 +21,17 @@ pinctrl-0 = <&pmx_gpio_0 &pmx_gpio_1 &pmx_gpio_2>; pinctrl-names = "default"; - wlan-act { + led-wlan-act { label = "wlan-act"; gpios = <&gpio0 0 1>; }; - wlan-ap { + led-wlan-ap { label = "wlan-ap"; gpios = <&gpio0 1 1>; }; - status { + led-status { label = "status"; gpios = <&gpio0 2 1>; }; diff --git a/arch/arm/boot/dts/gemini-dlink-dns-313.dts b/arch/arm/boot/dts/gemini-dlink-dns-313.dts index eba1c94ed7f7..138c47e1ac1b 100644 --- a/arch/arm/boot/dts/gemini-dlink-dns-313.dts +++ b/arch/arm/boot/dts/gemini-dlink-dns-313.dts @@ -80,6 +80,15 @@ #cooling-cells = <2>; }; + /* + * This is the type B USB connector on the device, + * a GPIO-controlled USB VBUS detect + */ + usb1_phy: phy { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + #phy-cells = <0>; + vbus-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; + }; /* Global Mixed-Mode Technology G751 mounted on GPIO I2C */ i2c { @@ -164,6 +173,8 @@ compatible = "cortina,gemini-flash", "jedec-flash"; status = "okay"; reg = <0x30000000 0x00080000>; + #address-cells = <1>; + #size-cells = <1>; /* * This "RedBoot" is the Storlink derivative. @@ -300,5 +311,13 @@ ide@63000000 { status = "okay"; }; + + usb@69000000 { + status = "okay"; + dr_mode = "peripheral"; + usb-phy = <&usb1_phy>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_default_pins>; + }; }; }; diff --git a/arch/arm/boot/dts/gemini-wbd111.dts b/arch/arm/boot/dts/gemini-wbd111.dts index de3c4416b0fb..3c88c59ab481 100644 --- a/arch/arm/boot/dts/gemini-wbd111.dts +++ b/arch/arm/boot/dts/gemini-wbd111.dts @@ -87,33 +87,10 @@ /* 8MB of flash */ reg = <0x30000000 0x00800000>; - partition@0 { - label = "RedBoot"; - reg = <0x00000000 0x00020000>; - read-only; - }; - partition@20000 { - label = "kernel"; - reg = <0x00020000 0x00100000>; - }; - partition@120000 { - label = "rootfs"; - reg = <0x00120000 0x006a0000>; - }; - partition@7c0000 { - label = "VCTL"; - reg = <0x007c0000 0x00010000>; - read-only; - }; - partition@7d0000 { - label = "cfg"; - reg = <0x007d0000 0x00010000>; - read-only; - }; - partition@7e0000 { - label = "FIS"; - reg = <0x007e0000 0x00010000>; - read-only; + partitions { + compatible = "redboot-fis"; + /* Eraseblock at 0x7e0000 */ + fis-index-block = <0x3f>; }; }; diff --git a/arch/arm/boot/dts/gemini-wbd222.dts b/arch/arm/boot/dts/gemini-wbd222.dts index e5ceaadbcc1a..ff72bbc4db3e 100644 --- a/arch/arm/boot/dts/gemini-wbd222.dts +++ b/arch/arm/boot/dts/gemini-wbd222.dts @@ -91,33 +91,10 @@ /* 8MB of flash */ reg = <0x30000000 0x00800000>; - partition@0 { - label = "RedBoot"; - reg = <0x00000000 0x00020000>; - read-only; - }; - partition@20000 { - label = "kernel"; - reg = <0x00020000 0x00100000>; - }; - partition@120000 { - label = "rootfs"; - reg = <0x00120000 0x006a0000>; - }; - partition@7c0000 { - label = "VCTL"; - reg = <0x007c0000 0x00010000>; - read-only; - }; - partition@7d0000 { - label = "cfg"; - reg = <0x007d0000 0x00010000>; - read-only; - }; - partition@7e0000 { - label = "FIS"; - reg = <0x007e0000 0x00010000>; - read-only; + partitions { + compatible = "redboot-fis"; + /* Eraseblock at 0x7e0000 */ + fis-index-block = <0x3f>; }; }; diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi index e836bd0818d4..befe322bd7de 100644 --- a/arch/arm/boot/dts/gemini.dtsi +++ b/arch/arm/boot/dts/gemini.dtsi @@ -22,8 +22,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pflash_default_pins>; bank-width = <2>; - #address-cells = <1>; - #size-cells = <1>; status = "disabled"; }; @@ -441,7 +439,7 @@ }; usb0: usb@68000000 { - compatible = "cortina,gemini-usb", "faraday,fotg210"; + compatible = "cortina,gemini-usb", "faraday,fotg200"; reg = <0x68000000 0x1000>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; resets = <&syscon GEMINI_RESET_USB0>; @@ -457,12 +455,14 @@ */ pinctrl-names = "default"; pinctrl-0 = <&usb_default_pins>; + /* Default to host mode */ + dr_mode = "host"; syscon = <&syscon>; status = "disabled"; }; usb1: usb@69000000 { - compatible = "cortina,gemini-usb", "faraday,fotg210"; + compatible = "cortina,gemini-usb", "faraday,fotg200"; reg = <0x69000000 0x1000>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; resets = <&syscon GEMINI_RESET_USB1>; diff --git a/arch/arm/boot/dts/intel-ixp42x-welltech-epbx100.dts b/arch/arm/boot/dts/intel-ixp42x-welltech-epbx100.dts index f5846a50e4d4..b444003c10e1 100644 --- a/arch/arm/boot/dts/intel-ixp42x-welltech-epbx100.dts +++ b/arch/arm/boot/dts/intel-ixp42x-welltech-epbx100.dts @@ -76,5 +76,23 @@ }; }; }; + + /* LAN port */ + ethernet@c8009000 { + status = "ok"; + queue-rx = <&qmgr 3>; + queue-txready = <&qmgr 20>; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy5: ethernet-phy@5 { + reg = <5>; + }; + }; + }; }; }; diff --git a/arch/arm/boot/dts/keystone-k2hk-evm.dts b/arch/arm/boot/dts/keystone-k2hk-evm.dts index 4a91f5ded402..4352397b4f52 100644 --- a/arch/arm/boot/dts/keystone-k2hk-evm.dts +++ b/arch/arm/boot/dts/keystone-k2hk-evm.dts @@ -28,22 +28,22 @@ leds { compatible = "gpio-leds"; - debug1_1 { + led-debug-1-1 { label = "keystone:green:debug1"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */ }; - debug1_2 { + led-debug-1-2 { label = "keystone:red:debug1"; gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */ }; - debug2 { + led-debug-2 { label = "keystone:blue:debug2"; gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */ }; - debug3 { + led-debug-3 { label = "keystone:blue:debug3"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */ }; diff --git a/arch/arm/boot/dts/omap3-gta04a5.dts b/arch/arm/boot/dts/omap3-gta04a5.dts index 0b5bd7388877..425081201fd4 100644 --- a/arch/arm/boot/dts/omap3-gta04a5.dts +++ b/arch/arm/boot/dts/omap3-gta04a5.dts @@ -75,6 +75,11 @@ >; }; + bno050_pins: pinmux-bno050-pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2136, PIN_INPUT | MUX_MODE4) /* gpin113 */ + >; + }; }; /* @@ -115,17 +120,17 @@ /delete-node/ itg3200@68; /delete-node/ hmc5843@1e; - bmg160@69 { + gyrometer@69 { compatible = "bosch,bmg160"; reg = <0x69>; }; - bmc150@10 { + accelerometer@10 { compatible = "bosch,bmc150_accel"; reg = <0x10>; }; - bmc150@12 { + magnetometer@12 { compatible = "bosch,bmc150_magn"; reg = <0x12>; }; @@ -136,4 +141,12 @@ vdda-supply = <&vio>; vddd-supply = <&vio>; }; + + imu@29 { + compatible = "bosch,bno055"; + reg = <0x29>; + pinctrl-names = "default"; + pinctrl-0 = <&bno050_pins>; + /* interrupt at &gpio4 17 */ + }; }; diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts index 6ba2e8f81973..f9f9eca0c56c 100644 --- a/arch/arm/boot/dts/omap3-n900.dts +++ b/arch/arm/boot/dts/omap3-n900.dts @@ -9,6 +9,7 @@ #include "omap34xx.dtsi" #include <dt-bindings/input/input.h> #include <dt-bindings/leds/common.h> +#include <dt-bindings/media/video-interfaces.h> /* * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall @@ -194,7 +195,7 @@ csi_isp: endpoint { remote-endpoint = <&csi_cam1>; - bus-type = <3>; /* CCP2 */ + bus-type = <MEDIA_BUS_TYPE_CCP2>; clock-lanes = <1>; data-lanes = <0>; lane-polarity = <0 0>; @@ -767,56 +768,20 @@ clock-frequency = <400000>; - lis302dl: lis3lv02d@1d { - compatible = "st,lis3lv02d"; + accelerometer@1d { + compatible = "st,lis302dl"; reg = <0x1d>; - Vdd-supply = <&vaux1>; - Vdd_IO-supply = <&vio>; + vdd-supply = <&vaux1>; + vddio-supply = <&vio>; interrupt-parent = <&gpio6>; - interrupts = <21 20>; /* 181 and 180 */ - - /* click flags */ - st,click-single-x; - st,click-single-y; - st,click-single-z; - - /* Limits are 0.5g * value */ - st,click-threshold-x = <8>; - st,click-threshold-y = <8>; - st,click-threshold-z = <10>; - - /* Click must be longer than time limit */ - st,click-time-limit = <9>; - - /* Kind of debounce filter */ - st,click-latency = <50>; - - /* Interrupt line 2 for click detection */ - st,irq2-click; - - st,wakeup-x-hi; - st,wakeup-y-hi; - st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */ - - st,wakeup2-z-hi; - st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */ - - st,hipass1-disable; - st,hipass2-disable; - - st,axis-x = <1>; /* LIS3_DEV_X */ - st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */ - st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */ - - st,min-limit-x = <(-32)>; - st,min-limit-y = <3>; - st,min-limit-z = <3>; + interrupts = <21 IRQ_TYPE_EDGE_RISING>, + <20 IRQ_TYPE_EDGE_RISING>; /* 181 and 180 */ - st,max-limit-x = <(-3)>; - st,max-limit-y = <32>; - st,max-limit-z = <32>; + mount-matrix = "-1", "0", "0", + "0", "1", "0", + "0", "0", "1"; }; cam1: camera@3e { @@ -835,7 +800,7 @@ port { csi_cam1: endpoint { - bus-type = <3>; /* CCP2 */ + bus-type = <MEDIA_BUS_TYPE_CCP2>; strobe = <1>; clock-inv = <0>; crc = <1>; diff --git a/arch/arm/boot/dts/qcom-apq8026-samsung-matisse-wifi.dts b/arch/arm/boot/dts/qcom-apq8026-samsung-matisse-wifi.dts index 1c52337af560..91b860e24681 100644 --- a/arch/arm/boot/dts/qcom-apq8026-samsung-matisse-wifi.dts +++ b/arch/arm/boot/dts/qcom-apq8026-samsung-matisse-wifi.dts @@ -9,6 +9,9 @@ #include "qcom-msm8226.dtsi" #include "qcom-pm8226.dtsi" +/delete-node/ &adsp_region; +/delete-node/ &smem_region; + / { model = "Samsung Galaxy Tab 4 10.1"; compatible = "samsung,matisse-wifi", "qcom,apq8026"; @@ -77,6 +80,55 @@ }; }; + i2c-backlight { + compatible = "i2c-gpio"; + sda-gpios = <&tlmm 20 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + scl-gpios = <&tlmm 21 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + + pinctrl-0 = <&backlight_i2c_default_state>; + pinctrl-names = "default"; + + i2c-gpio,delay-us = <4>; + + #address-cells = <1>; + #size-cells = <0>; + + backlight@2c { + compatible = "ti,lp8556"; + reg = <0x2c>; + + dev-ctrl = /bits/ 8 <0x80>; + init-brt = /bits/ 8 <0x3f>; + pwm-period = <100000>; + + pwms = <&backlight_pwm 0 100000>; + pwm-names = "lp8556"; + + rom-a0h { + rom-addr = /bits/ 8 <0xa0>; + rom-val = /bits/ 8 <0x44>; + }; + + rom-a1h { + rom-addr = /bits/ 8 <0xa1>; + rom-val = /bits/ 8 <0x6c>; + }; + + rom-a5h { + rom-addr = /bits/ 8 <0xa5>; + rom-val = /bits/ 8 <0x24>; + }; + }; + }; + + backlight_pwm: pwm { + compatible = "clk-pwm"; + #pwm-cells = <2>; + clocks = <&mmcc CAMSS_GP0_CLK>; + pinctrl-0 = <&backlight_pwm_default_state>; + pinctrl-names = "default"; + }; + reg_tsp_1p8v: regulator-tsp-1p8v { compatible = "regulator-fixed"; regulator-name = "tsp_1p8v"; @@ -133,7 +185,7 @@ no-map; }; - adsp@d900000 { + adsp_region: adsp@d900000 { reg = <0x0d900000 0x1800000>; no-map; }; @@ -143,7 +195,6 @@ no-map; }; - /delete-node/ smem@3000000; smem_region: smem@fa00000 { reg = <0x0fa00000 0x100000>; no-map; @@ -169,6 +220,10 @@ }; }; +&adsp { + status = "okay"; +}; + &blsp1_i2c2 { status = "okay"; @@ -412,6 +467,18 @@ bias-disable; }; + backlight_i2c_default_state: backlight-i2c-default-state { + pins = "gpio20", "gpio21"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + backlight_pwm_default_state: backlight-pwm-default-state { + pins = "gpio33"; + function = "gp0_clk"; + }; + muic_int_default_state: muic-int-default-state { pins = "gpio67"; function = "gpio"; diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index bf2fb0f70fe4..c57c27cd8a20 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -22,7 +22,7 @@ #size-cells = <1>; ranges; - ramoops@88d00000{ + ramoops@88d00000 { compatible = "ramoops"; reg = <0x88d00000 0x100000>; record-size = <0x00020000>; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 0da9623ea084..95705703fe8f 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -375,14 +375,13 @@ }; timer@200a000 { - compatible = "qcom,kpss-timer", - "qcom,kpss-wdt-apq8064", "qcom,msm-timer"; + compatible = "qcom,kpss-wdt-apq8064", "qcom,kpss-timer", + "qcom,msm-timer"; interrupts = <1 1 0x301>, <1 2 0x301>, <1 3 0x301>; reg = <0x0200a000 0x100>; - clock-frequency = <27000000>, - <32768>; + clock-frequency = <27000000>; cpu-offset = <0x80000>; }; @@ -1102,7 +1101,7 @@ dma-names = "tx", "rx"; }; - sdcc3bam: dma-controller@12182000{ + sdcc3bam: dma-controller@12182000 { compatible = "qcom,bam-v1.3.0"; reg = <0x12182000 0x8000>; interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>; @@ -1130,7 +1129,7 @@ pinctrl-0 = <&sdc4_gpios>; }; - sdcc4bam: dma-controller@121c2000{ + sdcc4bam: dma-controller@121c2000 { compatible = "qcom,bam-v1.3.0"; reg = <0x121c2000 0x8000>; interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>; @@ -1159,7 +1158,7 @@ dma-names = "tx", "rx"; }; - sdcc1bam: dma-controller@12402000{ + sdcc1bam: dma-controller@12402000 { compatible = "qcom,bam-v1.3.0"; reg = <0x12402000 0x8000>; interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; @@ -1277,7 +1276,8 @@ }; dsi0: dsi@4700000 { - compatible = "qcom,mdss-dsi-ctrl"; + compatible = "qcom,apq8064-dsi-ctrl", + "qcom,mdss-dsi-ctrl"; label = "MDSS DSI CTRL->0"; #address-cells = <1>; #size-cells = <0>; @@ -1493,7 +1493,7 @@ status = "disabled"; }; - mdp: mdp@5100000 { + mdp: display-controller@5100000 { compatible = "qcom,mdp4"; reg = <0x05100000 0xf0000>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts index 44cd72f1b1be..116e59a3b76d 100644 --- a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts +++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts @@ -19,16 +19,16 @@ serial@f995e000 { status = "okay"; }; + }; +}; - sdhci@f9824900 { - bus-width = <8>; - non-removable; - status = "okay"; - }; +&sdhc_1 { + bus-width = <8>; + non-removable; + status = "okay"; +}; - sdhci@f98a4900 { - cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>; - bus-width = <4>; - }; - }; +&sdhc_2 { + cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>; + bus-width = <4>; }; diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index fe30abfff90a..fabd7455eb8f 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -249,11 +249,260 @@ reg = <0xfc4bc000 0x1000>; #address-cells = <1>; #size-cells = <1>; - tsens_calib: calib@d0 { - reg = <0xd0 0x18>; + + tsens_base1: base1@d0 { + reg = <0xd0 0x1>; + bits = <0 8>; + }; + + tsens_s0_p1: s0-p1@d1 { + reg = <0xd1 0x1>; + bits = <0 6>; + }; + + tsens_s1_p1: s1-p1@d2 { + reg = <0xd1 0x2>; + bits = <6 6>; + }; + + tsens_s2_p1: s2-p1@d2 { + reg = <0xd2 0x2>; + bits = <4 6>; + }; + + tsens_s3_p1: s3-p1@d3 { + reg = <0xd3 0x1>; + bits = <2 6>; + }; + + tsens_s4_p1: s4-p1@d4 { + reg = <0xd4 0x1>; + bits = <0 6>; + }; + + tsens_s5_p1: s5-p1@d4 { + reg = <0xd4 0x2>; + bits = <6 6>; + }; + + tsens_s6_p1: s6-p1@d5 { + reg = <0xd5 0x2>; + bits = <4 6>; + }; + + tsens_s7_p1: s7-p1@d6 { + reg = <0xd6 0x1>; + bits = <2 6>; + }; + + tsens_s8_p1: s8-p1@d7 { + reg = <0xd7 0x1>; + bits = <0 6>; + }; + + tsens_mode: mode@d7 { + reg = <0xd7 0x1>; + bits = <6 2>; + }; + + tsens_s9_p1: s9-p1@d8 { + reg = <0xd8 0x1>; + bits = <0 6>; + }; + + tsens_s10_p1: s10_p1@d8 { + reg = <0xd8 0x2>; + bits = <6 6>; + }; + + tsens_base2: base2@d9 { + reg = <0xd9 0x2>; + bits = <4 8>; + }; + + tsens_s0_p2: s0-p2@da { + reg = <0xda 0x2>; + bits = <4 6>; + }; + + tsens_s1_p2: s1-p2@db { + reg = <0xdb 0x1>; + bits = <2 6>; + }; + + tsens_s2_p2: s2-p2@dc { + reg = <0xdc 0x1>; + bits = <0 6>; + }; + + tsens_s3_p2: s3-p2@dc { + reg = <0xdc 0x2>; + bits = <6 6>; + }; + + tsens_s4_p2: s4-p2@dd { + reg = <0xdd 0x2>; + bits = <4 6>; + }; + + tsens_s5_p2: s5-p2@de { + reg = <0xde 0x2>; + bits = <2 6>; + }; + + tsens_s6_p2: s6-p2@df { + reg = <0xdf 0x1>; + bits = <0 6>; + }; + + tsens_s7_p2: s7-p2@e0 { + reg = <0xe0 0x1>; + bits = <0 6>; + }; + + tsens_s8_p2: s8-p2@e0 { + reg = <0xe0 0x2>; + bits = <6 6>; + }; + + tsens_s9_p2: s9-p2@e1 { + reg = <0xe1 0x2>; + bits = <4 6>; + }; + + tsens_s10_p2: s10_p2@e2 { + reg = <0xe2 0x2>; + bits = <2 6>; + }; + + tsens_s5_p2_backup: s5-p2_backup@e3 { + reg = <0xe3 0x2>; + bits = <0 6>; + }; + + tsens_mode_backup: mode_backup@e3 { + reg = <0xe3 0x1>; + bits = <6 2>; + }; + + tsens_s6_p2_backup: s6-p2_backup@e4 { + reg = <0xe4 0x1>; + bits = <0 6>; + }; + + tsens_s7_p2_backup: s7-p2_backup@e4 { + reg = <0xe4 0x2>; + bits = <6 6>; + }; + + tsens_s8_p2_backup: s8-p2_backup@e5 { + reg = <0xe5 0x2>; + bits = <4 6>; + }; + + tsens_s9_p2_backup: s9-p2_backup@e6 { + reg = <0xe6 0x2>; + bits = <2 6>; + }; + + tsens_s10_p2_backup: s10_p2_backup@e7 { + reg = <0xe7 0x1>; + bits = <0 6>; + }; + + tsens_base1_backup: base1_backup@440 { + reg = <0x440 0x1>; + bits = <0 8>; + }; + + tsens_s0_p1_backup: s0-p1_backup@441 { + reg = <0x441 0x1>; + bits = <0 6>; + }; + + tsens_s1_p1_backup: s1-p1_backup@442 { + reg = <0x441 0x2>; + bits = <6 6>; + }; + + tsens_s2_p1_backup: s2-p1_backup@442 { + reg = <0x442 0x2>; + bits = <4 6>; + }; + + tsens_s3_p1_backup: s3-p1_backup@443 { + reg = <0x443 0x1>; + bits = <2 6>; + }; + + tsens_s4_p1_backup: s4-p1_backup@444 { + reg = <0x444 0x1>; + bits = <0 6>; }; - tsens_backup: backup@440 { - reg = <0x440 0x10>; + + tsens_s5_p1_backup: s5-p1_backup@444 { + reg = <0x444 0x2>; + bits = <6 6>; + }; + + tsens_s6_p1_backup: s6-p1_backup@445 { + reg = <0x445 0x2>; + bits = <4 6>; + }; + + tsens_s7_p1_backup: s7-p1_backup@446 { + reg = <0x446 0x1>; + bits = <2 6>; + }; + + tsens_use_backup: use_backup@447 { + reg = <0x447 0x1>; + bits = <5 3>; + }; + + tsens_s8_p1_backup: s8-p1_backup@448 { + reg = <0x448 0x1>; + bits = <0 6>; + }; + + tsens_s9_p1_backup: s9-p1_backup@448 { + reg = <0x448 0x2>; + bits = <6 6>; + }; + + tsens_s10_p1_backup: s10_p1_backup@449 { + reg = <0x449 0x2>; + bits = <4 6>; + }; + + tsens_base2_backup: base2_backup@44a { + reg = <0x44a 0x2>; + bits = <2 8>; + }; + + tsens_s0_p2_backup: s0-p2_backup@44b { + reg = <0x44b 0x3>; + bits = <2 6>; + }; + + tsens_s1_p2_backup: s1-p2_backup@44c { + reg = <0x44c 0x1>; + bits = <0 6>; + }; + + tsens_s2_p2_backup: s2-p2_backup@44c { + reg = <0x44c 0x2>; + bits = <6 6>; + }; + + tsens_s3_p2_backup: s3-p2_backup@44d { + reg = <0x44d 0x2>; + bits = <4 6>; + }; + + tsens_s4_p2_backup: s4-p2_backup@44e { + reg = <0x44e 0x1>; + bits = <2 6>; }; }; @@ -261,8 +510,60 @@ compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1"; reg = <0xfc4a9000 0x1000>, /* TM */ <0xfc4a8000 0x1000>; /* SROT */ - nvmem-cells = <&tsens_calib>, <&tsens_backup>; - nvmem-cell-names = "calib", "calib_backup"; + nvmem-cells = <&tsens_mode>, + <&tsens_base1>, <&tsens_base2>, + <&tsens_use_backup>, + <&tsens_mode_backup>, + <&tsens_base1_backup>, <&tsens_base2_backup>, + <&tsens_s0_p1>, <&tsens_s0_p2>, + <&tsens_s1_p1>, <&tsens_s1_p2>, + <&tsens_s2_p1>, <&tsens_s2_p2>, + <&tsens_s3_p1>, <&tsens_s3_p2>, + <&tsens_s4_p1>, <&tsens_s4_p2>, + <&tsens_s5_p1>, <&tsens_s5_p2>, + <&tsens_s6_p1>, <&tsens_s6_p2>, + <&tsens_s7_p1>, <&tsens_s7_p2>, + <&tsens_s8_p1>, <&tsens_s8_p2>, + <&tsens_s9_p1>, <&tsens_s9_p2>, + <&tsens_s10_p1>, <&tsens_s10_p2>, + <&tsens_s0_p1_backup>, <&tsens_s0_p2_backup>, + <&tsens_s1_p1_backup>, <&tsens_s1_p2_backup>, + <&tsens_s2_p1_backup>, <&tsens_s2_p2_backup>, + <&tsens_s3_p1_backup>, <&tsens_s3_p2_backup>, + <&tsens_s4_p1_backup>, <&tsens_s4_p2_backup>, + <&tsens_s5_p1_backup>, <&tsens_s5_p2_backup>, + <&tsens_s6_p1_backup>, <&tsens_s6_p2_backup>, + <&tsens_s7_p1_backup>, <&tsens_s7_p2_backup>, + <&tsens_s8_p1_backup>, <&tsens_s8_p2_backup>, + <&tsens_s9_p1_backup>, <&tsens_s9_p2_backup>, + <&tsens_s10_p1_backup>, <&tsens_s10_p2_backup>; + nvmem-cell-names = "mode", + "base1", "base2", + "use_backup", + "mode_backup", + "base1_backup", "base2_backup", + "s0_p1", "s0_p2", + "s1_p1", "s1_p2", + "s2_p1", "s2_p2", + "s3_p1", "s3_p2", + "s4_p1", "s4_p2", + "s5_p1", "s5_p2", + "s6_p1", "s6_p2", + "s7_p1", "s7_p2", + "s8_p1", "s8_p2", + "s9_p1", "s9_p2", + "s10_p1", "s10_p2", + "s0_p1_backup", "s0_p2_backup", + "s1_p1_backup", "s1_p2_backup", + "s2_p1_backup", "s2_p2_backup", + "s3_p1_backup", "s3_p2_backup", + "s4_p1_backup", "s4_p2_backup", + "s5_p1_backup", "s5_p2_backup", + "s6_p1_backup", "s6_p2_backup", + "s7_p1_backup", "s7_p2_backup", + "s8_p1_backup", "s8_p2_backup", + "s9_p1_backup", "s9_p2_backup", + "s10_p1_backup", "s10_p2_backup"; #qcom,sensors = <11>; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "uplow"; @@ -388,6 +689,24 @@ #reset-cells = <1>; #power-domain-cells = <1>; reg = <0xfc400000 0x4000>; + clocks = <&xo_board>, + <&sleep_clk>, + <0>, /* ufs */ + <0>, + <0>, + <0>, + <0>, /* sata */ + <0>, + <0>; /* pcie */ + clock-names = "xo", + "sleep_clk", + "ufs_rx_symbol_0_clk_src", + "ufs_rx_symbol_1_clk_src", + "ufs_tx_symbol_0_clk_src", + "ufs_tx_symbol_1_clk_src", + "sata_asic0_clk", + "sata_rx_clk", + "pcie_pipe"; }; tcsr_mutex: hwlock@fd484000 { @@ -421,7 +740,7 @@ status = "disabled"; }; - mmc@f9824900 { + sdhc_1: mmc@f9824900 { compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf9824900 0x11c>, <0xf9824000 0x800>; reg-names = "hc", "core"; @@ -434,7 +753,7 @@ status = "disabled"; }; - mmc@f98a4900 { + sdhc_2: mmc@f98a4900 { compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; reg-names = "hc", "core"; diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index acb08dcf9442..a73c3a17b6a4 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -400,7 +400,7 @@ }; watchdog: watchdog@b017000 { - compatible = "qcom,kpss-wdt", "qcom,kpss-wdt-ipq4019"; + compatible = "qcom,kpss-wdt-ipq4019", "qcom,kpss-wdt"; reg = <0xb017000 0x40>; clocks = <&sleep_clk>; timeout-sec = <10>; diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 7e784b0995da..ae018a7dc6fd 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -549,8 +549,8 @@ }; timer@200a000 { - compatible = "qcom,kpss-timer", - "qcom,kpss-wdt-ipq8064", "qcom,msm-timer"; + compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer", + "qcom,msm-timer"; interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>, <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | @@ -562,8 +562,7 @@ <GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>; reg = <0x0200a000 0x100>; - clock-frequency = <25000000>, - <32768>; + clock-frequency = <25000000>; clocks = <&sleep_clk>; clock-names = "sleep"; cpu-offset = <0x80000>; diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index b0fe1d95d88f..8e9ea61a1e48 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -79,13 +79,13 @@ }; timer@200a000 { - compatible = "qcom,kpss-timer", "qcom,msm-timer"; + compatible = "qcom,kpss-wdt-mdm9615", "qcom,kpss-timer", + "qcom,msm-timer"; interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>, <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>, <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>; reg = <0x0200a000 0x100>; - clock-frequency = <27000000>, - <32768>; + clock-frequency = <27000000>; cpu-offset = <0x80000>; }; @@ -294,7 +294,7 @@ }; }; - sdcc1bam: dma-controller@12182000{ + sdcc1bam: dma-controller@12182000 { compatible = "qcom,bam-v1.3.0"; reg = <0x12182000 0x8000>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; @@ -304,7 +304,7 @@ qcom,ee = <0>; }; - sdcc2bam: dma-controller@12142000{ + sdcc2bam: dma-controller@12142000 { compatible = "qcom,bam-v1.3.0"; reg = <0x12142000 0x8000>; interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi index 4cba25dad8d6..c373081bc21b 100644 --- a/arch/arm/boot/dts/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi @@ -74,6 +74,13 @@ compatible = "qcom,rpm-msm8226"; qcom,smd-channels = "rpm_requests"; + rpmcc: clock-controller { + compatible = "qcom,rpmcc-msm8226", "qcom,rpmcc"; + #clock-cells = <1>; + clocks = <&xo_board>; + clock-names = "xo"; + }; + rpmpd: power-controller { compatible = "qcom,msm8226-rpmpd"; #power-domain-cells = <1>; diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 7debf9db7cb1..a0369b38fe07 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -103,14 +103,13 @@ }; timer@200a000 { - compatible = "qcom,kpss-timer", - "qcom,kpss-wdt-msm8960", "qcom,msm-timer"; + compatible = "qcom,kpss-wdt-msm8960", "qcom,kpss-timer", + "qcom,msm-timer"; interrupts = <GIC_PPI 1 0x301>, <GIC_PPI 2 0x301>, <GIC_PPI 3 0x301>; reg = <0x0200a000 0x100>; - clock-frequency = <27000000>, - <32768>; + clock-frequency = <27000000>; cpu-offset = <0x80000>; }; diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts index 280e63e3ebf2..ab35f2d644c0 100644 --- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -319,6 +319,17 @@ }; }; +&remoteproc_adsp { + cx-supply = <&pm8841_s2>; +}; + +&remoteproc_mss { + cx-supply = <&pm8841_s2>; + mss-supply = <&pm8841_s3>; + mx-supply = <&pm8841_s1>; + pll-supply = <&pm8941_l12>; +}; + &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm8841-regulators"; diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi index 1b683690a1ad..d3bec03b126c 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi @@ -188,6 +188,17 @@ qcom,num-strings = <2>; }; +&remoteproc_adsp { + cx-supply = <&pm8841_s2>; +}; + +&remoteproc_mss { + cx-supply = <&pm8841_s2>; + mss-supply = <&pm8841_s3>; + mx-supply = <&pm8841_s1>; + pll-supply = <&pm8941_l12>; +}; + &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm8841-regulators"; diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 8d216a3c0851..834ad95515b1 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -307,6 +307,8 @@ rpmcc: clock-controller { compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc"; #clock-cells = <1>; + clocks = <&xo_board>; + clock-names = "xo"; }; }; }; @@ -1054,6 +1056,11 @@ #reset-cells = <1>; #power-domain-cells = <1>; reg = <0xfc400000 0x4000>; + + clocks = <&xo_board>, + <&sleep_clk>; + clock-names = "xo", + "sleep_clk"; }; rpm_msg_ram: sram@fc428000 { @@ -1119,8 +1126,60 @@ compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1"; reg = <0xfc4a9000 0x1000>, /* TM */ <0xfc4a8000 0x1000>; /* SROT */ - nvmem-cells = <&tsens_calib>, <&tsens_backup>; - nvmem-cell-names = "calib", "calib_backup"; + nvmem-cells = <&tsens_mode>, + <&tsens_base1>, <&tsens_base2>, + <&tsens_use_backup>, + <&tsens_mode_backup>, + <&tsens_base1_backup>, <&tsens_base2_backup>, + <&tsens_s0_p1>, <&tsens_s0_p2>, + <&tsens_s1_p1>, <&tsens_s1_p2>, + <&tsens_s2_p1>, <&tsens_s2_p2>, + <&tsens_s3_p1>, <&tsens_s3_p2>, + <&tsens_s4_p1>, <&tsens_s4_p2>, + <&tsens_s5_p1>, <&tsens_s5_p2>, + <&tsens_s6_p1>, <&tsens_s6_p2>, + <&tsens_s7_p1>, <&tsens_s7_p2>, + <&tsens_s8_p1>, <&tsens_s8_p2>, + <&tsens_s9_p1>, <&tsens_s9_p2>, + <&tsens_s10_p1>, <&tsens_s10_p2>, + <&tsens_s0_p1_backup>, <&tsens_s0_p2_backup>, + <&tsens_s1_p1_backup>, <&tsens_s1_p2_backup>, + <&tsens_s2_p1_backup>, <&tsens_s2_p2_backup>, + <&tsens_s3_p1_backup>, <&tsens_s3_p2_backup>, + <&tsens_s4_p1_backup>, <&tsens_s4_p2_backup>, + <&tsens_s5_p1_backup>, <&tsens_s5_p2_backup>, + <&tsens_s6_p1_backup>, <&tsens_s6_p2_backup>, + <&tsens_s7_p1_backup>, <&tsens_s7_p2_backup>, + <&tsens_s8_p1_backup>, <&tsens_s8_p2_backup>, + <&tsens_s9_p1_backup>, <&tsens_s9_p2_backup>, + <&tsens_s10_p1_backup>, <&tsens_s10_p2_backup>; + nvmem-cell-names = "mode", + "base1", "base2", + "use_backup", + "mode_backup", + "base1_backup", "base2_backup", + "s0_p1", "s0_p2", + "s1_p1", "s1_p2", + "s2_p1", "s2_p2", + "s3_p1", "s3_p2", + "s4_p1", "s4_p2", + "s5_p1", "s5_p2", + "s6_p1", "s6_p2", + "s7_p1", "s7_p2", + "s8_p1", "s8_p2", + "s9_p1", "s9_p2", + "s10_p1", "s10_p2", + "s0_p1_backup", "s0_p2_backup", + "s1_p1_backup", "s1_p2_backup", + "s2_p1_backup", "s2_p2_backup", + "s3_p1_backup", "s3_p2_backup", + "s4_p1_backup", "s4_p2_backup", + "s5_p1_backup", "s5_p2_backup", + "s6_p1_backup", "s6_p2_backup", + "s7_p1_backup", "s7_p2_backup", + "s8_p1_backup", "s8_p2_backup", + "s9_p1_backup", "s9_p2_backup", + "s10_p1_backup", "s10_p2_backup"; #qcom,sensors = <11>; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "uplow"; @@ -1137,11 +1196,260 @@ reg = <0xfc4bc000 0x1000>; #address-cells = <1>; #size-cells = <1>; - tsens_calib: calib@d0 { - reg = <0xd0 0x18>; + + tsens_base1: base1@d0 { + reg = <0xd0 0x1>; + bits = <0 8>; + }; + + tsens_s0_p1: s0-p1@d1 { + reg = <0xd1 0x1>; + bits = <0 6>; + }; + + tsens_s1_p1: s1-p1@d2 { + reg = <0xd1 0x2>; + bits = <6 6>; + }; + + tsens_s2_p1: s2-p1@d2 { + reg = <0xd2 0x2>; + bits = <4 6>; + }; + + tsens_s3_p1: s3-p1@d3 { + reg = <0xd3 0x1>; + bits = <2 6>; + }; + + tsens_s4_p1: s4-p1@d4 { + reg = <0xd4 0x1>; + bits = <0 6>; + }; + + tsens_s5_p1: s5-p1@d4 { + reg = <0xd4 0x2>; + bits = <6 6>; + }; + + tsens_s6_p1: s6-p1@d5 { + reg = <0xd5 0x2>; + bits = <4 6>; + }; + + tsens_s7_p1: s7-p1@d6 { + reg = <0xd6 0x1>; + bits = <2 6>; + }; + + tsens_s8_p1: s8-p1@d7 { + reg = <0xd7 0x1>; + bits = <0 6>; + }; + + tsens_mode: mode@d7 { + reg = <0xd7 0x1>; + bits = <6 2>; + }; + + tsens_s9_p1: s9-p1@d8 { + reg = <0xd8 0x1>; + bits = <0 6>; + }; + + tsens_s10_p1: s10_p1@d8 { + reg = <0xd8 0x2>; + bits = <6 6>; + }; + + tsens_base2: base2@d9 { + reg = <0xd9 0x2>; + bits = <4 8>; + }; + + tsens_s0_p2: s0-p2@da { + reg = <0xda 0x2>; + bits = <4 6>; + }; + + tsens_s1_p2: s1-p2@db { + reg = <0xdb 0x1>; + bits = <2 6>; + }; + + tsens_s2_p2: s2-p2@dc { + reg = <0xdc 0x1>; + bits = <0 6>; + }; + + tsens_s3_p2: s3-p2@dc { + reg = <0xdc 0x2>; + bits = <6 6>; + }; + + tsens_s4_p2: s4-p2@dd { + reg = <0xdd 0x2>; + bits = <4 6>; + }; + + tsens_s5_p2: s5-p2@de { + reg = <0xde 0x2>; + bits = <2 6>; + }; + + tsens_s6_p2: s6-p2@df { + reg = <0xdf 0x1>; + bits = <0 6>; + }; + + tsens_s7_p2: s7-p2@e0 { + reg = <0xe0 0x1>; + bits = <0 6>; + }; + + tsens_s8_p2: s8-p2@e0 { + reg = <0xe0 0x2>; + bits = <6 6>; + }; + + tsens_s9_p2: s9-p2@e1 { + reg = <0xe1 0x2>; + bits = <4 6>; + }; + + tsens_s10_p2: s10_p2@e2 { + reg = <0xe2 0x2>; + bits = <2 6>; + }; + + tsens_s5_p2_backup: s5-p2_backup@e3 { + reg = <0xe3 0x2>; + bits = <0 6>; + }; + + tsens_mode_backup: mode_backup@e3 { + reg = <0xe3 0x1>; + bits = <6 2>; + }; + + tsens_s6_p2_backup: s6-p2_backup@e4 { + reg = <0xe4 0x1>; + bits = <0 6>; + }; + + tsens_s7_p2_backup: s7-p2_backup@e4 { + reg = <0xe4 0x2>; + bits = <6 6>; + }; + + tsens_s8_p2_backup: s8-p2_backup@e5 { + reg = <0xe5 0x2>; + bits = <4 6>; + }; + + tsens_s9_p2_backup: s9-p2_backup@e6 { + reg = <0xe6 0x2>; + bits = <2 6>; + }; + + tsens_s10_p2_backup: s10_p2_backup@e7 { + reg = <0xe7 0x1>; + bits = <0 6>; + }; + + tsens_base1_backup: base1_backup@440 { + reg = <0x440 0x1>; + bits = <0 8>; + }; + + tsens_s0_p1_backup: s0-p1_backup@441 { + reg = <0x441 0x1>; + bits = <0 6>; + }; + + tsens_s1_p1_backup: s1-p1_backup@442 { + reg = <0x441 0x2>; + bits = <6 6>; + }; + + tsens_s2_p1_backup: s2-p1_backup@442 { + reg = <0x442 0x2>; + bits = <4 6>; + }; + + tsens_s3_p1_backup: s3-p1_backup@443 { + reg = <0x443 0x1>; + bits = <2 6>; + }; + + tsens_s4_p1_backup: s4-p1_backup@444 { + reg = <0x444 0x1>; + bits = <0 6>; + }; + + tsens_s5_p1_backup: s5-p1_backup@444 { + reg = <0x444 0x2>; + bits = <6 6>; + }; + + tsens_s6_p1_backup: s6-p1_backup@445 { + reg = <0x445 0x2>; + bits = <4 6>; + }; + + tsens_s7_p1_backup: s7-p1_backup@446 { + reg = <0x446 0x1>; + bits = <2 6>; + }; + + tsens_use_backup: use_backup@447 { + reg = <0x447 0x1>; + bits = <5 3>; }; - tsens_backup: backup@440 { - reg = <0x440 0x10>; + + tsens_s8_p1_backup: s8-p1_backup@448 { + reg = <0x448 0x1>; + bits = <0 6>; + }; + + tsens_s9_p1_backup: s9-p1_backup@448 { + reg = <0x448 0x2>; + bits = <6 6>; + }; + + tsens_s10_p1_backup: s10_p1_backup@449 { + reg = <0x449 0x2>; + bits = <4 6>; + }; + + tsens_base2_backup: base2_backup@44a { + reg = <0x44a 0x2>; + bits = <2 8>; + }; + + tsens_s0_p2_backup: s0-p2_backup@44b { + reg = <0x44b 0x3>; + bits = <2 6>; + }; + + tsens_s1_p2_backup: s1-p2_backup@44c { + reg = <0x44c 0x1>; + bits = <0 6>; + }; + + tsens_s2_p2_backup: s2-p2_backup@44c { + reg = <0x44c 0x2>; + bits = <6 6>; + }; + + tsens_s3_p2_backup: s3-p2_backup@44d { + reg = <0x44d 0x2>; + bits = <4 6>; + }; + + tsens_s4_p2_backup: s4-p2_backup@44e { + reg = <0x44e 0x1>; + bits = <2 6>; }; }; @@ -1523,9 +1831,33 @@ #reset-cells = <1>; #power-domain-cells = <1>; reg = <0xfd8c0000 0x6000>; - }; - - mdss: mdss@fd900000 { + clocks = <&xo_board>, + <&gcc GCC_MMSS_GPLL0_CLK_SRC>, + <&gcc GPLL0_VOTE>, + <&gcc GPLL1_VOTE>, + <&rpmcc RPM_SMD_GFX3D_CLK_SRC>, + <&dsi0_phy 1>, + <&dsi0_phy 0>, + <&dsi1_phy 1>, + <&dsi1_phy 0>, + <0>, + <0>, + <0>; + clock-names = "xo", + "mmss_gpll0_vote", + "gpll0_vote", + "gpll1_vote", + "gfx3d_clk_src", + "dsi0pll", + "dsi0pllbyte", + "dsi1pll", + "dsi1pllbyte", + "hdmipll", + "edp_link_clk", + "edp_vco_div"; + }; + + mdss: display-subsystem@fd900000 { compatible = "qcom,mdss"; reg = <0xfd900000 0x100>, <0xfd924000 0x1000>; reg-names = "mdss_phys", "vbif_phys"; @@ -1548,8 +1880,8 @@ #size-cells = <1>; ranges; - mdp: mdp@fd900000 { - compatible = "qcom,mdp5"; + mdp: display-controller@fd900000 { + compatible = "qcom,msm8974-mdp5", "qcom,mdp5"; reg = <0xfd900100 0x22000>; reg-names = "mdp_phys"; @@ -1575,11 +1907,19 @@ remote-endpoint = <&dsi0_in>; }; }; + + port@1 { + reg = <1>; + mdp5_intf2_out: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; }; }; dsi0: dsi@fd922800 { - compatible = "qcom,mdss-dsi-ctrl"; + compatible = "qcom,msm8974-dsi-ctrl", + "qcom,mdss-dsi-ctrl"; reg = <0xfd922800 0x1f8>; reg-names = "dsi_ctrl"; @@ -1647,6 +1987,77 @@ status = "disabled"; }; + + dsi1: dsi@fd922e00 { + compatible = "qcom,msm8974-dsi-ctrl", + "qcom,mdss-dsi-ctrl"; + reg = <0xfd922e00 0x1f8>; + reg-names = "dsi_ctrl"; + + interrupt-parent = <&mdss>; + interrupts = <4>; + + assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>; + assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; + + clocks = <&mmcc MDSS_MDP_CLK>, + <&mmcc MDSS_AHB_CLK>, + <&mmcc MDSS_AXI_CLK>, + <&mmcc MDSS_BYTE1_CLK>, + <&mmcc MDSS_PCLK1_CLK>, + <&mmcc MDSS_ESC1_CLK>, + <&mmcc MMSS_MISC_AHB_CLK>; + clock-names = "mdp_core", + "iface", + "bus", + "byte", + "pixel", + "core", + "core_mmss"; + + phys = <&dsi1_phy>; + + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi1_in: endpoint { + remote-endpoint = <&mdp5_intf2_out>; + }; + }; + + port@1 { + reg = <1>; + dsi1_out: endpoint { + }; + }; + }; + }; + + dsi1_phy: phy@fd923000 { + compatible = "qcom,dsi-phy-28nm-hpm"; + reg = <0xfd923000 0xd4>, + <0xfd923100 0x280>, + <0xfd923380 0x30>; + reg-names = "dsi_pll", + "dsi_phy", + "dsi_phy_regulator"; + + #clock-cells = <1>; + #phy-cells = <0>; + + clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>; + clock-names = "iface", "ref"; + + status = "disabled"; + }; }; cci: cci@fda0c000 { diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts index 3b1cc39f2269..04bc58d87abf 100644 --- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts +++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts @@ -123,7 +123,7 @@ pinctrl-names = "default"; pinctrl-0 = <&ts_int_pin>; - syna,startup-delay-ms = <10>; + syna,startup-delay-ms = <100>; rmi-f01@1 { reg = <0x1>; @@ -294,8 +294,43 @@ }; }; +&remoteproc_adsp { + cx-supply = <&pm8841_s2>; +}; + +&remoteproc_mss { + cx-supply = <&pm8841_s2>; + mss-supply = <&pm8841_s3>; + mx-supply = <&pm8841_s1>; + pll-supply = <&pm8941_l12>; +}; + &rpm_requests { regulators-0 { + compatible = "qcom,rpm-pm8841-regulators"; + + pm8841_s1: s1 { + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s2: s2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s3: s3 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s4: s4 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + }; + + regulators-1 { compatible = "qcom,rpm-pm8941-regulators"; vdd_l1_l3-supply = <&pm8941_s1>; @@ -516,6 +551,7 @@ qcom,fast-charge-safe-current = <1500000>; qcom,fast-charge-current-limit = <1500000>; qcom,dc-current-limit = <1800000>; + usb-charge-current-limit = <1800000>; qcom,fast-charge-safe-voltage = <4400000>; qcom,fast-charge-high-threshold-voltage = <4350000>; qcom,fast-charge-low-threshold-voltage = <3400000>; diff --git a/arch/arm/boot/dts/qcom-pm8226.dtsi b/arch/arm/boot/dts/qcom-pm8226.dtsi index eb36d3662464..46ba84f86c9f 100644 --- a/arch/arm/boot/dts/qcom-pm8226.dtsi +++ b/arch/arm/boot/dts/qcom-pm8226.dtsi @@ -1,7 +1,8 @@ // SPDX-License-Identifier: BSD-3-Clause +#include <dt-bindings/iio/qcom,spmi-vadc.h> +#include <dt-bindings/input/linux-event-codes.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/spmi/spmi.h> -#include <dt-bindings/iio/qcom,spmi-vadc.h> &spmi_bus { pm8226_0: pm8226@0 { @@ -10,12 +11,25 @@ #address-cells = <1>; #size-cells = <0>; - pwrkey@800 { - compatible = "qcom,pm8941-pwrkey"; + pon@800 { + compatible = "qcom,pm8916-pon"; reg = <0x800>; - interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; - debounce = <15625>; - bias-pull-up; + + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = <KEY_POWER>; + }; + + pm8226_resin: resin { + compatible = "qcom,pm8941-resin"; + interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + status = "disabled"; + }; }; smbb: charger@1000 { @@ -41,13 +55,6 @@ chg_otg: otg-vbus { }; }; - rtc@6000 { - compatible = "qcom,pm8941-rtc"; - reg = <0x6000>, <0x6100>; - reg-names = "rtc", "alarm"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; - }; - pm8226_vadc: adc@3100 { compatible = "qcom,spmi-vadc"; reg = <0x3100>; @@ -81,6 +88,19 @@ }; }; + pm8226_iadc: adc@3600 { + compatible = "qcom,pm8226-iadc", "qcom,spmi-iadc"; + reg = <0x3600>; + interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>; + }; + + rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>, <0x6100>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; + }; + pm8226_mpps: mpps@a000 { compatible = "qcom,pm8226-mpp", "qcom,spmi-mpp"; reg = <0xa000>; diff --git a/arch/arm/boot/dts/qcom-sdx55-mtp.dts b/arch/arm/boot/dts/qcom-sdx55-mtp.dts index 9649c1e11311..6f8909731faf 100644 --- a/arch/arm/boot/dts/qcom-sdx55-mtp.dts +++ b/arch/arm/boot/dts/qcom-sdx55-mtp.dts @@ -229,6 +229,10 @@ }; }; +&remoteproc_mpss { + memory-region = <&mpss_adsp_mem>; +}; + &usb { status = "okay"; }; diff --git a/arch/arm/boot/dts/qcom-sdx55-t55.dts b/arch/arm/boot/dts/qcom-sdx55-t55.dts index 7ed8feb99afb..61ac5f54cd57 100644 --- a/arch/arm/boot/dts/qcom-sdx55-t55.dts +++ b/arch/arm/boot/dts/qcom-sdx55-t55.dts @@ -237,9 +237,9 @@ }; &ipa { - status = "okay"; - + qcom,gsi-loader = "self"; memory-region = <&ipa_fw_mem>; + status = "okay"; }; &qpic_bam { diff --git a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts index ac8b4626ae9a..c9c1f7da1261 100644 --- a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts +++ b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts @@ -237,9 +237,9 @@ }; &ipa { - status = "okay"; - + qcom,gsi-loader = "self"; memory-region = <&ipa_fw_mem>; + status = "okay"; }; &pcie0_phy { diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index f1c0dab40992..a9433d1e4f54 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -62,7 +62,13 @@ }; }; - cpu_opp_table: cpu-opp-table { + firmware { + scm { + compatible = "qcom,scm-sdx55", "qcom,scm"; + }; + }; + + cpu_opp_table: opp-table-cpu { compatible = "operating-points-v2"; opp-shared; @@ -87,12 +93,6 @@ }; }; - firmware { - scm { - compatible = "qcom,scm-sdx55", "qcom,scm"; - }; - }; - psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -214,7 +214,8 @@ }; usb_hsphy: phy@ff4000 { - compatible = "qcom,usb-snps-hs-7nm-phy"; + compatible = "qcom,sdx55-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; reg = <0x00ff4000 0x114>; status = "disabled"; #phy-cells = <0>; diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index b073e0c63df4..619cafb6d9b3 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -61,7 +61,19 @@ }; }; - cpu_opp_table: cpu-opp-table { + firmware { + scm { + compatible = "qcom,scm-sdx65", "qcom,scm"; + }; + }; + + mc_virt: interconnect-mc-virt { + compatible = "qcom,sdx65-mc-virt"; + #interconnect-cells = <1>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + cpu_opp_table: opp-table-cpu { compatible = "operating-points-v2"; opp-shared; @@ -86,18 +98,6 @@ }; }; - firmware { - scm { - compatible = "qcom,scm-sdx65", "qcom,scm"; - }; - }; - - mc_virt: interconnect-mc-virt { - compatible = "qcom,sdx65-mc-virt"; - #interconnect-cells = <1>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -219,7 +219,8 @@ }; usb_hsphy: phy@ff4000 { - compatible = "qcom,usb-snps-hs-7nm-phy"; + compatible = "qcom,sdx65-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; reg = <0xff4000 0x120>; #phy-cells = <0>; status = "disabled"; diff --git a/arch/arm/boot/dts/sama5d31ek.dts b/arch/arm/boot/dts/sama5d31ek.dts index 10fc80d6d30d..1f2dfb3127ab 100644 --- a/arch/arm/boot/dts/sama5d31ek.dts +++ b/arch/arm/boot/dts/sama5d31ek.dts @@ -40,7 +40,7 @@ }; leds { - d3 { + led-d3 { label = "d3"; gpios = <&pioE 24 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/sama5d34ek.dts b/arch/arm/boot/dts/sama5d34ek.dts index 2335bf906f69..bffd61397cb5 100644 --- a/arch/arm/boot/dts/sama5d34ek.dts +++ b/arch/arm/boot/dts/sama5d34ek.dts @@ -50,7 +50,7 @@ }; leds { - d3 { + led-d3 { label = "d3"; gpios = <&pioE 24 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi index 384335635792..7d1d7859edb4 100644 --- a/arch/arm/boot/dts/sama5d3xcm.dtsi +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi @@ -130,7 +130,7 @@ leds { compatible = "gpio-leds"; - d2 { + led-d2 { label = "d2"; gpios = <&pioE 25 GPIO_ACTIVE_LOW>; /* PE25, conflicts with A25, RXD2 */ linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi b/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi index 5579c955f141..830a0954ba1b 100644 --- a/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi +++ b/arch/arm/boot/dts/sama5d3xcm_cmp.dtsi @@ -184,7 +184,7 @@ leds { compatible = "gpio-leds"; - d2 { + led-d2 { label = "d2"; gpios = <&pioE 25 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index ab131762ecb5..929ba73702e9 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -516,6 +516,57 @@ status = "disabled"; }; + csi2dc: csi2dc@e1404000 { + compatible = "microchip,sama7g5-csi2dc"; + reg = <0xe1404000 0x500>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 34>, <&xisc>; + clock-names = "pclk", "scck"; + assigned-clocks = <&xisc>; + assigned-clock-rates = <266000000>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + csi2dc_in: endpoint { + }; + }; + + port@1 { + reg = <1>; + csi2dc_out: endpoint { + bus-width = <14>; + hsync-active = <1>; + vsync-active = <1>; + remote-endpoint = <&xisc_in>; + }; + }; + }; + }; + + xisc: xisc@e1408000 { + compatible = "microchip,sama7g5-isc"; + reg = <0xe1408000 0x2000>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 56>; + clock-names = "hclock"; + #clock-cells = <0>; + clock-output-names = "isc-mck"; + status = "disabled"; + + port { + xisc_in: endpoint { + bus-type = <5>; /* Parallel */ + bus-width = <14>; + hsync-active = <1>; + vsync-active = <1>; + remote-endpoint = <&csi2dc_out>; + }; + }; + }; + pwm: pwm@e1604000 { compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm"; reg = <0xe1604000 0x4000>; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 6eda6fdc101b..3fee80bbae21 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -749,7 +749,7 @@ arm,prefetch-offset = <7>; }; - l3regs@0xff800000 { + l3regs@ff800000 { compatible = "altr,l3regs", "syscon"; reg = <0xff800000 0x1000>; }; diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index a42a4fd69299..fead7afd5517 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -5,6 +5,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/ste-db8500-clkout.h> #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h> #include <dt-bindings/mfd/dbx500-prcmu.h> #include <dt-bindings/arm/ux500_pm_domains.h> @@ -312,6 +313,11 @@ smp_twd_clk: smp-twd-clock { #clock-cells = <0>; }; + + clkout_clk: clkout-clock { + /* Cell 1 id, cell 2 source, cell 3 div */ + #clock-cells = <3>; + }; }; mtu@a03c6000 { diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi index 8f1bb78fc1e4..e716121a78ce 100644 --- a/arch/arm/boot/dts/ste-href.dtsi +++ b/arch/arm/boot/dts/ste-href.dtsi @@ -92,20 +92,20 @@ clock-mode = /bits/ 8 <2>; #address-cells = <1>; #size-cells = <0>; - chan@0 { + led@0 { reg = <0>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; color = <LED_COLOR_ID_BLUE>; linux,default-trigger = "heartbeat"; }; - chan@1 { + led@1 { reg = <1>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; color = <LED_COLOR_ID_BLUE>; }; - chan@2 { + led@2 { reg = <2>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; @@ -119,19 +119,19 @@ clock-mode = /bits/ 8 <2>; #address-cells = <1>; #size-cells = <0>; - chan@0 { + led@0 { reg = <0>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; color = <LED_COLOR_ID_BLUE>; }; - chan@1 { + led@1 { reg = <1>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; color = <LED_COLOR_ID_BLUE>; }; - chan@2 { + led@2 { reg = <2>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi index a39dd5f7bcae..29e95e9d3229 100644 --- a/arch/arm/boot/dts/stih410.dtsi +++ b/arch/arm/boot/dts/stih410.dtsi @@ -272,7 +272,7 @@ interrupts = <GIC_SPI 205 IRQ_TYPE_EDGE_RISING>; }; - sti-cec@94a087c { + cec@94a087c { compatible = "st,stih-cec"; reg = <0x94a087c 0x64>; clocks = <&clk_sysin>; diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h index aecc403b2880..7f092cb55a41 100644 --- a/arch/arm/include/asm/thread_info.h +++ b/arch/arm/include/asm/thread_info.h @@ -128,15 +128,16 @@ extern int vfp_restore_user_hwstate(struct user_vfp *, #define TIF_NEED_RESCHED 1 /* rescheduling necessary */ #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ #define TIF_UPROBE 3 /* breakpointed or singlestepping */ -#define TIF_SYSCALL_TRACE 4 /* syscall trace active */ -#define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */ -#define TIF_SYSCALL_TRACEPOINT 6 /* syscall tracepoint instrumentation */ -#define TIF_SECCOMP 7 /* seccomp syscall filtering active */ -#define TIF_NOTIFY_SIGNAL 8 /* signal notifications exist */ +#define TIF_NOTIFY_SIGNAL 4 /* signal notifications exist */ #define TIF_USING_IWMMXT 17 #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ -#define TIF_RESTORE_SIGMASK 20 +#define TIF_RESTORE_SIGMASK 19 +#define TIF_SYSCALL_TRACE 20 /* syscall trace active */ +#define TIF_SYSCALL_AUDIT 21 /* syscall auditing active */ +#define TIF_SYSCALL_TRACEPOINT 22 /* syscall tracepoint instrumentation */ +#define TIF_SECCOMP 23 /* seccomp syscall filtering active */ + #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi index bde6a6bb8dfc..6f701297a665 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi @@ -96,10 +96,10 @@ max98504: amplifier@31 { compatible = "maxim,max98504"; reg = <0x31>; - maxim,rx-path = <1>; - maxim,tx-path = <1>; - maxim,tx-channel-mask = <3>; - maxim,tx-channel-source = <2>; + + DIOVDD-supply = <&ldo3_reg>; + DVDD-supply = <&ldo3_reg>; + /* PVDD-supply to VPH_PWR */ }; }; @@ -925,7 +925,6 @@ compatible = "maxim,max77843-haptic"; haptic-supply = <&ldo38_reg>; pwms = <&pwm 0 33670 0>; - pwm-names = "haptic"; }; }; }; @@ -1315,7 +1314,7 @@ reg = <0x0>; spi-max-frequency = <5000000>; power-supply = <&irda_regulator>; - duty-cycle = <60>; + duty-cycle = /bits/ 8 <60>; led-active-low; controller-data { diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index bd6a354b9cb5..47b5ac06f0d6 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -89,7 +89,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x100>; - clock-frequency = <1300000000>; clocks = <&cmu_apollo CLK_SCLK_APOLLO>; clock-names = "apolloclk"; operating-points-v2 = <&cluster_a53_opp_table>; @@ -108,7 +107,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x101>; - clock-frequency = <1300000000>; operating-points-v2 = <&cluster_a53_opp_table>; #cooling-cells = <2>; i-cache-size = <0x8000>; @@ -125,7 +123,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x102>; - clock-frequency = <1300000000>; operating-points-v2 = <&cluster_a53_opp_table>; #cooling-cells = <2>; i-cache-size = <0x8000>; @@ -142,7 +139,6 @@ compatible = "arm,cortex-a53"; enable-method = "psci"; reg = <0x103>; - clock-frequency = <1300000000>; operating-points-v2 = <&cluster_a53_opp_table>; #cooling-cells = <2>; i-cache-size = <0x8000>; @@ -159,7 +155,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x0>; - clock-frequency = <1900000000>; clocks = <&cmu_atlas CLK_SCLK_ATLAS>; clock-names = "atlasclk"; operating-points-v2 = <&cluster_a57_opp_table>; @@ -178,7 +173,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x1>; - clock-frequency = <1900000000>; operating-points-v2 = <&cluster_a57_opp_table>; #cooling-cells = <2>; i-cache-size = <0xc000>; @@ -195,7 +189,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x2>; - clock-frequency = <1900000000>; operating-points-v2 = <&cluster_a57_opp_table>; #cooling-cells = <2>; i-cache-size = <0xc000>; @@ -212,7 +205,6 @@ compatible = "arm,cortex-a57"; enable-method = "psci"; reg = <0x3>; - clock-frequency = <1900000000>; operating-points-v2 = <&cluster_a57_opp_table>; #cooling-cells = <2>; i-cache-size = <0xc000>; @@ -226,6 +218,8 @@ cluster_a57_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; @@ -233,6 +227,8 @@ cluster_a53_l2: l2-cache1 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x40000>; cache-line-size = <64>; cache-sets = <256>; @@ -1118,22 +1114,26 @@ }; syscon_disp: syscon@13b80000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-disp-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x13b80000 0x1010>; }; syscon_cam0: syscon@120f0000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-cam0-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x120f0000 0x1020>; }; syscon_cam1: syscon@145f0000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-cam1-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x145f0000 0x1038>; }; syscon_fsys: syscon@156f0000 { - compatible = "samsung,exynos5433-sysreg", "syscon"; + compatible = "samsung,exynos5433-fsys-sysreg", + "samsung,exynos5433-sysreg", "syscon"; reg = <0x156f0000 0x1044>; }; diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts index e38c59cf18dc..b846c0be90e3 100644 --- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts @@ -83,8 +83,6 @@ }; &hsi2c_4 { - samsung,i2c-sda-delay = <100>; - samsung,i2c-max-bus-freq = <200000>; status = "okay"; pmic@66 { diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 1cd771c90b47..f378d8629d88 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -107,6 +107,8 @@ atlas_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x200000>; cache-line-size = <64>; cache-sets = <2048>; diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi index c61441f3a89a..a38fe5129937 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -549,13 +549,15 @@ }; sysreg_peri: syscon@10020000 { - compatible = "samsung,exynos850-sysreg", "syscon"; + compatible = "samsung,exynos850-peri-sysreg", + "samsung,exynos850-sysreg", "syscon"; reg = <0x10020000 0x10000>; clocks = <&cmu_peri CLK_GOUT_SYSREG_PERI_PCLK>; }; sysreg_cmgp: syscon@11c20000 { - compatible = "samsung,exynos850-sysreg", "syscon"; + compatible = "samsung,exynos850-cmgp-sysreg", + "samsung,exynos850-sysreg", "syscon"; reg = <0x11c20000 0x10000>; clocks = <&cmu_cmgp CLK_GOUT_SYSREG_CMGP_PCLK>; }; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index 5dc361734cfe..d3c5cdeff47f 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -370,17 +370,20 @@ }; syscon_fsys2: syscon@17c20000 { - compatible = "samsung,exynosautov9-sysreg", "syscon"; + compatible = "samsung,exynosautov9-fsys2-sysreg", + "samsung,exynosautov9-sysreg", "syscon"; reg = <0x17c20000 0x1000>; }; syscon_peric0: syscon@10220000 { - compatible = "samsung,exynosautov9-sysreg", "syscon"; + compatible = "samsung,exynosautov9-peric0-sysreg", + "samsung,exynosautov9-sysreg", "syscon"; reg = <0x10220000 0x2000>; }; syscon_peric1: syscon@10820000 { - compatible = "samsung,exynosautov9-sysreg", "syscon"; + compatible = "samsung,exynosautov9-peric1-sysreg", + "samsung,exynosautov9-sysreg", "syscon"; reg = <0x10820000 0x2000>; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 0192a01bf852..3f13a960f34e 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -85,28 +85,28 @@ leds { compatible = "gpio-leds"; - user_led1 { + led-user-1 { label = "green:user1"; /* gpio_150_user_led1 */ gpios = <&gpio18 6 0>; linux,default-trigger = "heartbeat"; }; - user_led2 { + led-user-2 { label = "green:user2"; /* gpio_151_user_led2 */ gpios = <&gpio18 7 0>; linux,default-trigger = "none"; }; - user_led3 { + led-user-3 { label = "green:user3"; /* gpio_189_user_led3 */ gpios = <&gpio23 5 0>; linux,default-trigger = "mmc0"; }; - user_led4 { + led-user-4 { label = "green:user4"; /* gpio_190_user_led4 */ gpios = <&gpio23 6 0>; @@ -114,7 +114,7 @@ linux,default-trigger = "none"; }; - wlan_active_led { + led-wlan { label = "yellow:wlan"; /* gpio_205_wifi_active */ gpios = <&gpio25 5 0>; @@ -122,7 +122,7 @@ default-state = "off"; }; - bt_active_led { + led-bt { label = "blue:bt"; gpios = <&gpio25 7 0>; /* gpio_207_user_led1 */ diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index 629e604aa281..f0672ec65b26 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -125,39 +125,39 @@ leds { compatible = "gpio-leds"; - user_led1 { + led-user-1 { label = "green:user1"; gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */ linux,default-trigger = "heartbeat"; }; - user_led2 { + led-user-2 { label = "green:user2"; gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */ linux,default-trigger = "mmc0"; }; - user_led3 { + led-user-3 { label = "green:user3"; gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */ linux,default-trigger = "mmc1"; }; - user_led4 { + led-user-4 { label = "green:user4"; gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */ panic-indicator; linux,default-trigger = "none"; }; - wlan_active_led { + led-wlan { label = "yellow:wlan"; gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */ linux,default-trigger = "phy0tx"; default-state = "off"; }; - bt_active_led { + led-bt { label = "blue:bt"; gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */ linux,default-trigger = "hci0-power"; diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index 2dd5e38820b1..0367a00a269b 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -465,7 +465,7 @@ reg = <0x6 0x10808000 0x5d0000>; }; - switch: switch@0x600000000 { + switch: switch@600000000 { compatible = "microchip,sparx5-switch"; reg = <0x6 0 0x401000>, <0x6 0x10004000 0x7fc000>, diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 3e79496292e7..60de22c9ed75 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c1.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c2.dtb +dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-asus-z00l.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-huawei-g7.dtb diff --git a/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts b/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts new file mode 100644 index 000000000000..ed3fa7b3575b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts @@ -0,0 +1,295 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/dts-v1/; + +#include "msm8916-pm8916.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/* + * NOTE: The original firmware from Acer can only boot 32-bit kernels. + * To boot this device tree using arm64 it is necessary to flash 64-bit + * TZ/HYP firmware (e.g. taken from the DragonBoard 410c). + * See https://wiki.postmarketos.org/wiki/Acer_Iconia_Talk_S_(acer-a1-724) + * for suggested installation instructions. + */ + +/ { + model = "Acer Iconia Talk S A1-724"; + compatible = "acer,a1-724", "qcom,msm8916"; + chassis-type = "tablet"; + + aliases { + serial0 = &blsp1_uart2; + }; + + chosen { + stdout-path = "serial0"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_default>; + + label = "GPIO Buttons"; + + button-volume-up { + label = "Volume Up"; + gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>; + linux,code = <KEY_VOLUMEUP>; + }; + }; + + usb_id: usb-id { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&msmgpio 110 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_id_default>; + }; +}; + +&blsp_i2c2 { + status = "okay"; + + accelerometer@10 { + compatible = "bosch,bmc150_accel"; + reg = <0x10>; + interrupt-parent = <&msmgpio>; + interrupts = <115 IRQ_TYPE_EDGE_RISING>; + + vdd-supply = <&pm8916_l17>; + vddio-supply = <&pm8916_l6>; + + pinctrl-names = "default"; + pinctrl-0 = <&accel_int_default>; + + mount-matrix = "0", "-1", "0", + "-1", "0", "0", + "0", "0", "1"; + }; + + magnetometer@12 { + compatible = "bosch,bmc150_magn"; + reg = <0x12>; + + vdd-supply = <&pm8916_l17>; + vddio-supply = <&pm8916_l6>; + }; +}; + +&blsp_i2c5 { + status = "okay"; + + touchscreen@38 { + /* Actually ft5446 */ + compatible = "edt,edt-ft5406"; + reg = <0x38>; + + interrupt-parent = <&msmgpio>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; + + reset-gpios = <&msmgpio 12 GPIO_ACTIVE_LOW>; + + vcc-supply = <&pm8916_l16>; + iovcc-supply = <&pm8916_l6>; + + touchscreen-size-x = <720>; + touchscreen-size-y = <1280>; + + pinctrl-names = "default"; + pinctrl-0 = <&touchscreen_default>; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&pm8916_resin { + linux,code = <KEY_VOLUMEDOWN>; + status = "okay"; +}; + +&pm8916_vib { + status = "okay"; +}; + +&pronto { + status = "okay"; +}; + +&sdhc_1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>; + pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>; + + status = "okay"; +}; + +&sdhc_2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>; + pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; + + cd-gpios = <&msmgpio 38 GPIO_ACTIVE_HIGH>; + + status = "okay"; +}; + +&usb { + extcon = <&usb_id>, <&usb_id>; + status = "okay"; +}; + +&usb_hs_phy { + extcon = <&usb_id>; +}; + +&smd_rpm_regulators { + vdd_l1_l2_l3-supply = <&pm8916_s3>; + vdd_l4_l5_l6-supply = <&pm8916_s4>; + vdd_l7-supply = <&pm8916_s4>; + + s3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1300000>; + }; + + s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2100000>; + }; + + l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + l4 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l8 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2900000>; + }; + + l9 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + l10 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2800000>; + }; + + l11 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + regulator-system-load = <200000>; + regulator-allow-set-load; + }; + + l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + l13 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + }; + + l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + l15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + l16 { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + }; + + l17 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + l18 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; +}; + +&msmgpio { + accel_int_default: accel-int-default-state { + pins = "gpio115"; + function = "gpio"; + + drive-strength = <2>; + bias-disable; + }; + + gpio_keys_default: gpio-keys-default-state { + pins = "gpio107"; + function = "gpio"; + + drive-strength = <2>; + bias-pull-up; + }; + + touchscreen_default: touchscreen-default-state { + reset-pins { + pins = "gpio12"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + touchscreen-pins { + pins = "gpio13"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + usb_id_default: usb-id-default-state { + pins = "gpio110"; + function = "gpio"; + + drive-strength = <8>; + bias-pull-up; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi index 8166e3c1ff4e..d3ec8c45d5af 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi @@ -638,6 +638,25 @@ #clock-cells = <1>; clock-frequency = <11289600>; + /* Reference versaclock instead of audio_clk_a */ + clocks = <&cpg CPG_MOD 1005>, + <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, + <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, + <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, + <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, + <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, + <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, + <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, + <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, + <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, + <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, + <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, + <&versaclock6_bb 4>, <&audio_clk_b>, + <&audio_clk_c>, + <&cpg CPG_CORE CPG_AUDIO_CLK_I>; + status = "okay"; ports { diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts index 9ae67263c0df..24da6ee6eccd 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts +++ b/arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts @@ -58,24 +58,3 @@ clock-names = "du.0", "du.1", "du.2", "dclkin.0", "dclkin.1", "dclkin.2"; }; - -/* Reference versaclock instead of audio_clk_a */ -&rcar_sound { - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&versaclock6_bb 4>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A774A1_CLK_S0D4>; -}; diff --git a/arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts b/arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts index 89d708346ba8..0cfa60a0827c 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts +++ b/arch/arm64/boot/dts/renesas/r8a774b1-beacon-rzg2n-kit.dts @@ -46,24 +46,3 @@ clock-names = "du.0", "du.1", "du.3", "dclkin.0", "dclkin.1", "dclkin.3"; }; - -/* Reference versaclock instead of audio_clk_a */ -&rcar_sound { - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&versaclock6_bb 4>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A774B1_CLK_S0D4>; -}; diff --git a/arch/arm64/boot/dts/renesas/r8a774e1-beacon-rzg2h-kit.dts b/arch/arm64/boot/dts/renesas/r8a774e1-beacon-rzg2h-kit.dts index 3e9ced3b2d33..bce5e78ca528 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1-beacon-rzg2h-kit.dts +++ b/arch/arm64/boot/dts/renesas/r8a774e1-beacon-rzg2h-kit.dts @@ -51,24 +51,3 @@ clock-names = "du.0", "du.1", "du.3", "dclkin.0", "dclkin.1", "dclkin.3"; }; - -/* Reference versaclock instead of audio_clk_a */ -&rcar_sound { - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&versaclock6_bb 4>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A774E1_CLK_S0D4>; -}; diff --git a/arch/arm64/boot/dts/renesas/r8a77980a-condor-i.dts b/arch/arm64/boot/dts/renesas/r8a77980a-condor-i.dts index 9f488dea0f34..53fc21709345 100644 --- a/arch/arm64/boot/dts/renesas/r8a77980a-condor-i.dts +++ b/arch/arm64/boot/dts/renesas/r8a77980a-condor-i.dts @@ -13,3 +13,7 @@ model = "Renesas Condor-I board based on r8a77980A (ES2.0)"; compatible = "renesas,condor-i", "renesas,r8a77980a", "renesas,r8a77980"; }; + +&mmc0 { + mmc-hs400-1_8v; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi index 67a4f2d4480d..ac294168c867 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi @@ -14,6 +14,60 @@ #address-cells = <2>; #size-cells = <2>; + cluster01_opp: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <880000>; + clock-latency-ns = <500000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <880000>; + clock-latency-ns = <500000>; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <880000>; + clock-latency-ns = <500000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <880000>; + clock-latency-ns = <500000>; + opp-suspend; + }; + }; + + cluster23_opp: opp-table-1 { + compatible = "operating-points-v2"; + opp-shared; + + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <880000>; + clock-latency-ns = <500000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <880000>; + clock-latency-ns = <500000>; + }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <880000>; + clock-latency-ns = <500000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <880000>; + clock-latency-ns = <500000>; + opp-suspend; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -65,6 +119,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>; + operating-points-v2 = <&cluster01_opp>; }; a55_1: cpu@100 { @@ -76,6 +131,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>; + operating-points-v2 = <&cluster01_opp>; }; a55_2: cpu@10000 { @@ -87,6 +143,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>; + operating-points-v2 = <&cluster01_opp>; }; a55_3: cpu@10100 { @@ -98,6 +155,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>; + operating-points-v2 = <&cluster01_opp>; }; a55_4: cpu@20000 { @@ -109,6 +167,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>; + operating-points-v2 = <&cluster23_opp>; }; a55_5: cpu@20100 { @@ -120,6 +179,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>; + operating-points-v2 = <&cluster23_opp>; }; a55_6: cpu@30000 { @@ -131,6 +191,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>; + operating-points-v2 = <&cluster23_opp>; }; a55_7: cpu@30100 { @@ -142,6 +203,7 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>; + operating-points-v2 = <&cluster23_opp>; }; L3_CA55_0: cache-controller-0 { diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi index c10740aee9f6..bb4a5270f71b 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi @@ -97,6 +97,27 @@ reg = <0x6 0x00000000 0x1 0x00000000>; }; + mini-dp-con { + compatible = "dp-connector"; + label = "CN5"; + type = "mini"; + + port { + mini_dp_con_in: endpoint { + remote-endpoint = <&sn65dsi86_out>; + }; + }; + }; + + reg_1p2v: regulator-1p2v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; @@ -114,6 +135,12 @@ regulator-boot-on; regulator-always-on; }; + + sn65dsi86_refclk: clk-x6 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + }; }; &avb0 { @@ -134,6 +161,23 @@ }; }; +&dsi0 { + status = "okay"; + + ports { + port@1 { + dsi0_out: endpoint { + remote-endpoint = <&sn65dsi86_in>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; + +&du { + status = "okay"; +}; + &extal_clk { clock-frequency = <16666666>; }; @@ -172,6 +216,51 @@ }; }; +&i2c1 { + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + bridge@2c { + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + + clocks = <&sn65dsi86_refclk>; + clock-names = "refclk"; + + interrupt-parent = <&intc_ex>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; + + vccio-supply = <®_1p8v>; + vpll-supply = <®_1p8v>; + vcca-supply = <®_1p2v>; + vcc-supply = <®_1p2v>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sn65dsi86_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + sn65dsi86_out: endpoint { + remote-endpoint = <&mini_dp_con_in>; + }; + }; + }; + }; +}; + &mmc0 { pinctrl-0 = <&mmc_pins>; pinctrl-1 = <&mmc_pins>; @@ -221,6 +310,11 @@ function = "i2c0"; }; + i2c1_pins: i2c1 { + groups = "i2c1"; + function = "i2c1"; + }; + keys_pins: keys { pins = "GP_5_0", "GP_5_1", "GP_5_2"; bias-pull-up; diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index 45d8d927ad26..83d1666a2ea1 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -1203,6 +1203,136 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + fcpvd0: fcp@fea10000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea10000 0 0x200>; + clocks = <&cpg CPG_MOD 508>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 508>; + }; + + fcpvd1: fcp@fea11000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea11000 0 0x200>; + clocks = <&cpg CPG_MOD 509>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 509>; + }; + + vspd0: vsp@fea20000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea20000 0 0x7000>; + interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 830>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 830>; + + renesas,fcp = <&fcpvd0>; + }; + + vspd1: vsp@fea28000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea28000 0 0x7000>; + interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 831>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 831>; + + renesas,fcp = <&fcpvd1>; + }; + + du: display@feb00000 { + compatible = "renesas,du-r8a779g0"; + reg = <0 0xfeb00000 0 0x40000>; + interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 411>; + clock-names = "du.0"; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 411>; + reset-names = "du.0"; + renesas,vsps = <&vspd0 0>, <&vspd1 0>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + du_out_dsi0: endpoint { + remote-endpoint = <&dsi0_in>; + }; + }; + + port@1 { + reg = <1>; + du_out_dsi1: endpoint { + remote-endpoint = <&dsi1_in>; + }; + }; + }; + }; + + dsi0: dsi-encoder@fed80000 { + compatible = "renesas,r8a779g0-dsi-csi2-tx"; + reg = <0 0xfed80000 0 0x10000>; + clocks = <&cpg CPG_MOD 415>, + <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, + <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; + clock-names = "fck", "dsi", "pll"; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 415>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&du_out_dsi0>; + }; + }; + + port@1 { + reg = <1>; + }; + }; + }; + + dsi1: dsi-encoder@fed90000 { + compatible = "renesas,r8a779g0-dsi-csi2-tx"; + reg = <0 0xfed90000 0 0x10000>; + clocks = <&cpg CPG_MOD 416>, + <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, + <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; + clock-names = "fck", "dsi", "pll"; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 416>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi1_in: endpoint { + remote-endpoint = <&du_out_dsi1>; + }; + }; + + port@1 { + reg = <1>; + }; + }; + }; + prr: chipid@fff00044 { compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; diff --git a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi index 0373ec409d54..dd35a8ff72ee 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g011.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g011.dtsi @@ -69,6 +69,54 @@ clock-names = "clk"; }; + sdhi0: mmc@85000000 { + compatible = "renesas,sdhi-r9a09g011", + "renesas,rcar-gen3-sdhi"; + reg = <0x0 0x85000000 0 0x2000>; + interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A09G011_SDI0_IMCLK>, + <&cpg CPG_MOD R9A09G011_SDI0_CLK_HS>, + <&cpg CPG_MOD R9A09G011_SDI0_IMCLK2>, + <&cpg CPG_MOD R9A09G011_SDI0_ACLK>; + clock-names = "core", "clkh", "cd", "aclk"; + resets = <&cpg R9A09G011_SDI0_IXRST>; + power-domains = <&cpg>; + status = "disabled"; + }; + + sdhi1: mmc@85010000 { + compatible = "renesas,sdhi-r9a09g011", + "renesas,rcar-gen3-sdhi"; + reg = <0x0 0x85010000 0 0x2000>; + interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A09G011_SDI1_IMCLK>, + <&cpg CPG_MOD R9A09G011_SDI1_CLK_HS>, + <&cpg CPG_MOD R9A09G011_SDI1_IMCLK2>, + <&cpg CPG_MOD R9A09G011_SDI1_ACLK>; + clock-names = "core", "clkh", "cd", "aclk"; + resets = <&cpg R9A09G011_SDI1_IXRST>; + power-domains = <&cpg>; + status = "disabled"; + }; + + emmc: mmc@85020000 { + compatible = "renesas,sdhi-r9a09g011", + "renesas,rcar-gen3-sdhi"; + reg = <0x0 0x85020000 0 0x2000>; + interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD R9A09G011_EMM_IMCLK>, + <&cpg CPG_MOD R9A09G011_EMM_CLK_HS>, + <&cpg CPG_MOD R9A09G011_EMM_IMCLK2>, + <&cpg CPG_MOD R9A09G011_EMM_ACLK>; + clock-names = "core", "clkh", "cd", "aclk"; + resets = <&cpg R9A09G011_EMM_IXRST>; + power-domains = <&cpg>; + status = "disabled"; + }; + avb: ethernet@a3300000 { compatible = "renesas,etheravb-r9a09g011","renesas,etheravb-rzv2m"; reg = <0 0xa3300000 0 0x800>; diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi index 408871c2859d..3b27ec7f45d6 100644 --- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi @@ -126,7 +126,7 @@ }; &i2c2 { - i2cswitch2: i2c-switch@71 { + i2cmux2: i2c-mux@71 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; @@ -317,7 +317,7 @@ }; &i2c4 { - i2cswitch4: i2c-switch@71 { + i2cmux4: i2c-mux@71 { compatible = "nxp,pca9548"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts index 1db6ddf03f01..8d7794642900 100644 --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts @@ -10,6 +10,7 @@ /dts-v1/; #include "fsd.dtsi" +#include <dt-bindings/gpio/gpio.h> / { model = "Tesla Full Self-Driving (FSD) Evaluation board"; @@ -28,12 +29,80 @@ device_type = "memory"; reg = <0x0 0x80000000 0x2 0x00000000>; }; + + sound { + compatible = "simple-audio-card"; + + #address-cells = <1>; + #size-cells = <0>; + + simple-audio-card,name = "FSD Audio Card"; + simple-audio-card,widgets = "Line", "Line Out", + "Line", "Line In"; + simple-audio-card,routing = "Line Out", "LLOUT", + "Line Out", "RLOUT", + "MIC2L", "Line In", + "MIC2R", "Line In"; + + simple-audio-card,dai-link@0 { + reg = <0>; + format = "i2s"; + bitclock-master = <&tlv320aic3x>; + frame-master = <&tlv320aic3x>; + + cpu-0 { + sound-dai = <&i2s_0 0>; + }; + cpu-1 { + sound-dai = <&i2s_0 1>; + }; + codec { + sound-dai = <&tlv320aic3x>; + system-clock-frequency = <33000000>; + }; + }; + }; }; &fin_pll { clock-frequency = <24000000>; }; +&hsi2c_5 { + status = "okay"; + + tlv320aic3x: codec@18 { + compatible = "ti,tlv320aic3104"; + reg = <0x18>; + #sound-dai-cells = <0>; + reset-gpios = <&gpg1 6 GPIO_ACTIVE_LOW>; + }; +}; + +&i2s_0 { + status = "okay"; +}; + +&i2s_1 { + status = "okay"; +}; + +&m_can0 { + status = "okay"; +}; + +&m_can1 { + status = "okay"; +}; + +&m_can2 { + status = "okay"; +}; + +&m_can3 { + status = "okay"; +}; + &serial_0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi index e3852c946352..3f898cf4874c 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi @@ -54,14 +54,14 @@ ufs_rst_n: ufs-rst-n-pins { samsung,pins = "gpf5-0"; samsung,pin-function = <FSD_PIN_FUNC_2>; - samsung,pin-pud = <FSD_PIN_PULL_NONE>; + samsung,pin-pud = <FSD_PIN_PULL_DOWN>; samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; ufs_refclk_out: ufs-refclk-out-pins { samsung,pins = "gpf5-1"; samsung,pin-function = <FSD_PIN_FUNC_2>; - samsung,pin-pud = <FSD_PIN_PULL_NONE>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; }; @@ -308,37 +308,79 @@ uart0_data: uart0-data-pins { samsung,pins = "gpb7-0", "gpb7-1"; samsung,pin-function = <FSD_PIN_FUNC_2>; - samsung,pin-pud = <FSD_PIN_PULL_NONE>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; uart1_data: uart1-data-pins { samsung,pins = "gpb7-4", "gpb7-5"; samsung,pin-function = <FSD_PIN_FUNC_2>; - samsung,pin-pud = <FSD_PIN_PULL_NONE>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; spi0_bus: spi0-bus-pins { samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3"; samsung,pin-function = <FSD_PIN_FUNC_2>; - samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-pud = <FSD_PIN_PULL_DOWN>; samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; spi1_bus: spi1-bus-pins { samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7"; samsung,pin-function = <FSD_PIN_FUNC_2>; - samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-pud = <FSD_PIN_PULL_DOWN>; samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; spi2_bus: spi2-bus-pins { samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3"; samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_DOWN>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; + }; + + m_can0_bus: m-can0-bus-pins { + samsung,pins = "gpd0-0", "gpd0-1"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; + }; + + m_can1_bus: m-can1-bus-pins { + samsung,pins = "gpd0-2", "gpd0-3"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; + }; + + m_can2_bus: m-can2-bus-pins { + samsung,pins = "gpd0-4", "gpd0-5"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; + }; + + m_can3_bus: m-can3-bus-pins { + samsung,pins = "gpd0-6", "gpd0-7"; + samsung,pin-function = <FSD_PIN_FUNC_2>; samsung,pin-pud = <FSD_PIN_PULL_UP>; samsung,pin-drv = <FSD_PIN_DRV_LV4>; }; + + i2s0_bus: i2s0-bus-pins { + samsung,pins = "gpd1-0", "gpd1-1", "gpd1-2", "gpd1-3", "gpd1-4"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_DOWN>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; + }; + + i2s1_bus: i2s1-bus-pins { + samsung,pins = "gpd2-0", "gpd2-1", "gpd2-2", "gpd2-3", "gpd2-4"; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_DOWN>; + samsung,pin-drv = <FSD_PIN_DRV_LV4>; + }; }; &pinctrl_pmu { diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index f35bc5a288c2..1c53c68efd53 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -281,6 +281,8 @@ cpucl_l2: l2-cache0 { compatible = "cache"; + cache-level = <2>; + cache-unified; cache-size = <0x400000>; cache-line-size = <64>; cache-sets = <4096>; @@ -466,6 +468,11 @@ clock-names = "fin_pll"; }; + sysreg_cam: system-controller@12630000 { + compatible = "tesla,fsd-cam-sysreg", "syscon"; + reg = <0x0 0x12630000 0x0 0x500>; + }; + clock_mfc: clock-controller@12810000 { compatible = "tesla,fsd-clock-mfc"; reg = <0x0 0x12810000 0x0 0x3000>; @@ -492,6 +499,11 @@ "dout_cmu_peric_shared1div4_dmaclk"; }; + sysreg_peric: system-controller@14030000 { + compatible = "tesla,fsd-peric-sysreg", "syscon"; + reg = <0x0 0x14030000 0x0 0x1000>; + }; + clock_fsys0: clock-controller@15010000 { compatible = "tesla,fsd-clock-fsys0"; reg = <0x0 0x15010000 0x0 0x3000>; @@ -506,6 +518,11 @@ "dout_cmu_fsys0_shared0div4"; }; + sysreg_fsys0: system-controller@15030000 { + compatible = "tesla,fsd-fsys0-sysreg", "syscon"; + reg = <0x0 0x15030000 0x0 0x1000>; + }; + clock_fsys1: clock-controller@16810000 { compatible = "tesla,fsd-clock-fsys1"; reg = <0x0 0x16810000 0x0 0x3000>; @@ -518,6 +535,11 @@ "dout_cmu_fsys1_shared0div4"; }; + sysreg_fsys1: system-controller@16830000 { + compatible = "tesla,fsd-fsys1-sysreg", "syscon"; + reg = <0x0 0x16830000 0x0 0x1000>; + }; + mdma0: dma-controller@10100000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x0 0x10100000 0x0 0x1000>; @@ -738,6 +760,40 @@ status = "disabled"; }; + i2s_0: i2s@140e0000 { + compatible = "tesla,fsd-i2s"; + reg = <0x0 0x140e0000 0x0 0x100>; + interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma1 14>, <&pdma1 13>, <&pdma1 12>; + dma-names = "tx", "rx", "tx-sec"; + #clock-cells = <1>; + clocks = <&clock_peric PERIC_PCLK_TDM0>, + <&clock_peric PERIC_HCLK_TDM0>, + <&clock_peric PERIC_HCLK_TDM0>; + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_bus>; + #sound-dai-cells = <1>; + status = "disabled"; + }; + + i2s_1: i2s@140f0000 { + compatible = "tesla,fsd-i2s"; + reg = <0x0 0x140f0000 0x0 0x100>; + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&pdma1 17>, <&pdma1 16>, <&pdma1 15>; + dma-names = "tx", "rx", "tx-sec"; + #clock-cells = <1>; + clocks = <&clock_peric PERIC_PCLK_TDM1>, + <&clock_peric PERIC_HCLK_TDM1>, + <&clock_peric PERIC_HCLK_TDM1>; + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_bus>; + #sound-dai-cells = <1>; + status = "disabled"; + }; + pinctrl_pmu: pinctrl@114f0000 { compatible = "tesla,fsd-pinctrl"; reg = <0x0 0x114f0000 0x0 0x1000>; @@ -755,6 +811,74 @@ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; }; + m_can0: can@14088000 { + compatible = "bosch,m_can"; + reg = <0x0 0x14088000 0x0 0x0200>, + <0x0 0x14080000 0x0 0x8000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + pinctrl-names = "default"; + pinctrl-0 = <&m_can0_bus>; + clocks = <&clock_peric PERIC_MCAN0_IPCLKPORT_PCLK>, + <&clock_peric PERIC_MCAN0_IPCLKPORT_CCLK>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + m_can1: can@14098000 { + compatible = "bosch,m_can"; + reg = <0x0 0x14098000 0x0 0x0200>, + <0x0 0x14090000 0x0 0x8000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + pinctrl-names = "default"; + pinctrl-0 = <&m_can1_bus>; + clocks = <&clock_peric PERIC_MCAN1_IPCLKPORT_PCLK>, + <&clock_peric PERIC_MCAN1_IPCLKPORT_CCLK>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + m_can2: can@140a8000 { + compatible = "bosch,m_can"; + reg = <0x0 0x140a8000 0x0 0x0200>, + <0x0 0x140a0000 0x0 0x8000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + pinctrl-names = "default"; + pinctrl-0 = <&m_can2_bus>; + clocks = <&clock_peric PERIC_MCAN2_IPCLKPORT_PCLK>, + <&clock_peric PERIC_MCAN2_IPCLKPORT_CCLK>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + + m_can3: can@140b8000 { + compatible = "bosch,m_can"; + reg = <0x0 0x140b8000 0x0 0x0200>, + <0x0 0x140b0000 0x0 0x8000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + pinctrl-names = "default"; + pinctrl-0 = <&m_can3_bus>; + clocks = <&clock_peric PERIC_MCAN3_IPCLKPORT_PCLK>, + <&clock_peric PERIC_MCAN3_IPCLKPORT_CCLK>; + clock-names = "hclk", "cclk"; + bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; + }; + spi_0: spi@14140000 { compatible = "tesla,fsd-spi"; reg = <0x0 0x14140000 0x0 0x100>; diff --git a/arch/arm64/crypto/sm4-ce-ccm-core.S b/arch/arm64/crypto/sm4-ce-ccm-core.S index 028207c4afd0..fa85856f33ce 100644 --- a/arch/arm64/crypto/sm4-ce-ccm-core.S +++ b/arch/arm64/crypto/sm4-ce-ccm-core.S @@ -8,6 +8,7 @@ */ #include <linux/linkage.h> +#include <linux/cfi_types.h> #include <asm/assembler.h> #include "sm4-ce-asm.h" @@ -104,7 +105,7 @@ SYM_FUNC_START(sm4_ce_ccm_final) SYM_FUNC_END(sm4_ce_ccm_final) .align 3 -SYM_FUNC_START(sm4_ce_ccm_enc) +SYM_TYPED_FUNC_START(sm4_ce_ccm_enc) /* input: * x0: round key array, CTX * x1: dst @@ -216,7 +217,7 @@ SYM_FUNC_START(sm4_ce_ccm_enc) SYM_FUNC_END(sm4_ce_ccm_enc) .align 3 -SYM_FUNC_START(sm4_ce_ccm_dec) +SYM_TYPED_FUNC_START(sm4_ce_ccm_dec) /* input: * x0: round key array, CTX * x1: dst diff --git a/arch/arm64/crypto/sm4-ce-gcm-core.S b/arch/arm64/crypto/sm4-ce-gcm-core.S index 7aa3ec18a289..347f25d75727 100644 --- a/arch/arm64/crypto/sm4-ce-gcm-core.S +++ b/arch/arm64/crypto/sm4-ce-gcm-core.S @@ -9,6 +9,7 @@ */ #include <linux/linkage.h> +#include <linux/cfi_types.h> #include <asm/assembler.h> #include "sm4-ce-asm.h" @@ -370,7 +371,7 @@ SYM_FUNC_START(pmull_ghash_update) SYM_FUNC_END(pmull_ghash_update) .align 3 -SYM_FUNC_START(sm4_ce_pmull_gcm_enc) +SYM_TYPED_FUNC_START(sm4_ce_pmull_gcm_enc) /* input: * x0: round key array, CTX * x1: dst @@ -581,7 +582,7 @@ SYM_FUNC_END(sm4_ce_pmull_gcm_enc) #define RH3 v20 .align 3 -SYM_FUNC_START(sm4_ce_pmull_gcm_dec) +SYM_TYPED_FUNC_START(sm4_ce_pmull_gcm_dec) /* input: * x0: round key array, CTX * x1: dst diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c index 01c132bc33d5..4d06de77d92a 100644 --- a/arch/mips/ralink/of.c +++ b/arch/mips/ralink/of.c @@ -64,7 +64,7 @@ void __init plat_mem_setup(void) dtb = get_fdt(); __dt_setup_arch(dtb); - if (!early_init_dt_scan_memory()) + if (early_init_dt_scan_memory()) return; if (soc_info.mem_detect) diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi index 74e17e134387..27714dc2f04a 100644 --- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi @@ -659,3 +659,19 @@ interrupts = <16 2 1 9>; }; }; + +&fman0_rx_0x08 { + /delete-property/ fsl,fman-10g-port; +}; + +&fman0_tx_0x28 { + /delete-property/ fsl,fman-10g-port; +}; + +&fman0_rx_0x09 { + /delete-property/ fsl,fman-10g-port; +}; + +&fman0_tx_0x29 { + /delete-property/ fsl,fman-10g-port; +}; diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S index 8c3862b4c259..958e77a24f85 100644 --- a/arch/powerpc/kernel/vmlinux.lds.S +++ b/arch/powerpc/kernel/vmlinux.lds.S @@ -8,6 +8,7 @@ #define BSS_FIRST_SECTIONS *(.bss.prominit) #define EMITS_PT_NOTE #define RO_EXCEPTION_TABLE_ALIGN 0 +#define RUNTIME_DISCARD_EXIT #define SOFT_MASK_TABLE(align) \ . = ALIGN(align); \ @@ -410,9 +411,12 @@ SECTIONS DISCARDS /DISCARD/ : { *(*.EMB.apuinfo) - *(.glink .iplt .plt .rela* .comment) + *(.glink .iplt .plt) *(.gnu.version*) *(.gnu.attributes) *(.eh_frame) +#ifndef CONFIG_RELOCATABLE + *(.rela*) +#endif } } diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi index 2b7672bc4b52..73941a5f844d 100644 --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi @@ -30,18 +30,6 @@ status = "disabled"; }; -&ostm1 { - status = "disabled"; -}; - -&ostm2 { - status = "disabled"; -}; - &sdhi0 { status = "disabled"; }; - -&wdt0 { - status = "disabled"; -}; diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h index 855450bed9f5..ec0cab9fbddd 100644 --- a/arch/riscv/include/asm/uaccess.h +++ b/arch/riscv/include/asm/uaccess.h @@ -165,7 +165,7 @@ do { \ might_fault(); \ access_ok(__p, sizeof(*__p)) ? \ __get_user((x), __p) : \ - ((x) = 0, -EFAULT); \ + ((x) = (__force __typeof__(x))0, -EFAULT); \ }) #define __put_user_asm(insn, x, ptr, err) \ diff --git a/arch/riscv/kernel/probes/simulate-insn.h b/arch/riscv/kernel/probes/simulate-insn.h index cb6ff7dccb92..de8474146a9b 100644 --- a/arch/riscv/kernel/probes/simulate-insn.h +++ b/arch/riscv/kernel/probes/simulate-insn.h @@ -31,9 +31,9 @@ __RISCV_INSN_FUNCS(fence, 0x7f, 0x0f); } while (0) __RISCV_INSN_FUNCS(c_j, 0xe003, 0xa001); -__RISCV_INSN_FUNCS(c_jr, 0xf007, 0x8002); +__RISCV_INSN_FUNCS(c_jr, 0xf07f, 0x8002); __RISCV_INSN_FUNCS(c_jal, 0xe003, 0x2001); -__RISCV_INSN_FUNCS(c_jalr, 0xf007, 0x9002); +__RISCV_INSN_FUNCS(c_jalr, 0xf07f, 0x9002); __RISCV_INSN_FUNCS(c_beqz, 0xe003, 0xc001); __RISCV_INSN_FUNCS(c_bnez, 0xe003, 0xe001); __RISCV_INSN_FUNCS(c_ebreak, 0xffff, 0x9002); diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index cfd4c95b9f04..669d9e4f2901 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -386,8 +386,8 @@ static int handle_mmio(struct pt_regs *regs, struct ve_info *ve) { unsigned long *reg, val, vaddr; char buffer[MAX_INSN_SIZE]; + enum insn_mmio_type mmio; struct insn insn = {}; - enum mmio_type mmio; int size, extend_size; u8 extend_val = 0; @@ -402,10 +402,10 @@ static int handle_mmio(struct pt_regs *regs, struct ve_info *ve) return -EINVAL; mmio = insn_decode_mmio(&insn, &size); - if (WARN_ON_ONCE(mmio == MMIO_DECODE_FAILED)) + if (WARN_ON_ONCE(mmio == INSN_MMIO_DECODE_FAILED)) return -EINVAL; - if (mmio != MMIO_WRITE_IMM && mmio != MMIO_MOVS) { + if (mmio != INSN_MMIO_WRITE_IMM && mmio != INSN_MMIO_MOVS) { reg = insn_get_modrm_reg_ptr(&insn, regs); if (!reg) return -EINVAL; @@ -426,23 +426,23 @@ static int handle_mmio(struct pt_regs *regs, struct ve_info *ve) /* Handle writes first */ switch (mmio) { - case MMIO_WRITE: + case INSN_MMIO_WRITE: memcpy(&val, reg, size); if (!mmio_write(size, ve->gpa, val)) return -EIO; return insn.length; - case MMIO_WRITE_IMM: + case INSN_MMIO_WRITE_IMM: val = insn.immediate.value; if (!mmio_write(size, ve->gpa, val)) return -EIO; return insn.length; - case MMIO_READ: - case MMIO_READ_ZERO_EXTEND: - case MMIO_READ_SIGN_EXTEND: + case INSN_MMIO_READ: + case INSN_MMIO_READ_ZERO_EXTEND: + case INSN_MMIO_READ_SIGN_EXTEND: /* Reads are handled below */ break; - case MMIO_MOVS: - case MMIO_DECODE_FAILED: + case INSN_MMIO_MOVS: + case INSN_MMIO_DECODE_FAILED: /* * MMIO was accessed with an instruction that could not be * decoded or handled properly. It was likely not using io.h @@ -459,15 +459,15 @@ static int handle_mmio(struct pt_regs *regs, struct ve_info *ve) return -EIO; switch (mmio) { - case MMIO_READ: + case INSN_MMIO_READ: /* Zero-extend for 32-bit operation */ extend_size = size == 4 ? sizeof(*reg) : 0; break; - case MMIO_READ_ZERO_EXTEND: + case INSN_MMIO_READ_ZERO_EXTEND: /* Zero extend based on operand size */ extend_size = insn.opnd_bytes; break; - case MMIO_READ_SIGN_EXTEND: + case INSN_MMIO_READ_SIGN_EXTEND: /* Sign extend based on operand size */ extend_size = insn.opnd_bytes; if (size == 1 && val & BIT(7)) diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c index d6f3703e4119..4386b10682ce 100644 --- a/arch/x86/events/amd/core.c +++ b/arch/x86/events/amd/core.c @@ -1387,7 +1387,7 @@ static int __init amd_core_pmu_init(void) * numbered counter following it. */ for (i = 0; i < x86_pmu.num_counters - 1; i += 2) - even_ctr_mask |= 1 << i; + even_ctr_mask |= BIT_ULL(i); pair_constraint = (struct event_constraint) __EVENT_CONSTRAINT(0, even_ctr_mask, 0, diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index a829492bca4c..52e6e7ed4f78 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -800,13 +800,18 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = { X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &model_hsx), X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &model_skl), X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &model_skl), + X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &model_skl), + X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &model_skl), X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &model_skl), X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &model_skl), X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &model_skl), X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &model_spr), + X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &model_spr), X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &model_skl), X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &model_skl), X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, &model_skl), + X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, &model_skl), + X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, &model_skl), {}, }; MODULE_DEVICE_TABLE(x86cpu, rapl_model_match); diff --git a/arch/x86/include/asm/insn-eval.h b/arch/x86/include/asm/insn-eval.h index f07faa61c7f3..54368a43abf6 100644 --- a/arch/x86/include/asm/insn-eval.h +++ b/arch/x86/include/asm/insn-eval.h @@ -32,16 +32,16 @@ int insn_fetch_from_user_inatomic(struct pt_regs *regs, bool insn_decode_from_regs(struct insn *insn, struct pt_regs *regs, unsigned char buf[MAX_INSN_SIZE], int buf_size); -enum mmio_type { - MMIO_DECODE_FAILED, - MMIO_WRITE, - MMIO_WRITE_IMM, - MMIO_READ, - MMIO_READ_ZERO_EXTEND, - MMIO_READ_SIGN_EXTEND, - MMIO_MOVS, +enum insn_mmio_type { + INSN_MMIO_DECODE_FAILED, + INSN_MMIO_WRITE, + INSN_MMIO_WRITE_IMM, + INSN_MMIO_READ, + INSN_MMIO_READ_ZERO_EXTEND, + INSN_MMIO_READ_SIGN_EXTEND, + INSN_MMIO_MOVS, }; -enum mmio_type insn_decode_mmio(struct insn *insn, int *bytes); +enum insn_mmio_type insn_decode_mmio(struct insn *insn, int *bytes); #endif /* _ASM_X86_INSN_EVAL_H */ diff --git a/arch/x86/kernel/callthunks.c b/arch/x86/kernel/callthunks.c index 7d2c75ec9a8c..ffea98f9064b 100644 --- a/arch/x86/kernel/callthunks.c +++ b/arch/x86/kernel/callthunks.c @@ -119,7 +119,7 @@ static bool is_coretext(const struct core_text *ct, void *addr) return within_module_coretext(addr); } -static __init_or_module bool skip_addr(void *dest) +static bool skip_addr(void *dest) { if (dest == error_entry) return true; @@ -181,7 +181,7 @@ static const u8 nops[] = { 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, }; -static __init_or_module void *patch_dest(void *dest, bool direct) +static void *patch_dest(void *dest, bool direct) { unsigned int tsize = SKL_TMPL_SIZE; u8 *pad = dest - tsize; diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index d970ddb0cc65..bca0bd8f4846 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -1981,6 +1981,8 @@ static int ib_prctl_set(struct task_struct *task, unsigned long ctrl) if (ctrl == PR_SPEC_FORCE_DISABLE) task_set_spec_ib_force_disable(task); task_update_spec_tif(task); + if (task == current) + indirect_branch_prediction_barrier(); break; default: return -ERANGE; diff --git a/arch/x86/kernel/crash.c b/arch/x86/kernel/crash.c index 9730c88530fc..305514431f26 100644 --- a/arch/x86/kernel/crash.c +++ b/arch/x86/kernel/crash.c @@ -401,10 +401,8 @@ int crash_load_segments(struct kimage *image) kbuf.buf_align = ELF_CORE_HEADER_ALIGN; kbuf.mem = KEXEC_BUF_MEM_UNKNOWN; ret = kexec_add_buffer(&kbuf); - if (ret) { - vfree((void *)image->elf_headers); + if (ret) return ret; - } image->elf_load_addr = kbuf.mem; pr_debug("Loaded ELF headers at 0x%lx bufsz=0x%lx memsz=0x%lx\n", image->elf_load_addr, kbuf.bufsz, kbuf.memsz); diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c index 66299682b6b7..b36f3c367cb2 100644 --- a/arch/x86/kernel/kprobes/core.c +++ b/arch/x86/kernel/kprobes/core.c @@ -37,6 +37,7 @@ #include <linux/extable.h> #include <linux/kdebug.h> #include <linux/kallsyms.h> +#include <linux/kgdb.h> #include <linux/ftrace.h> #include <linux/kasan.h> #include <linux/moduleloader.h> @@ -281,12 +282,15 @@ static int can_probe(unsigned long paddr) if (ret < 0) return 0; +#ifdef CONFIG_KGDB /* - * Another debugging subsystem might insert this breakpoint. - * In that case, we can't recover it. + * If there is a dynamically installed kgdb sw breakpoint, + * this function should not be probed. */ - if (insn.opcode.bytes[0] == INT3_INSN_OPCODE) + if (insn.opcode.bytes[0] == INT3_INSN_OPCODE && + kgdb_has_hit_break(addr)) return 0; +#endif addr += insn.length; } diff --git a/arch/x86/kernel/kprobes/opt.c b/arch/x86/kernel/kprobes/opt.c index e6b8c5362b94..e57e07b0edb6 100644 --- a/arch/x86/kernel/kprobes/opt.c +++ b/arch/x86/kernel/kprobes/opt.c @@ -15,6 +15,7 @@ #include <linux/extable.h> #include <linux/kdebug.h> #include <linux/kallsyms.h> +#include <linux/kgdb.h> #include <linux/ftrace.h> #include <linux/objtool.h> #include <linux/pgtable.h> @@ -279,19 +280,6 @@ static int insn_is_indirect_jump(struct insn *insn) return ret; } -static bool is_padding_int3(unsigned long addr, unsigned long eaddr) -{ - unsigned char ops; - - for (; addr < eaddr; addr++) { - if (get_kernel_nofault(ops, (void *)addr) < 0 || - ops != INT3_INSN_OPCODE) - return false; - } - - return true; -} - /* Decode whole function to ensure any instructions don't jump into target */ static int can_optimize(unsigned long paddr) { @@ -334,15 +322,15 @@ static int can_optimize(unsigned long paddr) ret = insn_decode_kernel(&insn, (void *)recovered_insn); if (ret < 0) return 0; - +#ifdef CONFIG_KGDB /* - * In the case of detecting unknown breakpoint, this could be - * a padding INT3 between functions. Let's check that all the - * rest of the bytes are also INT3. + * If there is a dynamically installed kgdb sw breakpoint, + * this function should not be probed. */ - if (insn.opcode.bytes[0] == INT3_INSN_OPCODE) - return is_padding_int3(addr, paddr - offset + size) ? 1 : 0; - + if (insn.opcode.bytes[0] == INT3_INSN_OPCODE && + kgdb_has_hit_break(addr)) + return 0; +#endif /* Recover address */ insn.kaddr = (void *)addr; insn.next_byte = (void *)(addr + insn.length); diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index a428c62330d3..679026a640ef 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -1536,32 +1536,32 @@ static enum es_result vc_handle_mmio_movs(struct es_em_ctxt *ctxt, static enum es_result vc_handle_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt) { struct insn *insn = &ctxt->insn; + enum insn_mmio_type mmio; unsigned int bytes = 0; - enum mmio_type mmio; enum es_result ret; u8 sign_byte; long *reg_data; mmio = insn_decode_mmio(insn, &bytes); - if (mmio == MMIO_DECODE_FAILED) + if (mmio == INSN_MMIO_DECODE_FAILED) return ES_DECODE_FAILED; - if (mmio != MMIO_WRITE_IMM && mmio != MMIO_MOVS) { + if (mmio != INSN_MMIO_WRITE_IMM && mmio != INSN_MMIO_MOVS) { reg_data = insn_get_modrm_reg_ptr(insn, ctxt->regs); if (!reg_data) return ES_DECODE_FAILED; } switch (mmio) { - case MMIO_WRITE: + case INSN_MMIO_WRITE: memcpy(ghcb->shared_buffer, reg_data, bytes); ret = vc_do_mmio(ghcb, ctxt, bytes, false); break; - case MMIO_WRITE_IMM: + case INSN_MMIO_WRITE_IMM: memcpy(ghcb->shared_buffer, insn->immediate1.bytes, bytes); ret = vc_do_mmio(ghcb, ctxt, bytes, false); break; - case MMIO_READ: + case INSN_MMIO_READ: ret = vc_do_mmio(ghcb, ctxt, bytes, true); if (ret) break; @@ -1572,7 +1572,7 @@ static enum es_result vc_handle_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt) memcpy(reg_data, ghcb->shared_buffer, bytes); break; - case MMIO_READ_ZERO_EXTEND: + case INSN_MMIO_READ_ZERO_EXTEND: ret = vc_do_mmio(ghcb, ctxt, bytes, true); if (ret) break; @@ -1581,7 +1581,7 @@ static enum es_result vc_handle_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt) memset(reg_data, 0, insn->opnd_bytes); memcpy(reg_data, ghcb->shared_buffer, bytes); break; - case MMIO_READ_SIGN_EXTEND: + case INSN_MMIO_READ_SIGN_EXTEND: ret = vc_do_mmio(ghcb, ctxt, bytes, true); if (ret) break; @@ -1600,7 +1600,7 @@ static enum es_result vc_handle_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt) memset(reg_data, sign_byte, insn->opnd_bytes); memcpy(reg_data, ghcb->shared_buffer, bytes); break; - case MMIO_MOVS: + case INSN_MMIO_MOVS: ret = vc_handle_mmio_movs(ctxt, bytes); break; default: diff --git a/arch/x86/kvm/hyperv.c b/arch/x86/kvm/hyperv.c index 2c7f2a26421e..e8296942a868 100644 --- a/arch/x86/kvm/hyperv.c +++ b/arch/x86/kvm/hyperv.c @@ -1769,6 +1769,7 @@ static bool hv_is_vp_in_sparse_set(u32 vp_id, u64 valid_bank_mask, u64 sparse_ba } struct kvm_hv_hcall { + /* Hypercall input data */ u64 param; u64 ingpa; u64 outgpa; @@ -1779,12 +1780,21 @@ struct kvm_hv_hcall { bool fast; bool rep; sse128_t xmm[HV_HYPERCALL_MAX_XMM_REGISTERS]; + + /* + * Current read offset when KVM reads hypercall input data gradually, + * either offset in bytes from 'ingpa' for regular hypercalls or the + * number of already consumed 'XMM halves' for 'fast' hypercalls. + */ + union { + gpa_t data_offset; + int consumed_xmm_halves; + }; }; static int kvm_hv_get_hc_data(struct kvm *kvm, struct kvm_hv_hcall *hc, - u16 orig_cnt, u16 cnt_cap, u64 *data, - int consumed_xmm_halves, gpa_t offset) + u16 orig_cnt, u16 cnt_cap, u64 *data) { /* * Preserve the original count when ignoring entries via a "cap", KVM @@ -1799,11 +1809,11 @@ static int kvm_hv_get_hc_data(struct kvm *kvm, struct kvm_hv_hcall *hc, * Each XMM holds two sparse banks, but do not count halves that * have already been consumed for hypercall parameters. */ - if (orig_cnt > 2 * HV_HYPERCALL_MAX_XMM_REGISTERS - consumed_xmm_halves) + if (orig_cnt > 2 * HV_HYPERCALL_MAX_XMM_REGISTERS - hc->consumed_xmm_halves) return HV_STATUS_INVALID_HYPERCALL_INPUT; for (i = 0; i < cnt; i++) { - j = i + consumed_xmm_halves; + j = i + hc->consumed_xmm_halves; if (j % 2) data[i] = sse128_hi(hc->xmm[j / 2]); else @@ -1812,27 +1822,24 @@ static int kvm_hv_get_hc_data(struct kvm *kvm, struct kvm_hv_hcall *hc, return 0; } - return kvm_read_guest(kvm, hc->ingpa + offset, data, + return kvm_read_guest(kvm, hc->ingpa + hc->data_offset, data, cnt * sizeof(*data)); } static u64 kvm_get_sparse_vp_set(struct kvm *kvm, struct kvm_hv_hcall *hc, - u64 *sparse_banks, int consumed_xmm_halves, - gpa_t offset) + u64 *sparse_banks) { if (hc->var_cnt > HV_MAX_SPARSE_VCPU_BANKS) return -EINVAL; /* Cap var_cnt to ignore banks that cannot contain a legal VP index. */ return kvm_hv_get_hc_data(kvm, hc, hc->var_cnt, KVM_HV_MAX_SPARSE_VCPU_SET_BITS, - sparse_banks, consumed_xmm_halves, offset); + sparse_banks); } -static int kvm_hv_get_tlb_flush_entries(struct kvm *kvm, struct kvm_hv_hcall *hc, u64 entries[], - int consumed_xmm_halves, gpa_t offset) +static int kvm_hv_get_tlb_flush_entries(struct kvm *kvm, struct kvm_hv_hcall *hc, u64 entries[]) { - return kvm_hv_get_hc_data(kvm, hc, hc->rep_cnt, hc->rep_cnt, - entries, consumed_xmm_halves, offset); + return kvm_hv_get_hc_data(kvm, hc, hc->rep_cnt, hc->rep_cnt, entries); } static void hv_tlb_flush_enqueue(struct kvm_vcpu *vcpu, @@ -1926,8 +1933,6 @@ static u64 kvm_hv_flush_tlb(struct kvm_vcpu *vcpu, struct kvm_hv_hcall *hc) struct kvm_vcpu *v; unsigned long i; bool all_cpus; - int consumed_xmm_halves = 0; - gpa_t data_offset; /* * The Hyper-V TLFS doesn't allow more than HV_MAX_SPARSE_VCPU_BANKS @@ -1955,12 +1960,12 @@ static u64 kvm_hv_flush_tlb(struct kvm_vcpu *vcpu, struct kvm_hv_hcall *hc) flush.address_space = hc->ingpa; flush.flags = hc->outgpa; flush.processor_mask = sse128_lo(hc->xmm[0]); - consumed_xmm_halves = 1; + hc->consumed_xmm_halves = 1; } else { if (unlikely(kvm_read_guest(kvm, hc->ingpa, &flush, sizeof(flush)))) return HV_STATUS_INVALID_HYPERCALL_INPUT; - data_offset = sizeof(flush); + hc->data_offset = sizeof(flush); } trace_kvm_hv_flush_tlb(flush.processor_mask, @@ -1985,12 +1990,12 @@ static u64 kvm_hv_flush_tlb(struct kvm_vcpu *vcpu, struct kvm_hv_hcall *hc) flush_ex.flags = hc->outgpa; memcpy(&flush_ex.hv_vp_set, &hc->xmm[0], sizeof(hc->xmm[0])); - consumed_xmm_halves = 2; + hc->consumed_xmm_halves = 2; } else { if (unlikely(kvm_read_guest(kvm, hc->ingpa, &flush_ex, sizeof(flush_ex)))) return HV_STATUS_INVALID_HYPERCALL_INPUT; - data_offset = sizeof(flush_ex); + hc->data_offset = sizeof(flush_ex); } trace_kvm_hv_flush_tlb_ex(flush_ex.hv_vp_set.valid_bank_mask, @@ -2009,8 +2014,7 @@ static u64 kvm_hv_flush_tlb(struct kvm_vcpu *vcpu, struct kvm_hv_hcall *hc) if (!hc->var_cnt) goto ret_success; - if (kvm_get_sparse_vp_set(kvm, hc, sparse_banks, - consumed_xmm_halves, data_offset)) + if (kvm_get_sparse_vp_set(kvm, hc, sparse_banks)) return HV_STATUS_INVALID_HYPERCALL_INPUT; } @@ -2021,8 +2025,10 @@ static u64 kvm_hv_flush_tlb(struct kvm_vcpu *vcpu, struct kvm_hv_hcall *hc) * consumed_xmm_halves to make sure TLB flush entries are read * from the correct offset. */ - data_offset += hc->var_cnt * sizeof(sparse_banks[0]); - consumed_xmm_halves += hc->var_cnt; + if (hc->fast) + hc->consumed_xmm_halves += hc->var_cnt; + else + hc->data_offset += hc->var_cnt * sizeof(sparse_banks[0]); } if (hc->code == HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE || @@ -2030,8 +2036,7 @@ static u64 kvm_hv_flush_tlb(struct kvm_vcpu *vcpu, struct kvm_hv_hcall *hc) hc->rep_cnt > ARRAY_SIZE(__tlb_flush_entries)) { tlb_flush_entries = NULL; } else { - if (kvm_hv_get_tlb_flush_entries(kvm, hc, __tlb_flush_entries, - consumed_xmm_halves, data_offset)) + if (kvm_hv_get_tlb_flush_entries(kvm, hc, __tlb_flush_entries)) return HV_STATUS_INVALID_HYPERCALL_INPUT; tlb_flush_entries = __tlb_flush_entries; } @@ -2180,9 +2185,13 @@ static u64 kvm_hv_send_ipi(struct kvm_vcpu *vcpu, struct kvm_hv_hcall *hc) if (!hc->var_cnt) goto ret_success; - if (kvm_get_sparse_vp_set(kvm, hc, sparse_banks, 1, - offsetof(struct hv_send_ipi_ex, - vp_set.bank_contents))) + if (!hc->fast) + hc->data_offset = offsetof(struct hv_send_ipi_ex, + vp_set.bank_contents); + else + hc->consumed_xmm_halves = 1; + + if (kvm_get_sparse_vp_set(kvm, hc, sparse_banks)) return HV_STATUS_INVALID_HYPERCALL_INPUT; } diff --git a/arch/x86/kvm/irq_comm.c b/arch/x86/kvm/irq_comm.c index 0687162c4f22..3742d9adacfc 100644 --- a/arch/x86/kvm/irq_comm.c +++ b/arch/x86/kvm/irq_comm.c @@ -426,8 +426,9 @@ void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, kvm_set_msi_irq(vcpu->kvm, entry, &irq); if (irq.trig_mode && - kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT, - irq.dest_id, irq.dest_mode)) + (kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT, + irq.dest_id, irq.dest_mode) || + kvm_apic_pending_eoi(vcpu, irq.vector))) __set_bit(irq.vector, ioapic_handled_vectors); } } diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h index 28e3769066e2..58c3242fcc7a 100644 --- a/arch/x86/kvm/lapic.h +++ b/arch/x86/kvm/lapic.h @@ -188,11 +188,11 @@ static inline bool lapic_in_kernel(struct kvm_vcpu *vcpu) extern struct static_key_false_deferred apic_hw_disabled; -static inline int kvm_apic_hw_enabled(struct kvm_lapic *apic) +static inline bool kvm_apic_hw_enabled(struct kvm_lapic *apic) { if (static_branch_unlikely(&apic_hw_disabled.key)) return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; - return MSR_IA32_APICBASE_ENABLE; + return true; } extern struct static_key_false_deferred apic_sw_disabled; diff --git a/arch/x86/kvm/mmu/spte.h b/arch/x86/kvm/mmu/spte.h index 1f03701b943a..6f54dc9409c9 100644 --- a/arch/x86/kvm/mmu/spte.h +++ b/arch/x86/kvm/mmu/spte.h @@ -363,7 +363,7 @@ static __always_inline bool is_rsvd_spte(struct rsvd_bits_validate *rsvd_check, * A shadow-present leaf SPTE may be non-writable for 4 possible reasons: * * 1. To intercept writes for dirty logging. KVM write-protects huge pages - * so that they can be split be split down into the dirty logging + * so that they can be split down into the dirty logging * granularity (4KiB) whenever the guest writes to them. KVM also * write-protects 4KiB pages so that writes can be recorded in the dirty log * (e.g. if not using PML). SPTEs are write-protected for dirty logging diff --git a/arch/x86/kvm/mmu/tdp_mmu.c b/arch/x86/kvm/mmu/tdp_mmu.c index 771210ce5181..d6df38d371a0 100644 --- a/arch/x86/kvm/mmu/tdp_mmu.c +++ b/arch/x86/kvm/mmu/tdp_mmu.c @@ -1074,7 +1074,9 @@ static int tdp_mmu_map_handle_target_level(struct kvm_vcpu *vcpu, int ret = RET_PF_FIXED; bool wrprot = false; - WARN_ON(sp->role.level != fault->goal_level); + if (WARN_ON_ONCE(sp->role.level != fault->goal_level)) + return RET_PF_RETRY; + if (unlikely(!fault->slot)) new_spte = make_mmio_spte(vcpu, iter->gfn, ACC_ALL); else @@ -1173,9 +1175,6 @@ int kvm_tdp_mmu_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) if (fault->nx_huge_page_workaround_enabled) disallowed_hugepage_adjust(fault, iter.old_spte, iter.level); - if (iter.level == fault->goal_level) - break; - /* * If SPTE has been frozen by another thread, just give up and * retry, avoiding unnecessary page table allocation and free. @@ -1183,6 +1182,9 @@ int kvm_tdp_mmu_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) if (is_removed_spte(iter.old_spte)) goto retry; + if (iter.level == fault->goal_level) + goto map_target_level; + /* Step down into the lower level page table if it exists. */ if (is_shadow_present_pte(iter.old_spte) && !is_large_pte(iter.old_spte)) @@ -1203,8 +1205,8 @@ int kvm_tdp_mmu_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) r = tdp_mmu_link_sp(kvm, &iter, sp, true); /* - * Also force the guest to retry the access if the upper level SPTEs - * aren't in place. + * Force the guest to retry if installing an upper level SPTE + * failed, e.g. because a different task modified the SPTE. */ if (r) { tdp_mmu_free_sp(sp); @@ -1214,11 +1216,20 @@ int kvm_tdp_mmu_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault) if (fault->huge_page_disallowed && fault->req_level >= iter.level) { spin_lock(&kvm->arch.tdp_mmu_pages_lock); - track_possible_nx_huge_page(kvm, sp); + if (sp->nx_huge_page_disallowed) + track_possible_nx_huge_page(kvm, sp); spin_unlock(&kvm->arch.tdp_mmu_pages_lock); } } + /* + * The walk aborted before reaching the target level, e.g. because the + * iterator detected an upper level SPTE was frozen during traversal. + */ + WARN_ON_ONCE(iter.level == fault->goal_level); + goto retry; + +map_target_level: ret = tdp_mmu_map_handle_target_level(vcpu, fault, &iter); retry: diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c index 684393c22105..eb594620dd75 100644 --- a/arch/x86/kvm/pmu.c +++ b/arch/x86/kvm/pmu.c @@ -238,7 +238,8 @@ static bool pmc_resume_counter(struct kvm_pmc *pmc) return false; /* recalibrate sample period and check if it's accepted by perf core */ - if (perf_event_period(pmc->perf_event, + if (is_sampling_event(pmc->perf_event) && + perf_event_period(pmc->perf_event, get_sample_period(pmc, pmc->counter))) return false; diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h index 85ff3c0588ba..cdb91009701d 100644 --- a/arch/x86/kvm/pmu.h +++ b/arch/x86/kvm/pmu.h @@ -140,7 +140,8 @@ static inline u64 get_sample_period(struct kvm_pmc *pmc, u64 counter_value) static inline void pmc_update_sample_period(struct kvm_pmc *pmc) { - if (!pmc->perf_event || pmc->is_paused) + if (!pmc->perf_event || pmc->is_paused || + !is_sampling_event(pmc->perf_event)) return; perf_event_period(pmc->perf_event, diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index b6f4411b613e..d93c715cda6a 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -5296,10 +5296,19 @@ static int handle_vmclear(struct kvm_vcpu *vcpu) if (vmptr == vmx->nested.current_vmptr) nested_release_vmcs12(vcpu); - kvm_vcpu_write_guest(vcpu, - vmptr + offsetof(struct vmcs12, - launch_state), - &zero, sizeof(zero)); + /* + * Silently ignore memory errors on VMCLEAR, Intel's pseudocode + * for VMCLEAR includes a "ensure that data for VMCS referenced + * by the operand is in memory" clause that guards writes to + * memory, i.e. doing nothing for I/O is architecturally valid. + * + * FIXME: Suppress failures if and only if no memslot is found, + * i.e. exit to userspace if __copy_to_user() fails. + */ + (void)kvm_vcpu_write_guest(vcpu, + vmptr + offsetof(struct vmcs12, + launch_state), + &zero, sizeof(zero)); } else if (vmx->nested.hv_evmcs && vmptr == vmx->nested.hv_evmcs_vmptr) { nested_release_evmcs(vcpu); } @@ -6873,7 +6882,8 @@ void nested_vmx_setup_ctls_msrs(struct vmcs_config *vmcs_conf, u32 ept_caps) SECONDARY_EXEC_ENABLE_INVPCID | SECONDARY_EXEC_RDSEED_EXITING | SECONDARY_EXEC_XSAVES | - SECONDARY_EXEC_TSC_SCALING; + SECONDARY_EXEC_TSC_SCALING | + SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE; /* * We can emulate "VMCS shadowing," even if the hardware diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index fe5615fd8295..fc9008dbed33 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -4459,6 +4459,13 @@ vmx_adjust_secondary_exec_control(struct vcpu_vmx *vmx, u32 *exec_control, * controls for features that are/aren't exposed to the guest. */ if (nested) { + /* + * All features that can be added or removed to VMX MSRs must + * be supported in the first place for nested virtualization. + */ + if (WARN_ON_ONCE(!(vmcs_config.nested.secondary_ctls_high & control))) + enabled = false; + if (enabled) vmx->nested.msrs.secondary_ctls_high |= control; else diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 312aea1854ae..da4bbd043a7b 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -13132,6 +13132,9 @@ int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r, struct x86_exception *e) { if (r == X86EMUL_PROPAGATE_FAULT) { + if (KVM_BUG_ON(!e, vcpu->kvm)) + return -EIO; + kvm_inject_emulated_page_fault(vcpu, e); return 1; } diff --git a/arch/x86/kvm/xen.c b/arch/x86/kvm/xen.c index d7af40240248..2e29bdc2949c 100644 --- a/arch/x86/kvm/xen.c +++ b/arch/x86/kvm/xen.c @@ -41,7 +41,7 @@ static int kvm_xen_shared_info_init(struct kvm *kvm, gfn_t gfn) int ret = 0; int idx = srcu_read_lock(&kvm->srcu); - if (gfn == GPA_INVALID) { + if (gfn == KVM_XEN_INVALID_GFN) { kvm_gpc_deactivate(gpc); goto out; } @@ -659,7 +659,7 @@ int kvm_xen_hvm_get_attr(struct kvm *kvm, struct kvm_xen_hvm_attr *data) if (kvm->arch.xen.shinfo_cache.active) data->u.shared_info.gfn = gpa_to_gfn(kvm->arch.xen.shinfo_cache.gpa); else - data->u.shared_info.gfn = GPA_INVALID; + data->u.shared_info.gfn = KVM_XEN_INVALID_GFN; r = 0; break; @@ -705,7 +705,7 @@ int kvm_xen_vcpu_set_attr(struct kvm_vcpu *vcpu, struct kvm_xen_vcpu_attr *data) BUILD_BUG_ON(offsetof(struct vcpu_info, time) != offsetof(struct compat_vcpu_info, time)); - if (data->u.gpa == GPA_INVALID) { + if (data->u.gpa == KVM_XEN_INVALID_GPA) { kvm_gpc_deactivate(&vcpu->arch.xen.vcpu_info_cache); r = 0; break; @@ -719,7 +719,7 @@ int kvm_xen_vcpu_set_attr(struct kvm_vcpu *vcpu, struct kvm_xen_vcpu_attr *data) break; case KVM_XEN_VCPU_ATTR_TYPE_VCPU_TIME_INFO: - if (data->u.gpa == GPA_INVALID) { + if (data->u.gpa == KVM_XEN_INVALID_GPA) { kvm_gpc_deactivate(&vcpu->arch.xen.vcpu_time_info_cache); r = 0; break; @@ -739,7 +739,7 @@ int kvm_xen_vcpu_set_attr(struct kvm_vcpu *vcpu, struct kvm_xen_vcpu_attr *data) r = -EOPNOTSUPP; break; } - if (data->u.gpa == GPA_INVALID) { + if (data->u.gpa == KVM_XEN_INVALID_GPA) { r = 0; deactivate_out: kvm_gpc_deactivate(&vcpu->arch.xen.runstate_cache); @@ -937,7 +937,7 @@ int kvm_xen_vcpu_get_attr(struct kvm_vcpu *vcpu, struct kvm_xen_vcpu_attr *data) if (vcpu->arch.xen.vcpu_info_cache.active) data->u.gpa = vcpu->arch.xen.vcpu_info_cache.gpa; else - data->u.gpa = GPA_INVALID; + data->u.gpa = KVM_XEN_INVALID_GPA; r = 0; break; @@ -945,7 +945,7 @@ int kvm_xen_vcpu_get_attr(struct kvm_vcpu *vcpu, struct kvm_xen_vcpu_attr *data) if (vcpu->arch.xen.vcpu_time_info_cache.active) data->u.gpa = vcpu->arch.xen.vcpu_time_info_cache.gpa; else - data->u.gpa = GPA_INVALID; + data->u.gpa = KVM_XEN_INVALID_GPA; r = 0; break; @@ -1069,6 +1069,7 @@ int kvm_xen_write_hypercall_page(struct kvm_vcpu *vcpu, u64 data) u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64 : kvm->arch.xen_hvm_config.blob_size_32; u8 *page; + int ret; if (page_num >= blob_size) return 1; @@ -1079,10 +1080,10 @@ int kvm_xen_write_hypercall_page(struct kvm_vcpu *vcpu, u64 data) if (IS_ERR(page)) return PTR_ERR(page); - if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE)) { - kfree(page); + ret = kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE); + kfree(page); + if (ret) return 1; - } } return 0; } @@ -1183,30 +1184,22 @@ static bool wait_pending_event(struct kvm_vcpu *vcpu, int nr_ports, static bool kvm_xen_schedop_poll(struct kvm_vcpu *vcpu, bool longmode, u64 param, u64 *r) { - int idx, i; struct sched_poll sched_poll; evtchn_port_t port, *ports; - gpa_t gpa; + struct x86_exception e; + int i; if (!lapic_in_kernel(vcpu) || !(vcpu->kvm->arch.xen_hvm_config.flags & KVM_XEN_HVM_CONFIG_EVTCHN_SEND)) return false; - idx = srcu_read_lock(&vcpu->kvm->srcu); - gpa = kvm_mmu_gva_to_gpa_system(vcpu, param, NULL); - srcu_read_unlock(&vcpu->kvm->srcu, idx); - if (!gpa) { - *r = -EFAULT; - return true; - } - if (IS_ENABLED(CONFIG_64BIT) && !longmode) { struct compat_sched_poll sp32; /* Sanity check that the compat struct definition is correct */ BUILD_BUG_ON(sizeof(sp32) != 16); - if (kvm_vcpu_read_guest(vcpu, gpa, &sp32, sizeof(sp32))) { + if (kvm_read_guest_virt(vcpu, param, &sp32, sizeof(sp32), &e)) { *r = -EFAULT; return true; } @@ -1220,8 +1213,8 @@ static bool kvm_xen_schedop_poll(struct kvm_vcpu *vcpu, bool longmode, sched_poll.nr_ports = sp32.nr_ports; sched_poll.timeout = sp32.timeout; } else { - if (kvm_vcpu_read_guest(vcpu, gpa, &sched_poll, - sizeof(sched_poll))) { + if (kvm_read_guest_virt(vcpu, param, &sched_poll, + sizeof(sched_poll), &e)) { *r = -EFAULT; return true; } @@ -1243,18 +1236,13 @@ static bool kvm_xen_schedop_poll(struct kvm_vcpu *vcpu, bool longmode, } else ports = &port; + if (kvm_read_guest_virt(vcpu, (gva_t)sched_poll.ports, ports, + sched_poll.nr_ports * sizeof(*ports), &e)) { + *r = -EFAULT; + return true; + } + for (i = 0; i < sched_poll.nr_ports; i++) { - idx = srcu_read_lock(&vcpu->kvm->srcu); - gpa = kvm_mmu_gva_to_gpa_system(vcpu, - (gva_t)(sched_poll.ports + i), - NULL); - srcu_read_unlock(&vcpu->kvm->srcu, idx); - - if (!gpa || kvm_vcpu_read_guest(vcpu, gpa, - &ports[i], sizeof(port))) { - *r = -EFAULT; - goto out; - } if (ports[i] >= max_evtchn_port(vcpu->kvm)) { *r = -EINVAL; goto out; @@ -1330,9 +1318,8 @@ static bool kvm_xen_hcall_vcpu_op(struct kvm_vcpu *vcpu, bool longmode, int cmd, int vcpu_id, u64 param, u64 *r) { struct vcpu_set_singleshot_timer oneshot; + struct x86_exception e; s64 delta; - gpa_t gpa; - int idx; if (!kvm_xen_timer_enabled(vcpu)) return false; @@ -1343,9 +1330,6 @@ static bool kvm_xen_hcall_vcpu_op(struct kvm_vcpu *vcpu, bool longmode, int cmd, *r = -EINVAL; return true; } - idx = srcu_read_lock(&vcpu->kvm->srcu); - gpa = kvm_mmu_gva_to_gpa_system(vcpu, param, NULL); - srcu_read_unlock(&vcpu->kvm->srcu, idx); /* * The only difference for 32-bit compat is the 4 bytes of @@ -1363,9 +1347,8 @@ static bool kvm_xen_hcall_vcpu_op(struct kvm_vcpu *vcpu, bool longmode, int cmd, BUILD_BUG_ON(sizeof_field(struct compat_vcpu_set_singleshot_timer, flags) != sizeof_field(struct vcpu_set_singleshot_timer, flags)); - if (!gpa || - kvm_vcpu_read_guest(vcpu, gpa, &oneshot, longmode ? sizeof(oneshot) : - sizeof(struct compat_vcpu_set_singleshot_timer))) { + if (kvm_read_guest_virt(vcpu, param, &oneshot, longmode ? sizeof(oneshot) : + sizeof(struct compat_vcpu_set_singleshot_timer), &e)) { *r = -EFAULT; return true; } @@ -1825,20 +1808,20 @@ static int kvm_xen_eventfd_update(struct kvm *kvm, { u32 port = data->u.evtchn.send_port; struct evtchnfd *evtchnfd; + int ret; - if (!port || port >= max_evtchn_port(kvm)) - return -EINVAL; - + /* Protect writes to evtchnfd as well as the idr lookup. */ mutex_lock(&kvm->lock); evtchnfd = idr_find(&kvm->arch.xen.evtchn_ports, port); - mutex_unlock(&kvm->lock); + ret = -ENOENT; if (!evtchnfd) - return -ENOENT; + goto out_unlock; /* For an UPDATE, nothing may change except the priority/vcpu */ + ret = -EINVAL; if (evtchnfd->type != data->u.evtchn.type) - return -EINVAL; + goto out_unlock; /* * Port cannot change, and if it's zero that was an eventfd @@ -1846,20 +1829,21 @@ static int kvm_xen_eventfd_update(struct kvm *kvm, */ if (!evtchnfd->deliver.port.port || evtchnfd->deliver.port.port != data->u.evtchn.deliver.port.port) - return -EINVAL; + goto out_unlock; /* We only support 2 level event channels for now */ if (data->u.evtchn.deliver.port.priority != KVM_IRQ_ROUTING_XEN_EVTCHN_PRIO_2LEVEL) - return -EINVAL; + goto out_unlock; - mutex_lock(&kvm->lock); evtchnfd->deliver.port.priority = data->u.evtchn.deliver.port.priority; if (evtchnfd->deliver.port.vcpu_id != data->u.evtchn.deliver.port.vcpu) { evtchnfd->deliver.port.vcpu_id = data->u.evtchn.deliver.port.vcpu; evtchnfd->deliver.port.vcpu_idx = -1; } + ret = 0; +out_unlock: mutex_unlock(&kvm->lock); - return 0; + return ret; } /* @@ -1871,12 +1855,9 @@ static int kvm_xen_eventfd_assign(struct kvm *kvm, { u32 port = data->u.evtchn.send_port; struct eventfd_ctx *eventfd = NULL; - struct evtchnfd *evtchnfd = NULL; + struct evtchnfd *evtchnfd; int ret = -EINVAL; - if (!port || port >= max_evtchn_port(kvm)) - return -EINVAL; - evtchnfd = kzalloc(sizeof(struct evtchnfd), GFP_KERNEL); if (!evtchnfd) return -ENOMEM; @@ -1952,8 +1933,7 @@ static int kvm_xen_eventfd_deassign(struct kvm *kvm, u32 port) if (!evtchnfd) return -ENOENT; - if (kvm) - synchronize_srcu(&kvm->srcu); + synchronize_srcu(&kvm->srcu); if (!evtchnfd->deliver.port.port) eventfd_ctx_put(evtchnfd->deliver.eventfd.ctx); kfree(evtchnfd); @@ -1962,18 +1942,42 @@ static int kvm_xen_eventfd_deassign(struct kvm *kvm, u32 port) static int kvm_xen_eventfd_reset(struct kvm *kvm) { - struct evtchnfd *evtchnfd; + struct evtchnfd *evtchnfd, **all_evtchnfds; int i; + int n = 0; mutex_lock(&kvm->lock); + + /* + * Because synchronize_srcu() cannot be called inside the + * critical section, first collect all the evtchnfd objects + * in an array as they are removed from evtchn_ports. + */ + idr_for_each_entry(&kvm->arch.xen.evtchn_ports, evtchnfd, i) + n++; + + all_evtchnfds = kmalloc_array(n, sizeof(struct evtchnfd *), GFP_KERNEL); + if (!all_evtchnfds) { + mutex_unlock(&kvm->lock); + return -ENOMEM; + } + + n = 0; idr_for_each_entry(&kvm->arch.xen.evtchn_ports, evtchnfd, i) { + all_evtchnfds[n++] = evtchnfd; idr_remove(&kvm->arch.xen.evtchn_ports, evtchnfd->send_port); - synchronize_srcu(&kvm->srcu); + } + mutex_unlock(&kvm->lock); + + synchronize_srcu(&kvm->srcu); + + while (n--) { + evtchnfd = all_evtchnfds[n]; if (!evtchnfd->deliver.port.port) eventfd_ctx_put(evtchnfd->deliver.eventfd.ctx); kfree(evtchnfd); } - mutex_unlock(&kvm->lock); + kfree(all_evtchnfds); return 0; } @@ -2002,20 +2006,22 @@ static bool kvm_xen_hcall_evtchn_send(struct kvm_vcpu *vcpu, u64 param, u64 *r) { struct evtchnfd *evtchnfd; struct evtchn_send send; - gpa_t gpa; - int idx; - - idx = srcu_read_lock(&vcpu->kvm->srcu); - gpa = kvm_mmu_gva_to_gpa_system(vcpu, param, NULL); - srcu_read_unlock(&vcpu->kvm->srcu, idx); + struct x86_exception e; - if (!gpa || kvm_vcpu_read_guest(vcpu, gpa, &send, sizeof(send))) { + /* Sanity check: this structure is the same for 32-bit and 64-bit */ + BUILD_BUG_ON(sizeof(send) != 4); + if (kvm_read_guest_virt(vcpu, param, &send, sizeof(send), &e)) { *r = -EFAULT; return true; } - /* The evtchn_ports idr is protected by vcpu->kvm->srcu */ + /* + * evtchnfd is protected by kvm->srcu; the idr lookup instead + * is protected by RCU. + */ + rcu_read_lock(); evtchnfd = idr_find(&vcpu->kvm->arch.xen.evtchn_ports, send.port); + rcu_read_unlock(); if (!evtchnfd) return false; diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c index 21104c41cba0..558a605929db 100644 --- a/arch/x86/lib/insn-eval.c +++ b/arch/x86/lib/insn-eval.c @@ -1595,16 +1595,16 @@ bool insn_decode_from_regs(struct insn *insn, struct pt_regs *regs, * Returns: * * Type of the instruction. Size of the memory operand is stored in - * @bytes. If decode failed, MMIO_DECODE_FAILED returned. + * @bytes. If decode failed, INSN_MMIO_DECODE_FAILED returned. */ -enum mmio_type insn_decode_mmio(struct insn *insn, int *bytes) +enum insn_mmio_type insn_decode_mmio(struct insn *insn, int *bytes) { - enum mmio_type type = MMIO_DECODE_FAILED; + enum insn_mmio_type type = INSN_MMIO_DECODE_FAILED; *bytes = 0; if (insn_get_opcode(insn)) - return MMIO_DECODE_FAILED; + return INSN_MMIO_DECODE_FAILED; switch (insn->opcode.bytes[0]) { case 0x88: /* MOV m8,r8 */ @@ -1613,7 +1613,7 @@ enum mmio_type insn_decode_mmio(struct insn *insn, int *bytes) case 0x89: /* MOV m16/m32/m64, r16/m32/m64 */ if (!*bytes) *bytes = insn->opnd_bytes; - type = MMIO_WRITE; + type = INSN_MMIO_WRITE; break; case 0xc6: /* MOV m8, imm8 */ @@ -1622,7 +1622,7 @@ enum mmio_type insn_decode_mmio(struct insn *insn, int *bytes) case 0xc7: /* MOV m16/m32/m64, imm16/imm32/imm64 */ if (!*bytes) *bytes = insn->opnd_bytes; - type = MMIO_WRITE_IMM; + type = INSN_MMIO_WRITE_IMM; break; case 0x8a: /* MOV r8, m8 */ @@ -1631,7 +1631,7 @@ enum mmio_type insn_decode_mmio(struct insn *insn, int *bytes) case 0x8b: /* MOV r16/r32/r64, m16/m32/m64 */ if (!*bytes) *bytes = insn->opnd_bytes; - type = MMIO_READ; + type = INSN_MMIO_READ; break; case 0xa4: /* MOVS m8, m8 */ @@ -1640,7 +1640,7 @@ enum mmio_type insn_decode_mmio(struct insn *insn, int *bytes) case 0xa5: /* MOVS m16/m32/m64, m16/m32/m64 */ if (!*bytes) *bytes = insn->opnd_bytes; - type = MMIO_MOVS; + type = INSN_MMIO_MOVS; break; case 0x0f: /* Two-byte instruction */ @@ -1651,7 +1651,7 @@ enum mmio_type insn_decode_mmio(struct insn *insn, int *bytes) case 0xb7: /* MOVZX r32/r64, m16 */ if (!*bytes) *bytes = 2; - type = MMIO_READ_ZERO_EXTEND; + type = INSN_MMIO_READ_ZERO_EXTEND; break; case 0xbe: /* MOVSX r16/r32/r64, m8 */ @@ -1660,7 +1660,7 @@ enum mmio_type insn_decode_mmio(struct insn *insn, int *bytes) case 0xbf: /* MOVSX r32/r64, m16 */ if (!*bytes) *bytes = 2; - type = MMIO_READ_SIGN_EXTEND; + type = INSN_MMIO_READ_SIGN_EXTEND; break; } break; diff --git a/arch/x86/lib/iomap_copy_64.S b/arch/x86/lib/iomap_copy_64.S index a1f9416bf67a..6ff2f56cb0f7 100644 --- a/arch/x86/lib/iomap_copy_64.S +++ b/arch/x86/lib/iomap_copy_64.S @@ -10,6 +10,6 @@ */ SYM_FUNC_START(__iowrite32_copy) movl %edx,%ecx - rep movsd + rep movsl RET SYM_FUNC_END(__iowrite32_copy) |