diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/cpu-features.h | 4 | ||||
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 1 | ||||
| -rw-r--r-- | arch/mips/include/asm/mipsregs.h | 6 | ||||
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 4 |
4 files changed, 14 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 5d82b01ef8b5..7962b257cc16 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -450,4 +450,8 @@ # define cpu_has_badinstrp (cpu_data[0].options & MIPS_CPU_BADINSTRP) #endif +#ifndef cpu_has_contextconfig +# define cpu_has_contextconfig (cpu_data[0].options & MIPS_CPU_CTXTC) +#endif + #endif /* __ASM_CPU_FEATURES_H */ diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 0cf90d67c1af..ddcb2abd44ba 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -407,6 +407,7 @@ enum cpu_type_enum { #define MIPS_CPU_EBASE_WG MBIT_ULL(43) /* CPU has EBase.WG */ #define MIPS_CPU_BADINSTR MBIT_ULL(44) /* CPU has BadInstr register */ #define MIPS_CPU_BADINSTRP MBIT_ULL(45) /* CPU has BadInstrP register */ +#define MIPS_CPU_CTXTC MBIT_ULL(46) /* CPU has [X]ConfigContext registers */ /* * CPU ASE encodings diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index b1f8f8436fd1..08864cbbb27b 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -1228,9 +1228,15 @@ do { \ #define read_c0_context() __read_ulong_c0_register($4, 0) #define write_c0_context(val) __write_ulong_c0_register($4, 0, val) +#define read_c0_contextconfig() __read_32bit_c0_register($4, 1) +#define write_c0_contextconfig(val) __write_32bit_c0_register($4, 1, val) + #define read_c0_userlocal() __read_ulong_c0_register($4, 2) #define write_c0_userlocal(val) __write_ulong_c0_register($4, 2, val) +#define read_c0_xcontextconfig() __read_ulong_c0_register($4, 3) +#define write_c0_xcontextconfig(val) __write_ulong_c0_register($4, 3, val) + #define read_c0_pagemask() __read_32bit_c0_register($5, 0) #define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, val) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 8e54d51c14bc..963ce7ef29df 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -687,10 +687,12 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) if (config3 & MIPS_CONF3_SM) { c->ases |= MIPS_ASE_SMARTMIPS; - c->options |= MIPS_CPU_RIXI; + c->options |= MIPS_CPU_RIXI | MIPS_CPU_CTXTC; } if (config3 & MIPS_CONF3_RXI) c->options |= MIPS_CPU_RIXI; + if (config3 & MIPS_CONF3_CTXTC) + c->options |= MIPS_CPU_CTXTC; if (config3 & MIPS_CONF3_DSP) c->ases |= MIPS_ASE_DSP; if (config3 & MIPS_CONF3_DSP2P) { |