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-rw-r--r--arch/blackfin/include/asm/atomic.h2
-rw-r--r--arch/blackfin/include/asm/bitops.h5
-rw-r--r--arch/blackfin/include/asm/def_LPBlackfin.h16
-rw-r--r--arch/blackfin/include/asm/dpmc.h3
-rw-r--r--arch/blackfin/include/asm/ipipe.h95
-rw-r--r--arch/blackfin/include/asm/ipipe_base.h11
-rw-r--r--arch/blackfin/include/asm/irqflags.h87
-rw-r--r--arch/blackfin/include/asm/smp.h9
-rw-r--r--arch/blackfin/include/asm/system.h36
-rw-r--r--arch/blackfin/include/asm/traps.h2
-rw-r--r--arch/blackfin/include/asm/unistd.h6
11 files changed, 171 insertions, 101 deletions
diff --git a/arch/blackfin/include/asm/atomic.h b/arch/blackfin/include/asm/atomic.h
index d27c6274247d..e48508957160 100644
--- a/arch/blackfin/include/asm/atomic.h
+++ b/arch/blackfin/include/asm/atomic.h
@@ -121,4 +121,6 @@ static inline int atomic_test_mask(int mask, atomic_t *v)
#endif
+#include <asm-generic/atomic64.h>
+
#endif
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h
index 29f4fd886174..8a0fed16058f 100644
--- a/arch/blackfin/include/asm/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
@@ -25,9 +25,7 @@
#include <asm-generic/bitops/const_hweight.h>
#include <asm-generic/bitops/lock.h>
-#include <asm-generic/bitops/ext2-non-atomic.h>
#include <asm-generic/bitops/ext2-atomic.h>
-#include <asm-generic/bitops/minix.h>
#ifndef CONFIG_SMP
#include <linux/irqflags.h>
@@ -114,6 +112,9 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
#endif /* CONFIG_SMP */
+/* Needs to be after test_bit and friends */
+#include <asm-generic/bitops/le.h>
+
/*
* hweightN: returns the hamming weight (i.e. the number
* of bits set) of a N-bit word
diff --git a/arch/blackfin/include/asm/def_LPBlackfin.h b/arch/blackfin/include/asm/def_LPBlackfin.h
index e3f0f4c49819..7600fe0696af 100644
--- a/arch/blackfin/include/asm/def_LPBlackfin.h
+++ b/arch/blackfin/include/asm/def_LPBlackfin.h
@@ -58,14 +58,26 @@
({ BUG(); 0; }); \
})
#define bfin_write(addr, val) \
-({ \
+do { \
switch (sizeof(*(addr))) { \
case 1: bfin_write8(addr, val); break; \
case 2: bfin_write16(addr, val); break; \
case 4: bfin_write32(addr, val); break; \
default: BUG(); \
} \
-})
+} while (0)
+
+#define bfin_write_or(addr, bits) \
+do { \
+ void *__addr = (void *)(addr); \
+ bfin_write(__addr, bfin_read(__addr) | (bits)); \
+} while (0)
+
+#define bfin_write_and(addr, bits) \
+do { \
+ void *__addr = (void *)(addr); \
+ bfin_write(__addr, bfin_read(__addr) & (bits)); \
+} while (0)
#endif /* __ASSEMBLY__ */
diff --git a/arch/blackfin/include/asm/dpmc.h b/arch/blackfin/include/asm/dpmc.h
index 3047120cfcff..edf2a2ad5183 100644
--- a/arch/blackfin/include/asm/dpmc.h
+++ b/arch/blackfin/include/asm/dpmc.h
@@ -125,6 +125,9 @@ void unset_dram_srfs(void);
#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))
+#ifdef CONFIG_CPU_FREQ
+#define CPUFREQ_CPU 0
+#endif
struct bfin_dpmc_platform_data {
const unsigned int *tuple_tab;
unsigned short tabsize;
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h
index 40f94a704c02..9e0cc0e2534f 100644
--- a/arch/blackfin/include/asm/ipipe.h
+++ b/arch/blackfin/include/asm/ipipe.h
@@ -34,11 +34,12 @@
#include <asm/bitops.h>
#include <asm/atomic.h>
#include <asm/traps.h>
+#include <asm/bitsperlong.h>
-#define IPIPE_ARCH_STRING "1.12-00"
+#define IPIPE_ARCH_STRING "1.16-01"
#define IPIPE_MAJOR_NUMBER 1
-#define IPIPE_MINOR_NUMBER 12
-#define IPIPE_PATCH_NUMBER 0
+#define IPIPE_MINOR_NUMBER 16
+#define IPIPE_PATCH_NUMBER 1
#ifdef CONFIG_SMP
#error "I-pipe/blackfin: SMP not implemented"
@@ -55,25 +56,19 @@ do { \
#define task_hijacked(p) \
({ \
int __x__ = __ipipe_root_domain_p; \
- __clear_bit(IPIPE_SYNC_FLAG, &ipipe_root_cpudom_var(status)); \
if (__x__) \
- hard_local_irq_enable(); \
+ hard_local_irq_enable(); \
!__x__; \
})
struct ipipe_domain;
struct ipipe_sysinfo {
-
- int ncpus; /* Number of CPUs on board */
- u64 cpufreq; /* CPU frequency (in Hz) */
-
- /* Arch-dependent block */
-
- struct {
- unsigned tmirq; /* Timer tick IRQ */
- u64 tmfreq; /* Timer frequency */
- } archdep;
+ int sys_nr_cpus; /* Number of CPUs on board */
+ int sys_hrtimer_irq; /* hrtimer device IRQ */
+ u64 sys_hrtimer_freq; /* hrtimer device frequency */
+ u64 sys_hrclock_freq; /* hrclock device frequency */
+ u64 sys_cpu_freq; /* CPU frequency (Hz) */
};
#define ipipe_read_tsc(t) \
@@ -115,9 +110,19 @@ void __ipipe_enable_irqdesc(struct ipipe_domain *ipd,
void __ipipe_disable_irqdesc(struct ipipe_domain *ipd,
unsigned irq);
-#define __ipipe_enable_irq(irq) (irq_desc[irq].chip->unmask(irq))
+#define __ipipe_enable_irq(irq) \
+ do { \
+ struct irq_desc *desc = irq_to_desc(irq); \
+ struct irq_chip *chip = get_irq_desc_chip(desc); \
+ chip->irq_unmask(&desc->irq_data); \
+ } while (0)
-#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq))
+#define __ipipe_disable_irq(irq) \
+ do { \
+ struct irq_desc *desc = irq_to_desc(irq); \
+ struct irq_chip *chip = get_irq_desc_chip(desc); \
+ chip->irq_mask(&desc->irq_data); \
+ } while (0)
static inline int __ipipe_check_tickdev(const char *devname)
{
@@ -128,12 +133,11 @@ void __ipipe_enable_pipeline(void);
#define __ipipe_hook_critical_ipi(ipd) do { } while (0)
-#define __ipipe_sync_pipeline ___ipipe_sync_pipeline
-void ___ipipe_sync_pipeline(unsigned long syncmask);
+void ___ipipe_sync_pipeline(void);
void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs);
-int __ipipe_get_irq_priority(unsigned irq);
+int __ipipe_get_irq_priority(unsigned int irq);
void __ipipe_serial_debug(const char *fmt, ...);
@@ -152,7 +156,10 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul)
return ffs(ul) - 1;
}
-#define __ipipe_run_irqtail() /* Must be a macro */ \
+#define __ipipe_do_root_xirq(ipd, irq) \
+ ((ipd)->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)))
+
+#define __ipipe_run_irqtail(irq) /* Must be a macro */ \
do { \
unsigned long __pending; \
CSYNC(); \
@@ -164,42 +171,8 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul)
} \
} while (0)
-#define __ipipe_run_isr(ipd, irq) \
- do { \
- if (!__ipipe_pipeline_head_p(ipd)) \
- hard_local_irq_enable(); \
- if (ipd == ipipe_root_domain) { \
- if (unlikely(ipipe_virtual_irq_p(irq))) { \
- irq_enter(); \
- ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
- irq_exit(); \
- } else \
- ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \
- } else { \
- __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
- ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \
- /* Attempt to exit the outer interrupt level before \
- * starting the deferred IRQ processing. */ \
- __ipipe_run_irqtail(); \
- __set_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \
- } \
- hard_local_irq_disable(); \
- } while (0)
-
#define __ipipe_syscall_watched_p(p, sc) \
- (((p)->flags & PF_EVNOTIFY) || (unsigned long)sc >= NR_syscalls)
-
-void ipipe_init_irq_threads(void);
-
-int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
-
-#ifdef CONFIG_TICKSOURCE_CORETMR
-#define IRQ_SYSTMR IRQ_CORETMR
-#define IRQ_PRIOTMR IRQ_CORETMR
-#else
-#define IRQ_SYSTMR IRQ_TIMER0
-#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0
-#endif
+ (ipipe_notifier_enabled_p(p) || (unsigned long)sc >= NR_syscalls)
#ifdef CONFIG_BF561
#define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val)
@@ -219,11 +192,11 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
#define task_hijacked(p) 0
#define ipipe_trap_notify(t, r) 0
+#define __ipipe_root_tick_p(regs) 1
-#define ipipe_init_irq_threads() do { } while (0)
-#define ipipe_start_irq_thread(irq, desc) 0
+#endif /* !CONFIG_IPIPE */
-#ifndef CONFIG_TICKSOURCE_GPTMR0
+#ifdef CONFIG_TICKSOURCE_CORETMR
#define IRQ_SYSTMR IRQ_CORETMR
#define IRQ_PRIOTMR IRQ_CORETMR
#else
@@ -231,10 +204,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0
#endif
-#define __ipipe_root_tick_p(regs) 1
-
-#endif /* !CONFIG_IPIPE */
-
#define ipipe_update_tick_evtdev(evtdev) do { } while (0)
#endif /* !__ASM_BLACKFIN_IPIPE_H */
diff --git a/arch/blackfin/include/asm/ipipe_base.h b/arch/blackfin/include/asm/ipipe_base.h
index 00409201d9ed..84a4ffd36747 100644
--- a/arch/blackfin/include/asm/ipipe_base.h
+++ b/arch/blackfin/include/asm/ipipe_base.h
@@ -24,8 +24,10 @@
#ifdef CONFIG_IPIPE
+#include <asm/bitsperlong.h>
+#include <mach/irq.h>
+
#define IPIPE_NR_XIRQS NR_IRQS
-#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */
/* Blackfin-specific, per-cpu pipeline status */
#define IPIPE_SYNCDEFER_FLAG 15
@@ -42,11 +44,14 @@
#define IPIPE_EVENT_INIT (IPIPE_FIRST_EVENT + 4)
#define IPIPE_EVENT_EXIT (IPIPE_FIRST_EVENT + 5)
#define IPIPE_EVENT_CLEANUP (IPIPE_FIRST_EVENT + 6)
-#define IPIPE_LAST_EVENT IPIPE_EVENT_CLEANUP
+#define IPIPE_EVENT_RETURN (IPIPE_FIRST_EVENT + 7)
+#define IPIPE_LAST_EVENT IPIPE_EVENT_RETURN
#define IPIPE_NR_EVENTS (IPIPE_LAST_EVENT + 1)
#define IPIPE_TIMER_IRQ IRQ_CORETMR
+#define __IPIPE_FEATURE_SYSINFO_V2 1
+
#ifndef __ASSEMBLY__
extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */
@@ -63,6 +68,8 @@ void __ipipe_unlock_root(void);
#endif /* !__ASSEMBLY__ */
+#define __IPIPE_FEATURE_SYSINFO_V2 1
+
#endif /* CONFIG_IPIPE */
#endif /* !__ASM_BLACKFIN_IPIPE_BASE_H */
diff --git a/arch/blackfin/include/asm/irqflags.h b/arch/blackfin/include/asm/irqflags.h
index 3365cb97f539..b4bbb75a9e15 100644
--- a/arch/blackfin/include/asm/irqflags.h
+++ b/arch/blackfin/include/asm/irqflags.h
@@ -89,15 +89,33 @@ static inline void __hard_local_irq_restore(unsigned long flags)
#ifdef CONFIG_IPIPE
#include <linux/compiler.h>
-#include <linux/ipipe_base.h>
#include <linux/ipipe_trace.h>
+/*
+ * Way too many inter-deps between low-level headers in this port, so
+ * we redeclare the required bits we cannot pick from
+ * <asm/ipipe_base.h> to prevent circular dependencies.
+ */
+void __ipipe_stall_root(void);
+void __ipipe_unstall_root(void);
+unsigned long __ipipe_test_root(void);
+unsigned long __ipipe_test_and_stall_root(void);
+void __ipipe_restore_root(unsigned long flags);
+
+#ifdef CONFIG_IPIPE_DEBUG_CONTEXT
+struct ipipe_domain;
+extern struct ipipe_domain ipipe_root;
+void ipipe_check_context(struct ipipe_domain *ipd);
+#define __check_irqop_context(ipd) ipipe_check_context(&ipipe_root)
+#else /* !CONFIG_IPIPE_DEBUG_CONTEXT */
+#define __check_irqop_context(ipd) do { } while (0)
+#endif /* !CONFIG_IPIPE_DEBUG_CONTEXT */
/*
* Interrupt pipe interface to linux/irqflags.h.
*/
static inline void arch_local_irq_disable(void)
{
- ipipe_check_context(ipipe_root_domain);
+ __check_irqop_context();
__ipipe_stall_root();
barrier();
}
@@ -105,7 +123,7 @@ static inline void arch_local_irq_disable(void)
static inline void arch_local_irq_enable(void)
{
barrier();
- ipipe_check_context(ipipe_root_domain);
+ __check_irqop_context();
__ipipe_unstall_root();
}
@@ -119,16 +137,21 @@ static inline int arch_irqs_disabled_flags(unsigned long flags)
return flags == bfin_no_irqs;
}
-static inline void arch_local_irq_save_ptr(unsigned long *_flags)
+static inline unsigned long arch_local_irq_save(void)
{
- x = __ipipe_test_and_stall_root() ? bfin_no_irqs : bfin_irq_flags;
+ unsigned long flags;
+
+ __check_irqop_context();
+ flags = __ipipe_test_and_stall_root() ? bfin_no_irqs : bfin_irq_flags;
barrier();
+
+ return flags;
}
-static inline unsigned long arch_local_irq_save(void)
+static inline void arch_local_irq_restore(unsigned long flags)
{
- ipipe_check_context(ipipe_root_domain);
- return __hard_local_irq_save();
+ __check_irqop_context();
+ __ipipe_restore_root(flags == bfin_no_irqs);
}
static inline unsigned long arch_mangle_irq_bits(int virt, unsigned long real)
@@ -192,7 +215,10 @@ static inline void hard_local_irq_restore(unsigned long flags)
# define hard_local_irq_restore(flags) __hard_local_irq_restore(flags)
#endif /* !CONFIG_IPIPE_TRACE_IRQSOFF */
-#else /* CONFIG_IPIPE */
+#define hard_local_irq_save_cond() hard_local_irq_save()
+#define hard_local_irq_restore_cond(flags) hard_local_irq_restore(flags)
+
+#else /* !CONFIG_IPIPE */
/*
* Direct interface to linux/irqflags.h.
@@ -212,7 +238,48 @@ static inline void hard_local_irq_restore(unsigned long flags)
#define hard_local_irq_restore(flags) __hard_local_irq_restore(flags)
#define hard_local_irq_enable() __hard_local_irq_enable()
#define hard_local_irq_disable() __hard_local_irq_disable()
-
+#define hard_local_irq_save_cond() hard_local_save_flags()
+#define hard_local_irq_restore_cond(flags) do { (void)(flags); } while (0)
#endif /* !CONFIG_IPIPE */
+
+#ifdef CONFIG_SMP
+#define hard_local_irq_save_smp() hard_local_irq_save()
+#define hard_local_irq_restore_smp(flags) hard_local_irq_restore(flags)
+#else
+#define hard_local_irq_save_smp() hard_local_save_flags()
+#define hard_local_irq_restore_smp(flags) do { (void)(flags); } while (0)
+#endif
+
+/*
+ * Remap the arch-neutral IRQ state manipulation macros to the
+ * blackfin-specific hard_local_irq_* API.
+ */
+#define local_irq_save_hw(flags) \
+ do { \
+ (flags) = hard_local_irq_save(); \
+ } while (0)
+#define local_irq_restore_hw(flags) \
+ do { \
+ hard_local_irq_restore(flags); \
+ } while (0)
+#define local_irq_disable_hw() \
+ do { \
+ hard_local_irq_disable(); \
+ } while (0)
+#define local_irq_enable_hw() \
+ do { \
+ hard_local_irq_enable(); \
+ } while (0)
+#define local_irq_save_hw_notrace(flags) \
+ do { \
+ (flags) = __hard_local_irq_save(); \
+ } while (0)
+#define local_irq_restore_hw_notrace(flags) \
+ do { \
+ __hard_local_irq_restore(flags); \
+ } while (0)
+
+#define irqs_disabled_hw() hard_irqs_disabled()
+
#endif
diff --git a/arch/blackfin/include/asm/smp.h b/arch/blackfin/include/asm/smp.h
index f5b537967116..af6c0aa79bae 100644
--- a/arch/blackfin/include/asm/smp.h
+++ b/arch/blackfin/include/asm/smp.h
@@ -17,7 +17,12 @@
#define raw_smp_processor_id() blackfin_core_id()
-extern char coreb_trampoline_start, coreb_trampoline_end;
+extern void bfin_relocate_coreb_l1_mem(void);
+
+#if defined(CONFIG_SMP) && defined(CONFIG_ICACHE_FLUSH_L1)
+asmlinkage void blackfin_icache_flush_range_l1(unsigned long *ptr);
+extern unsigned long blackfin_iflush_l1_entry[NR_CPUS];
+#endif
struct corelock_slot {
int lock;
@@ -34,7 +39,7 @@ extern unsigned long dcache_invld_count[NR_CPUS];
void smp_icache_flush_range_others(unsigned long start,
unsigned long end);
#ifdef CONFIG_HOTPLUG_CPU
-void coreb_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
+void coreb_die(void);
void cpu_die(void);
void platform_cpu_die(void);
int __cpu_disable(void);
diff --git a/arch/blackfin/include/asm/system.h b/arch/blackfin/include/asm/system.h
index 19e2c7c3e63a..44bd0cced725 100644
--- a/arch/blackfin/include/asm/system.h
+++ b/arch/blackfin/include/asm/system.h
@@ -19,11 +19,11 @@
* Force strict CPU ordering.
*/
#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-#define rmb() __asm__ __volatile__ ("" : : : "memory")
-#define wmb() __asm__ __volatile__ ("" : : : "memory")
-#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
-#define read_barrier_depends() do { } while(0)
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
+#define set_mb(var, value) do { var = value; mb(); } while (0)
+#define smp_read_barrier_depends() read_barrier_depends()
#ifdef CONFIG_SMP
asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
@@ -37,16 +37,16 @@ asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
unsigned long new, unsigned long old);
#ifdef __ARCH_SYNC_CORE_DCACHE
-# define smp_mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
-# define smp_rmb() do { barrier(); smp_check_barrier(); } while (0)
-# define smp_wmb() do { barrier(); smp_mark_barrier(); } while (0)
-#define smp_read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
-
+/* Force Core data cache coherence */
+# define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
+# define rmb() do { barrier(); smp_check_barrier(); } while (0)
+# define wmb() do { barrier(); smp_mark_barrier(); } while (0)
+# define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
#else
-# define smp_mb() barrier()
-# define smp_rmb() barrier()
-# define smp_wmb() barrier()
-#define smp_read_barrier_depends() barrier()
+# define mb() barrier()
+# define rmb() barrier()
+# define wmb() barrier()
+# define read_barrier_depends() do { } while (0)
#endif
static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
@@ -99,10 +99,10 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
#else /* !CONFIG_SMP */
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while(0)
+#define mb() barrier()
+#define rmb() barrier()
+#define wmb() barrier()
+#define read_barrier_depends() do { } while (0)
struct __xchg_dummy {
unsigned long a[100];
diff --git a/arch/blackfin/include/asm/traps.h b/arch/blackfin/include/asm/traps.h
index 9fe0da612c09..70c4e511cae6 100644
--- a/arch/blackfin/include/asm/traps.h
+++ b/arch/blackfin/include/asm/traps.h
@@ -57,7 +57,7 @@
#define HWC_x3(level) \
"External Memory Addressing Error\n"
#define EXC_0x04(level) \
- "Unimplmented exception occured\n" \
+ "Unimplmented exception occurred\n" \
level " - Maybe you forgot to install a custom exception handler?\n"
#define HWC_x12(level) \
"Performance Monitor Overflow\n"
diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h
index 928ae975b87e..ff9a9f35d50b 100644
--- a/arch/blackfin/include/asm/unistd.h
+++ b/arch/blackfin/include/asm/unistd.h
@@ -393,8 +393,12 @@
#define __NR_fanotify_mark 372
#define __NR_prlimit64 373
#define __NR_cacheflush 374
+#define __NR_name_to_handle_at 375
+#define __NR_open_by_handle_at 376
+#define __NR_clock_adjtime 377
+#define __NR_syncfs 378
-#define __NR_syscall 375
+#define __NR_syscall 379
#define NR_syscalls __NR_syscall
/* Old optional stuff no one actually uses */