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Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-j721e-main.dtsi')
-rw-r--r--arch/arm64/boot/dts/ti/k3-j721e-main.dtsi135
1 files changed, 100 insertions, 35 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index e2a96b2c423c..b32df591c766 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -2,7 +2,7 @@
/*
* Device Tree Source for J721E SoC Family Main Domain peripherals
*
- * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
*/
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/mux/mux.h>
@@ -148,6 +148,7 @@
interrupt-controller;
interrupt-parent = <&main_navss_intr>;
msi-controller;
+ #interrupt-cells = <0>;
ti,sci = <&dmsc>;
ti,sci-dev-id = <209>;
ti,interrupt-ranges = <0 0 256>;
@@ -345,8 +346,6 @@
#size-cells = <2>;
ranges = <0x0 0x04e00000 0x00 0x04e00000 0x0 0x30000>;
- status = "okay";
-
dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
<&main_udmap 0x4001>;
dma-names = "tx", "rx1", "rx2";
@@ -1081,7 +1080,11 @@
bus-width = <8>;
mmc-hs400-1_8v;
mmc-ddr-1_8v;
- ti,otap-del-sel = <0x2>;
+ ti,otap-del-sel-legacy = <0xf>;
+ ti,otap-del-sel-mmc-hs = <0xf>;
+ ti,otap-del-sel-ddr52 = <0x5>;
+ ti,otap-del-sel-hs200 = <0x6>;
+ ti,otap-del-sel-hs400 = <0x0>;
ti,trm-icp = <0x8>;
ti,strobe-sel = <0x77>;
dma-coherent;
@@ -1096,11 +1099,15 @@
clocks = <&k3_clks 92 0>, <&k3_clks 92 5>;
assigned-clocks = <&k3_clks 92 0>;
assigned-clock-parents = <&k3_clks 92 1>;
- ti,otap-del-sel = <0x2>;
+ ti,otap-del-sel-legacy = <0x0>;
+ ti,otap-del-sel-sd-hs = <0xf>;
+ ti,otap-del-sel-sdr12 = <0xf>;
+ ti,otap-del-sel-sdr25 = <0xf>;
+ ti,otap-del-sel-sdr50 = <0xc>;
+ ti,otap-del-sel-ddr50 = <0xc>;
ti,trm-icp = <0x8>;
ti,clkbuf-sel = <0x7>;
dma-coherent;
- no-1-8-v;
};
main_sdhci2: sdhci@4f98000 {
@@ -1112,11 +1119,15 @@
clocks = <&k3_clks 93 0>, <&k3_clks 93 5>;
assigned-clocks = <&k3_clks 93 0>;
assigned-clock-parents = <&k3_clks 93 1>;
- ti,otap-del-sel = <0x2>;
+ ti,otap-del-sel-legacy = <0x0>;
+ ti,otap-del-sel-sd-hs = <0xf>;
+ ti,otap-del-sel-sdr12 = <0xf>;
+ ti,otap-del-sel-sdr25 = <0xf>;
+ ti,otap-del-sel-sdr50 = <0xc>;
+ ti,otap-del-sel-ddr50 = <0xc>;
ti,trm-icp = <0x8>;
ti,clkbuf-sel = <0x7>;
dma-coherent;
- no-1-8-v;
};
usbss0: cdns-usb@4104000 {
@@ -1278,7 +1289,7 @@
};
};
- dss: dss@04a00000 {
+ dss: dss@4a00000 {
compatible = "ti,j721e-dss";
reg =
<0x00 0x04a00000 0x00 0x10000>, /* common_m */
@@ -1327,8 +1338,6 @@
"common_s1",
"common_s2";
- status = "disabled";
-
dss_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -1350,8 +1359,6 @@
clocks = <&k3_clks 174 1>;
clock-names = "fck";
power-domains = <&k3_pds 174 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp1: mcasp@2b10000 {
@@ -1369,8 +1376,6 @@
clocks = <&k3_clks 175 1>;
clock-names = "fck";
power-domains = <&k3_pds 175 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp2: mcasp@2b20000 {
@@ -1388,8 +1393,6 @@
clocks = <&k3_clks 176 1>;
clock-names = "fck";
power-domains = <&k3_pds 176 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp3: mcasp@2b30000 {
@@ -1407,8 +1410,6 @@
clocks = <&k3_clks 177 1>;
clock-names = "fck";
power-domains = <&k3_pds 177 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp4: mcasp@2b40000 {
@@ -1426,8 +1427,6 @@
clocks = <&k3_clks 178 1>;
clock-names = "fck";
power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp5: mcasp@2b50000 {
@@ -1445,8 +1444,6 @@
clocks = <&k3_clks 179 1>;
clock-names = "fck";
power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp6: mcasp@2b60000 {
@@ -1464,8 +1461,6 @@
clocks = <&k3_clks 180 1>;
clock-names = "fck";
power-domains = <&k3_pds 180 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp7: mcasp@2b70000 {
@@ -1483,8 +1478,6 @@
clocks = <&k3_clks 181 1>;
clock-names = "fck";
power-domains = <&k3_pds 181 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp8: mcasp@2b80000 {
@@ -1502,8 +1495,6 @@
clocks = <&k3_clks 182 1>;
clock-names = "fck";
power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp9: mcasp@2b90000 {
@@ -1521,8 +1512,6 @@
clocks = <&k3_clks 183 1>;
clock-names = "fck";
power-domains = <&k3_pds 183 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp10: mcasp@2ba0000 {
@@ -1540,8 +1529,6 @@
clocks = <&k3_clks 184 1>;
clock-names = "fck";
power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
mcasp11: mcasp@2bb0000 {
@@ -1559,8 +1546,6 @@
clocks = <&k3_clks 185 1>;
clock-names = "fck";
power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
-
- status = "disabled";
};
watchdog0: watchdog@2200000 {
@@ -1581,6 +1566,86 @@
assigned-clock-parents = <&k3_clks 253 5>;
};
+ main_r5fss0: r5fss@5c00000 {
+ compatible = "ti,j721e-r5fss";
+ ti,cluster-mode = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
+ <0x5d00000 0x00 0x5d00000 0x20000>;
+ power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>;
+
+ main_r5fss0_core0: r5f@5c00000 {
+ compatible = "ti,j721e-r5f";
+ reg = <0x5c00000 0x00008000>,
+ <0x5c10000 0x00008000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <245>;
+ ti,sci-proc-ids = <0x06 0xff>;
+ resets = <&k3_reset 245 1>;
+ firmware-name = "j7-main-r5f0_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+
+ main_r5fss0_core1: r5f@5d00000 {
+ compatible = "ti,j721e-r5f";
+ reg = <0x5d00000 0x00008000>,
+ <0x5d10000 0x00008000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <246>;
+ ti,sci-proc-ids = <0x07 0xff>;
+ resets = <&k3_reset 246 1>;
+ firmware-name = "j7-main-r5f0_1-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
+ main_r5fss1: r5fss@5e00000 {
+ compatible = "ti,j721e-r5fss";
+ ti,cluster-mode = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x5e00000 0x00 0x5e00000 0x20000>,
+ <0x5f00000 0x00 0x5f00000 0x20000>;
+ power-domains = <&k3_pds 244 TI_SCI_PD_EXCLUSIVE>;
+
+ main_r5fss1_core0: r5f@5e00000 {
+ compatible = "ti,j721e-r5f";
+ reg = <0x5e00000 0x00008000>,
+ <0x5e10000 0x00008000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <247>;
+ ti,sci-proc-ids = <0x08 0xff>;
+ resets = <&k3_reset 247 1>;
+ firmware-name = "j7-main-r5f1_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+
+ main_r5fss1_core1: r5f@5f00000 {
+ compatible = "ti,j721e-r5f";
+ reg = <0x5f00000 0x00008000>,
+ <0x5f10000 0x00008000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <248>;
+ ti,sci-proc-ids = <0x09 0xff>;
+ resets = <&k3_reset 248 1>;
+ firmware-name = "j7-main-r5f1_1-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
c66_0: dsp@4d80800000 {
compatible = "ti,j721e-c66-dsp";
reg = <0x4d 0x80800000 0x00 0x00048000>,
generated by cgit v1.2.3 (git 2.39.0) at 2024-11-22 00:53:38 +0300