diff options
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3399.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3399.dtsi | 45 |
1 files changed, 42 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 080457a68e3c..fbd0346624e6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -178,6 +178,15 @@ ports = <&vopl_out>, <&vopb_out>; }; + dmc: memory-controller { + compatible = "rockchip,rk3399-dmc"; + rockchip,pmu = <&pmugrf>; + devfreq-events = <&dfi>; + clocks = <&cru SCLK_DDRC>; + clock-names = "dmc_clk"; + status = "disabled"; + }; + pmu_a53 { compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>; @@ -1295,6 +1304,16 @@ status = "disabled"; }; + dfi: dfi@ff630000 { + reg = <0x00 0xff630000 0x00 0x4000>; + compatible = "rockchip,rk3399-dfi"; + rockchip,pmu = <&pmugrf>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&cru PCLK_DDR_MON>; + clock-names = "pclk_ddr_mon"; + status = "disabled"; + }; + vpu: video-codec@ff650000 { compatible = "rockchip,rk3399-vpu"; reg = <0x0 0xff650000 0x0 0x800>; @@ -1413,9 +1432,11 @@ clock-names = "apb_pclk"; }; - pmucru: pmu-clock-controller@ff750000 { + pmucru: clock-controller@ff750000 { compatible = "rockchip,rk3399-pmucru"; reg = <0x0 0xff750000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&pmugrf>; #clock-cells = <1>; #reset-cells = <1>; @@ -1426,6 +1447,8 @@ cru: clock-controller@ff760000 { compatible = "rockchip,rk3399-cru"; reg = <0x0 0xff760000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; rockchip,grf = <&grf>; #clock-cells = <1>; #reset-cells = <1>; @@ -1534,6 +1557,7 @@ reg = <0xf780 0x24>; clocks = <&sdhci>; clock-names = "emmcclk"; + drive-impedance-ohm = <50>; #phy-cells = <0>; status = "disabled"; }; @@ -1544,7 +1568,6 @@ clock-names = "refclk"; #phy-cells = <1>; resets = <&cru SRST_PCIEPHY>; - drive-impedance-ohm = <50>; reset-names = "phy"; status = "disabled"; }; @@ -1884,7 +1907,7 @@ <&cru SCLK_HDMI_CEC>, <&cru PCLK_VIO_GRF>, <&cru PLL_VPLL>; - clock-names = "iahb", "isfr", "cec", "grf", "vpll"; + clock-names = "iahb", "isfr", "cec", "grf", "ref"; power-domains = <&power RK3399_PD_HDCP>; reg-io-width = <4>; rockchip,grf = <&grf>; @@ -2188,6 +2211,22 @@ output-low; }; + pcfg_input_enable: pcfg-input-enable { + input-enable; + }; + + pcfg_input_pull_up: pcfg-input-pull-up { + input-enable; + bias-pull-up; + drive-strength = <2>; + }; + + pcfg_input_pull_down: pcfg-input-pull-down { + input-enable; + bias-pull-down; + drive-strength = <2>; + }; + clock { clk_32k: clk-32k { rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>; |