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Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm8450.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sm8450.dtsi233
1 files changed, 151 insertions, 82 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 4978c5ba5dd0..d32f08df743d 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -438,11 +438,6 @@
no-map;
};
- camera_mem: memory@85200000 {
- reg = <0x0 0x85200000 0x0 0x500000>;
- no-map;
- };
-
video_mem: memory@85700000 {
reg = <0x0 0x85700000 0x0 0x700000>;
no-map;
@@ -505,6 +500,11 @@
no-map;
};
+ camera_mem: memory@9f500000 {
+ reg = <0x0 0x9f500000 0x0 0x800000>;
+ no-map;
+ };
+
rmtfs_mem: memory@9fd00000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0x9fd00000 0x0 0x280000>;
@@ -514,6 +514,11 @@
qcom,vmid = <15>;
};
+ xbl_sc_mem2: memory@a6e00000 {
+ reg = <0x0 0xa6e00000 0x0 0x40000>;
+ no-map;
+ };
+
global_sync_mem: memory@a6f00000 {
reg = <0x0 0xa6f00000 0x0 0x100000>;
no-map;
@@ -2379,22 +2384,42 @@
gpio-ranges = <&tlmm 0 0 211>;
wakeup-parent = <&pdc>;
+ sdc2_sleep_state: sdc2-sleep-state {
+ clk-pins {
+ pins = "sdc2_clk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc2_cmd";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc2_data";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
pcie0_default_state: pcie0-default-state {
- perst {
+ perst-pins {
pins = "gpio94";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
- clkreq {
+ clkreq-pins {
pins = "gpio95";
function = "pcie0_clkreqn";
drive-strength = <2>;
bias-pull-up;
};
- wake {
+ wake-pins {
pins = "gpio96";
function = "gpio";
drive-strength = <2>;
@@ -2403,21 +2428,21 @@
};
pcie1_default_state: pcie1-default-state {
- perst {
+ perst-pins {
pins = "gpio97";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
- clkreq {
+ clkreq-pins {
pins = "gpio98";
function = "pcie1_clkreqn";
drive-strength = <2>;
bias-pull-up;
};
- wake {
+ wake-pins {
pins = "gpio99";
function = "gpio";
drive-strength = <2>;
@@ -2425,350 +2450,350 @@
};
};
- qup_i2c0_data_clk: qup-i2c0-data-clk {
+ qup_i2c0_data_clk: qup-i2c0-data-clk-state {
pins = "gpio0", "gpio1";
function = "qup0";
};
- qup_i2c1_data_clk: qup-i2c1-data-clk {
+ qup_i2c1_data_clk: qup-i2c1-data-clk-state {
pins = "gpio4", "gpio5";
function = "qup1";
};
- qup_i2c2_data_clk: qup-i2c2-data-clk {
+ qup_i2c2_data_clk: qup-i2c2-data-clk-state {
pins = "gpio8", "gpio9";
function = "qup2";
};
- qup_i2c3_data_clk: qup-i2c3-data-clk {
+ qup_i2c3_data_clk: qup-i2c3-data-clk-state {
pins = "gpio12", "gpio13";
function = "qup3";
};
- qup_i2c4_data_clk: qup-i2c4-data-clk {
+ qup_i2c4_data_clk: qup-i2c4-data-clk-state {
pins = "gpio16", "gpio17";
function = "qup4";
};
- qup_i2c5_data_clk: qup-i2c5-data-clk {
+ qup_i2c5_data_clk: qup-i2c5-data-clk-state {
pins = "gpio206", "gpio207";
function = "qup5";
};
- qup_i2c6_data_clk: qup-i2c6-data-clk {
+ qup_i2c6_data_clk: qup-i2c6-data-clk-state {
pins = "gpio20", "gpio21";
function = "qup6";
};
- qup_i2c8_data_clk: qup-i2c8-data-clk {
+ qup_i2c8_data_clk: qup-i2c8-data-clk-state {
pins = "gpio28", "gpio29";
function = "qup8";
};
- qup_i2c9_data_clk: qup-i2c9-data-clk {
+ qup_i2c9_data_clk: qup-i2c9-data-clk-state {
pins = "gpio32", "gpio33";
function = "qup9";
};
- qup_i2c10_data_clk: qup-i2c10-data-clk {
+ qup_i2c10_data_clk: qup-i2c10-data-clk-state {
pins = "gpio36", "gpio37";
function = "qup10";
};
- qup_i2c11_data_clk: qup-i2c11-data-clk {
+ qup_i2c11_data_clk: qup-i2c11-data-clk-state {
pins = "gpio40", "gpio41";
function = "qup11";
};
- qup_i2c12_data_clk: qup-i2c12-data-clk {
+ qup_i2c12_data_clk: qup-i2c12-data-clk-state {
pins = "gpio44", "gpio45";
function = "qup12";
};
- qup_i2c13_data_clk: qup-i2c13-data-clk {
+ qup_i2c13_data_clk: qup-i2c13-data-clk-state {
pins = "gpio48", "gpio49";
function = "qup13";
drive-strength = <2>;
bias-pull-up;
};
- qup_i2c14_data_clk: qup-i2c14-data-clk {
+ qup_i2c14_data_clk: qup-i2c14-data-clk-state {
pins = "gpio52", "gpio53";
function = "qup14";
drive-strength = <2>;
bias-pull-up;
};
- qup_i2c15_data_clk: qup-i2c15-data-clk {
+ qup_i2c15_data_clk: qup-i2c15-data-clk-state {
pins = "gpio56", "gpio57";
function = "qup15";
};
- qup_i2c16_data_clk: qup-i2c16-data-clk {
+ qup_i2c16_data_clk: qup-i2c16-data-clk-state {
pins = "gpio60", "gpio61";
function = "qup16";
};
- qup_i2c17_data_clk: qup-i2c17-data-clk {
+ qup_i2c17_data_clk: qup-i2c17-data-clk-state {
pins = "gpio64", "gpio65";
function = "qup17";
};
- qup_i2c18_data_clk: qup-i2c18-data-clk {
+ qup_i2c18_data_clk: qup-i2c18-data-clk-state {
pins = "gpio68", "gpio69";
function = "qup18";
};
- qup_i2c19_data_clk: qup-i2c19-data-clk {
+ qup_i2c19_data_clk: qup-i2c19-data-clk-state {
pins = "gpio72", "gpio73";
function = "qup19";
};
- qup_i2c20_data_clk: qup-i2c20-data-clk {
+ qup_i2c20_data_clk: qup-i2c20-data-clk-state {
pins = "gpio76", "gpio77";
function = "qup20";
};
- qup_i2c21_data_clk: qup-i2c21-data-clk {
+ qup_i2c21_data_clk: qup-i2c21-data-clk-state {
pins = "gpio80", "gpio81";
function = "qup21";
};
- qup_spi0_cs: qup-spi0-cs {
+ qup_spi0_cs: qup-spi0-cs-state {
pins = "gpio3";
function = "qup0";
};
- qup_spi0_data_clk: qup-spi0-data-clk {
+ qup_spi0_data_clk: qup-spi0-data-clk-state {
pins = "gpio0", "gpio1", "gpio2";
function = "qup0";
};
- qup_spi1_cs: qup-spi1-cs {
+ qup_spi1_cs: qup-spi1-cs-state {
pins = "gpio7";
function = "qup1";
};
- qup_spi1_data_clk: qup-spi1-data-clk {
+ qup_spi1_data_clk: qup-spi1-data-clk-state {
pins = "gpio4", "gpio5", "gpio6";
function = "qup1";
};
- qup_spi2_cs: qup-spi2-cs {
+ qup_spi2_cs: qup-spi2-cs-state {
pins = "gpio11";
function = "qup2";
};
- qup_spi2_data_clk: qup-spi2-data-clk {
+ qup_spi2_data_clk: qup-spi2-data-clk-state {
pins = "gpio8", "gpio9", "gpio10";
function = "qup2";
};
- qup_spi3_cs: qup-spi3-cs {
+ qup_spi3_cs: qup-spi3-cs-state {
pins = "gpio15";
function = "qup3";
};
- qup_spi3_data_clk: qup-spi3-data-clk {
+ qup_spi3_data_clk: qup-spi3-data-clk-state {
pins = "gpio12", "gpio13", "gpio14";
function = "qup3";
};
- qup_spi4_cs: qup-spi4-cs {
+ qup_spi4_cs: qup-spi4-cs-state {
pins = "gpio19";
function = "qup4";
drive-strength = <6>;
bias-disable;
};
- qup_spi4_data_clk: qup-spi4-data-clk {
+ qup_spi4_data_clk: qup-spi4-data-clk-state {
pins = "gpio16", "gpio17", "gpio18";
function = "qup4";
};
- qup_spi5_cs: qup-spi5-cs {
+ qup_spi5_cs: qup-spi5-cs-state {
pins = "gpio85";
function = "qup5";
};
- qup_spi5_data_clk: qup-spi5-data-clk {
+ qup_spi5_data_clk: qup-spi5-data-clk-state {
pins = "gpio206", "gpio207", "gpio84";
function = "qup5";
};
- qup_spi6_cs: qup-spi6-cs {
+ qup_spi6_cs: qup-spi6-cs-state {
pins = "gpio23";
function = "qup6";
};
- qup_spi6_data_clk: qup-spi6-data-clk {
+ qup_spi6_data_clk: qup-spi6-data-clk-state {
pins = "gpio20", "gpio21", "gpio22";
function = "qup6";
};
- qup_spi8_cs: qup-spi8-cs {
+ qup_spi8_cs: qup-spi8-cs-state {
pins = "gpio31";
function = "qup8";
};
- qup_spi8_data_clk: qup-spi8-data-clk {
+ qup_spi8_data_clk: qup-spi8-data-clk-state {
pins = "gpio28", "gpio29", "gpio30";
function = "qup8";
};
- qup_spi9_cs: qup-spi9-cs {
+ qup_spi9_cs: qup-spi9-cs-state {
pins = "gpio35";
function = "qup9";
};
- qup_spi9_data_clk: qup-spi9-data-clk {
+ qup_spi9_data_clk: qup-spi9-data-clk-state {
pins = "gpio32", "gpio33", "gpio34";
function = "qup9";
};
- qup_spi10_cs: qup-spi10-cs {
+ qup_spi10_cs: qup-spi10-cs-state {
pins = "gpio39";
function = "qup10";
};
- qup_spi10_data_clk: qup-spi10-data-clk {
+ qup_spi10_data_clk: qup-spi10-data-clk-state {
pins = "gpio36", "gpio37", "gpio38";
function = "qup10";
};
- qup_spi11_cs: qup-spi11-cs {
+ qup_spi11_cs: qup-spi11-cs-state {
pins = "gpio43";
function = "qup11";
};
- qup_spi11_data_clk: qup-spi11-data-clk {
+ qup_spi11_data_clk: qup-spi11-data-clk-state {
pins = "gpio40", "gpio41", "gpio42";
function = "qup11";
};
- qup_spi12_cs: qup-spi12-cs {
+ qup_spi12_cs: qup-spi12-cs-state {
pins = "gpio47";
function = "qup12";
};
- qup_spi12_data_clk: qup-spi12-data-clk {
+ qup_spi12_data_clk: qup-spi12-data-clk-state {
pins = "gpio44", "gpio45", "gpio46";
function = "qup12";
};
- qup_spi13_cs: qup-spi13-cs {
+ qup_spi13_cs: qup-spi13-cs-state {
pins = "gpio51";
function = "qup13";
};
- qup_spi13_data_clk: qup-spi13-data-clk {
+ qup_spi13_data_clk: qup-spi13-data-clk-state {
pins = "gpio48", "gpio49", "gpio50";
function = "qup13";
};
- qup_spi14_cs: qup-spi14-cs {
+ qup_spi14_cs: qup-spi14-cs-state {
pins = "gpio55";
function = "qup14";
};
- qup_spi14_data_clk: qup-spi14-data-clk {
+ qup_spi14_data_clk: qup-spi14-data-clk-state {
pins = "gpio52", "gpio53", "gpio54";
function = "qup14";
};
- qup_spi15_cs: qup-spi15-cs {
+ qup_spi15_cs: qup-spi15-cs-state {
pins = "gpio59";
function = "qup15";
};
- qup_spi15_data_clk: qup-spi15-data-clk {
+ qup_spi15_data_clk: qup-spi15-data-clk-state {
pins = "gpio56", "gpio57", "gpio58";
function = "qup15";
};
- qup_spi16_cs: qup-spi16-cs {
+ qup_spi16_cs: qup-spi16-cs-state {
pins = "gpio63";
function = "qup16";
};
- qup_spi16_data_clk: qup-spi16-data-clk {
+ qup_spi16_data_clk: qup-spi16-data-clk-state {
pins = "gpio60", "gpio61", "gpio62";
function = "qup16";
};
- qup_spi17_cs: qup-spi17-cs {
+ qup_spi17_cs: qup-spi17-cs-state {
pins = "gpio67";
function = "qup17";
};
- qup_spi17_data_clk: qup-spi17-data-clk {
+ qup_spi17_data_clk: qup-spi17-data-clk-state {
pins = "gpio64", "gpio65", "gpio66";
function = "qup17";
};
- qup_spi18_cs: qup-spi18-cs {
+ qup_spi18_cs: qup-spi18-cs-state {
pins = "gpio71";
function = "qup18";
drive-strength = <6>;
bias-disable;
};
- qup_spi18_data_clk: qup-spi18-data-clk {
+ qup_spi18_data_clk: qup-spi18-data-clk-state {
pins = "gpio68", "gpio69", "gpio70";
function = "qup18";
drive-strength = <6>;
bias-disable;
};
- qup_spi19_cs: qup-spi19-cs {
+ qup_spi19_cs: qup-spi19-cs-state {
pins = "gpio75";
function = "qup19";
drive-strength = <6>;
bias-disable;
};
- qup_spi19_data_clk: qup-spi19-data-clk {
+ qup_spi19_data_clk: qup-spi19-data-clk-state {
pins = "gpio72", "gpio73", "gpio74";
function = "qup19";
drive-strength = <6>;
bias-disable;
};
- qup_spi20_cs: qup-spi20-cs {
+ qup_spi20_cs: qup-spi20-cs-state {
pins = "gpio79";
function = "qup20";
};
- qup_spi20_data_clk: qup-spi20-data-clk {
+ qup_spi20_data_clk: qup-spi20-data-clk-state {
pins = "gpio76", "gpio77", "gpio78";
function = "qup20";
};
- qup_spi21_cs: qup-spi21-cs {
+ qup_spi21_cs: qup-spi21-cs-state {
pins = "gpio83";
function = "qup21";
};
- qup_spi21_data_clk: qup-spi21-data-clk {
+ qup_spi21_data_clk: qup-spi21-data-clk-state {
pins = "gpio80", "gpio81", "gpio82";
function = "qup21";
};
- qup_uart7_rx: qup-uart7-rx {
+ qup_uart7_rx: qup-uart7-rx-state {
pins = "gpio26";
function = "qup7";
drive-strength = <2>;
bias-disable;
};
- qup_uart7_tx: qup-uart7-tx {
+ qup_uart7_tx: qup-uart7-tx-state {
pins = "gpio27";
function = "qup7";
drive-strength = <2>;
bias-disable;
};
- qup_uart20_default: qup-uart20-default {
+ qup_uart20_default: qup-uart20-default-state {
pins = "gpio76", "gpio77", "gpio78", "gpio79";
function = "qup20";
};
@@ -3069,7 +3094,9 @@
ufs_mem_hc: ufshc@1d84000 {
compatible = "qcom,sm8450-ufshc", "qcom,ufshc",
"jedec,ufs-2.0";
- reg = <0 0x01d84000 0 0x3000>;
+ reg = <0 0x01d84000 0 0x3000>,
+ <0 0x01d88000 0 0x8000>;
+ reg-names = "std", "ice";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
phys = <&ufs_mem_phy_lanes>;
phy-names = "ufsphy";
@@ -3093,7 +3120,8 @@
"ref_clk",
"tx_lane0_sync_clk",
"rx_lane0_sync_clk",
- "rx_lane1_sync_clk";
+ "rx_lane1_sync_clk",
+ "ice_core_clk";
clocks =
<&gcc GCC_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
@@ -3102,7 +3130,8 @@
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
- <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
+ <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,
+ <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
freq-table-hz =
<75000000 300000000>,
<0 0>,
@@ -3111,13 +3140,14 @@
<75000000 300000000>,
<0 0>,
<0 0>,
- <0 0>;
+ <0 0>,
+ <75000000 300000000>;
status = "disabled";
};
ufs_mem_phy: phy@1d87000 {
compatible = "qcom,sm8450-qmp-ufs-phy";
- reg = <0 0x01d87000 0 0xe10>;
+ reg = <0 0x01d87000 0 0x1c4>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -3140,6 +3170,45 @@
};
};
+ sdhc_2: sdhci@8804000 {
+ compatible = "qcom,sm8450-sdhci", "qcom,sdhci-msm-v5";
+ reg = <0 0x08804000 0 0x1000>;
+
+ interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "core", "xo";
+ resets = <&gcc GCC_SDCC2_BCR>;
+ interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
+ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
+ interconnect-names = "sdhc-ddr","cpu-sdhc";
+ iommus = <&apps_smmu 0x4a0 0x0>;
+ power-domains = <&rpmhpd SM8450_CX>;
+ operating-points-v2 = <&sdhc2_opp_table>;
+ bus-width = <4>;
+ dma-coherent;
+
+ status = "disabled";
+
+ sdhc2_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-202000000 {
+ opp-hz = /bits/ 64 <202000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+ };
+ };
+
usb_1: usb@a6f8800 {
compatible = "qcom,sm8450-dwc3", "qcom,dwc3";
reg = <0 0x0a6f8800 0 0x400>;
generated by cgit v1.2.3 (git 2.39.0) at 2025-01-21 09:41:49 +0300