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Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi')
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 56749cfe7c33..8ac80a136c37 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -22,6 +22,16 @@
serial0 = &uart0;
};
+ backlight_lcd0: backlight-lcd0 {
+ compatible = "pwm-backlight";
+ brightness-levels = <0 1023>;
+ default-brightness-level = <576>;
+ enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
+ num-interpolated-steps = <1023>;
+ pwms = <&disp_pwm0 0 500000>;
+ power-supply = <&ppvar_sys>;
+ };
+
chosen {
stdout-path = "serial0:115200n8";
};
@@ -212,6 +222,13 @@
};
};
+&disp_pwm0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&disp_pwm0_pin_default>;
+};
+
&dp_tx {
status = "okay";
@@ -238,6 +255,11 @@
};
};
+&gpu {
+ status = "okay";
+ mali-supply = <&mt6315_7_vbuck1>;
+};
+
&i2c0 {
status = "okay";
@@ -648,6 +670,13 @@
};
};
+ disp_pwm0_pin_default: disp-pwm0-default-pins {
+ pins-disp-pwm {
+ pinmux = <PINMUX_GPIO82__FUNC_GPIO82>,
+ <PINMUX_GPIO97__FUNC_DISP_PWM0>;
+ };
+ };
+
dptx_pin: dptx-default-pins {
pins-cmd-dat {
pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>;