diff options
Diffstat (limited to 'arch/arm/mach-omap2')
39 files changed, 318 insertions, 440 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 1a648e9dfaa0..5a0b380a8166 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -92,9 +92,9 @@ config ARCH_OMAP2PLUS select ARCH_HAS_BANDGAP select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_OMAP - select ARCH_REQUIRE_GPIOLIB select CLKSRC_MMIO select GENERIC_IRQ_CHIP + select GPIOLIB select MACH_OMAP_GENERIC select MEMORY select MFD_SYSCON diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 04e276ce8413..a7f2d051f524 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -8,7 +8,7 @@ ccflags-y := -I$(srctree)/$(src)/include \ # Common support obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o timer.o pm.o \ common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ - omap_device.o sram.o drm.o + omap_device.o omap-headsmp.o sram.o drm.o hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ omap_hwmod_common_data.o @@ -32,7 +32,7 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o # SMP support ONLY available for OMAP4 -smp-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o +smp-$(CONFIG_SMP) += omap-smp.o smp-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o omap-4-5-common = omap4-common.o omap-wakeupgen.o obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y) sleep44xx.o @@ -78,13 +78,16 @@ obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o endif # Power Management +omap-4-5-pm-common = omap-mpuss-lowpower.o +obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-pm-common) +obj-$(CONFIG_ARCH_OMAP5) += $(omap-4-5-pm-common) obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o ifeq ($(CONFIG_PM),y) obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o -omap-4-5-pm-common = pm44xx.o omap-mpuss-lowpower.o +omap-4-5-pm-common += pm44xx.o obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-pm-common) obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-pm-common) obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-pm-common) diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index d9c3ffc39329..390795b334c3 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -39,7 +39,7 @@ #include "gpmc.h" #include "gpmc-smsc911x.h" -#include <video/omapdss.h> +#include <linux/platform_data/omapdss.h> #include <video/omap-panel-data.h> #include "board-flash.h" @@ -47,6 +47,7 @@ #include "hsmmc.h" #include "control.h" #include "common-board-devices.h" +#include "display.h" #define LDP_SMSC911X_CS 1 #define LDP_SMSC911X_GPIO 152 diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 9a7073949d1d..a5ab712c1a59 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -1242,11 +1242,6 @@ static struct pwm_omap_dmtimer_pdata __maybe_unused pwm_dmtimer_pdata = { #if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE) static struct lirc_rx51_platform_data rx51_lirc_data = { .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat, - .pwm_timer = 9, /* Use GPT 9 for CIR */ -#if IS_ENABLED(CONFIG_OMAP_DM_TIMER) - .dmtimer = &pwm_dmtimer_pdata, -#endif - }; static struct platform_device rx51_lirc_device = { diff --git a/arch/arm/mach-omap2/board-rx51-video.c b/arch/arm/mach-omap2/board-rx51-video.c index 9cfebc5c7455..180c6aa633bd 100644 --- a/arch/arm/mach-omap2/board-rx51-video.c +++ b/arch/arm/mach-omap2/board-rx51-video.c @@ -15,13 +15,14 @@ #include <linux/spi/spi.h> #include <linux/mm.h> #include <asm/mach-types.h> -#include <video/omapdss.h> +#include <linux/platform_data/omapdss.h> #include <video/omap-panel-data.h> #include <linux/platform_data/spi-omap2-mcspi.h> #include "soc.h" #include "board-rx51.h" +#include "display.h" #include "mux.h" @@ -32,7 +33,6 @@ static struct connector_atv_platform_data rx51_tv_pdata = { .name = "tv", .source = "venc.0", - .connector_type = OMAP_DSS_VENC_TYPE_COMPOSITE, .invert_polarity = false, }; diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 2da3b5ec010c..b79b1ca9aee9 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -465,10 +465,7 @@ int clkdm_complete_init(void) return -EACCES; list_for_each_entry(clkdm, &clkdm_list, node) { - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - clkdm_wakeup(clkdm); - else if (clkdm->flags & CLKDM_CAN_DISABLE_AUTO) - clkdm_deny_idle(clkdm); + clkdm_deny_idle(clkdm); _resolve_clkdm_deps(clkdm, clkdm->wkdep_srcs); clkdm_clear_all_wkdeps(clkdm); @@ -925,11 +922,20 @@ void clkdm_allow_idle_nolock(struct clockdomain *clkdm) if (!clkdm) return; - if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) { - pr_debug("clock: %s: automatic idle transitions cannot be enabled\n", - clkdm->name); + if (!WARN_ON(!clkdm->forcewake_count)) + clkdm->forcewake_count--; + + if (clkdm->forcewake_count) + return; + + if (!clkdm->usecount && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) + clkdm_sleep_nolock(clkdm); + + if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) + return; + + if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) return; - } if (!arch_clkdm || !arch_clkdm->clkdm_allow_idle) return; @@ -974,11 +980,17 @@ void clkdm_deny_idle_nolock(struct clockdomain *clkdm) if (!clkdm) return; - if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) { - pr_debug("clockdomain: %s: automatic idle transitions cannot be disabled\n", - clkdm->name); + if (clkdm->forcewake_count++) + return; + + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + clkdm_wakeup_nolock(clkdm); + + if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) + return; + + if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) return; - } if (!arch_clkdm || !arch_clkdm->clkdm_deny_idle) return; diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 2c398ce1a0f2..24667a5a9dc0 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -114,6 +114,7 @@ struct omap_hwmod; * @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up * @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact * @usecount: Usecount tracking + * @forcewake_count: Usecount for forcing the domain active * @node: list_head to link all clockdomains together * * @prcm_partition should be a macro from mach-omap2/prcm44xx.h (OMAP4 only) @@ -138,6 +139,7 @@ struct clockdomain { struct clkdm_dep *wkdep_srcs; struct clkdm_dep *sleepdep_srcs; int usecount; + int forcewake_count; struct list_head node; }; diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index 7b181f929525..c073fb57dd13 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -220,6 +220,9 @@ static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs, { int i = 0; + if (!clkctrl_offs) + return 0; + omap_test_timeout(_is_module_ready(inst, clkctrl_offs), MAX_MODULE_READY_TIME, i); diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c index 187fa4386718..d91ae8206d1e 100644 --- a/arch/arm/mach-omap2/cm3xxx.c +++ b/arch/arm/mach-omap2/cm3xxx.c @@ -649,7 +649,7 @@ void omap3_cm_save_scratchpad_contents(u32 *ptr) /* * As per erratum i671, ROM code does not respect the PER DPLL * programming scheme if CM_AUTOIDLE_PLL..AUTO_PERIPH_DPLL == 1. - * Then, in anycase, clear these bits to avoid extra latencies. + * Then, in any case, clear these bits to avoid extra latencies. */ *ptr++ = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE) & ~OMAP3430_AUTO_PERIPH_DPLL_MASK; diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index f7666b9f3b21..deed42e1dd9c 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -257,18 +257,22 @@ extern void gic_dist_enable(void); extern bool gic_dist_disabled(void); extern void gic_timer_retrigger(void); extern void omap_smc1(u32 fn, u32 arg); +extern void omap4_sar_ram_init(void); extern void __iomem *omap4_get_sar_ram_base(void); +extern void omap4_mpuss_early_init(void); extern void omap_do_wfi(void); -#ifdef CONFIG_SMP -/* Needed for secondary core boot */ extern void omap4_secondary_startup(void); extern void omap4460_secondary_startup(void); + +#ifdef CONFIG_SMP +/* Needed for secondary core boot */ extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); extern void omap_auxcoreboot_addr(u32 cpu_addr); extern u32 omap_read_auxcoreboot0(void); extern void omap4_cpu_die(unsigned int cpu); +extern int omap4_cpu_kill(unsigned int cpu); extern const struct smp_operations omap4_smp_ops; diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index 4b8e9f4d59ea..fa138d4032b6 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -140,7 +140,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, mpuss_can_lose_context) gic_dist_disable(); - clkdm_wakeup(cpu_clkdm[1]); + clkdm_deny_idle(cpu_clkdm[1]); omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON); clkdm_allow_idle(cpu_clkdm[1]); diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 6ab13d18c636..70b3eaf085e4 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -29,7 +29,7 @@ #include <linux/mfd/syscon.h> #include <linux/regmap.h> -#include <video/omapdss.h> +#include <linux/platform_data/omapdss.h> #include "omap_hwmod.h" #include "omap_device.h" #include "omap-pm.h" diff --git a/arch/arm/mach-omap2/display.h b/arch/arm/mach-omap2/display.h index 7375854b16c7..78f253005279 100644 --- a/arch/arm/mach-omap2/display.h +++ b/arch/arm/mach-omap2/display.h @@ -33,4 +33,9 @@ int omap_init_vout(void); struct device_node * __init omapdss_find_dss_of_node(void); +struct omap_dss_board_info; + +/* Init with the board info */ +int omap_display_init(struct omap_dss_board_info *board_data); + #endif diff --git a/arch/arm/mach-omap2/dss-common.c b/arch/arm/mach-omap2/dss-common.c index ea2be0f5953b..1d583bc0b1a9 100644 --- a/arch/arm/mach-omap2/dss-common.c +++ b/arch/arm/mach-omap2/dss-common.c @@ -27,7 +27,7 @@ #include <linux/gpio.h> #include <linux/platform_device.h> -#include <video/omapdss.h> +#include <linux/platform_data/omapdss.h> #include <video/omap-panel-data.h> #include "soc.h" diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 49de4dd227be..0e9acdd95d70 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -690,6 +690,8 @@ void __init omap4430_init_early(void) omap4xxx_check_revision(); omap4xxx_check_features(); omap2_prcm_base_init(); + omap4_sar_ram_init(); + omap4_mpuss_early_init(); omap4_pm_init_early(); omap44xx_voltagedomains_init(); omap44xx_powerdomains_init(); @@ -718,6 +720,7 @@ void __init omap5_init_early(void) omap4_pm_init_early(); omap2_prcm_base_init(); omap5xxx_check_revision(); + omap4_sar_ram_init(); omap54xx_voltagedomains_init(); omap54xx_powerdomains_init(); omap54xx_clockdomains_init(); diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index b4ac3af1160c..fc04be74e064 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -34,18 +34,24 @@ #include "cm3xxx.h" #include "cm-regbits-34xx.h" -static struct clk *mcbsp_iclks[5]; - -static int omap3_enable_st_clock(unsigned int id, bool enable) +static int omap3_mcbsp_force_ick_on(struct clk *clk, bool force_on) { - /* - * Sidetone uses McBSP ICLK - which must not idle when sidetones - * are enabled or sidetones start sounding ugly. - */ - if (enable) - return omap2_clk_deny_idle(mcbsp_iclks[id]); + if (!clk) + return 0; + + if (force_on) + return omap2_clk_deny_idle(clk); else - return omap2_clk_allow_idle(mcbsp_iclks[id]); + return omap2_clk_allow_idle(clk); +} + +void __init omap3_mcbsp_init_pdata_callback( + struct omap_mcbsp_platform_data *pdata) +{ + if (!pdata) + return; + + pdata->force_ick_on = omap3_mcbsp_force_ick_on; } static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused) @@ -55,7 +61,6 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused) struct omap_hwmod *oh_device[2]; struct omap_mcbsp_platform_data *pdata = NULL; struct platform_device *pdev; - char clk_name[11]; sscanf(oh->name, "mcbsp%d", &id); @@ -96,9 +101,7 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused) if (oh->dev_attr) { oh_device[1] = omap_hwmod_lookup(( (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); - pdata->enable_st_clock = omap3_enable_st_clock; - sprintf(clk_name, "mcbsp%d_ick", id); - mcbsp_iclks[id] = clk_get(NULL, clk_name); + pdata->force_ick_on = omap3_mcbsp_force_ick_on; count++; } pdev = omap_device_build_ss(name, id, oh_device, count, pdata, diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c index be271f1d585b..393e687f99e2 100644 --- a/arch/arm/mach-omap2/mux34xx.c +++ b/arch/arm/mach-omap2/mux34xx.c @@ -1266,7 +1266,7 @@ static struct omap_ball __initdata omap3_cus_ball[] = { #endif /* - * Signals different on CBB package comapared to superset + * Signals different on CBB package compared to superset */ #if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBB) static struct omap_mux __initdata omap3_cbb_subset[] = { @@ -1597,7 +1597,7 @@ static struct omap_ball __initdata omap3_cbb_ball[] = { #endif /* - * Signals different on 36XX CBP package comapared to 34XX CBC package + * Signals different on 36XX CBP package compared to 34XX CBC package */ #if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBP) static struct omap_mux __initdata omap36xx_cbp_subset[] = { diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S index 6d1dffca6c7b..fe36ce2734d4 100644 --- a/arch/arm/mach-omap2/omap-headsmp.S +++ b/arch/arm/mach-omap2/omap-headsmp.S @@ -24,6 +24,16 @@ #define AUX_CORE_BOOT0_PA 0x48281800 #define API_HYP_ENTRY 0x102 +ENTRY(omap_secondary_startup) +#ifdef CONFIG_SMP + b secondary_startup +#else +/* Should never get here */ +again: wfi + b again +#endif +#ENDPROC(omap_secondary_startup) + /* * OMAP5 specific entry point for secondary CPU to jump from ROM * code. This routine also provides a holding flag into which @@ -39,7 +49,7 @@ wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 and r4, r4, #0x0f cmp r0, r4 bne wait - b secondary_startup + b omap_secondary_startup ENDPROC(omap5_secondary_startup) /* * Same as omap5_secondary_startup except we call into the ROM to @@ -59,7 +69,7 @@ wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 adr r0, hyp_boot smc #0 hyp_boot: - b secondary_startup + b omap_secondary_startup ENDPROC(omap5_secondary_hyp_startup) /* * OMAP4 specific entry point for secondary CPU to jump from ROM @@ -82,7 +92,7 @@ hold: ldr r12,=0x103 * we've been released from the wait loop,secondary_stack * should now contain the SVC stack for this core */ - b secondary_startup + b omap_secondary_startup ENDPROC(omap4_secondary_startup) ENTRY(omap4460_secondary_startup) @@ -119,5 +129,5 @@ hold_2: ldr r12,=0x103 * we've been released from the wait loop,secondary_stack * should now contain the SVC stack for this core */ - b secondary_startup + b omap_secondary_startup ENDPROC(omap4460_secondary_startup) diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c index 593fec753b28..d3fb5661bb5d 100644 --- a/arch/arm/mach-omap2/omap-hotplug.c +++ b/arch/arm/mach-omap2/omap-hotplug.c @@ -64,3 +64,9 @@ void omap4_cpu_die(unsigned int cpu) pr_debug("CPU%u: spurious wakeup call\n", cpu); } } + +/* Needed by kexec and platform_can_cpu_hotplug() */ +int omap4_cpu_kill(unsigned int cpu) +{ + return 1; +} diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index 65024af169d3..ad982465efd0 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -62,7 +62,9 @@ #include "prm44xx.h" #include "prm-regbits-44xx.h" -#ifdef CONFIG_SMP +static void __iomem *sar_base; + +#if defined(CONFIG_PM) && defined(CONFIG_SMP) struct omap4_cpu_pm_info { struct powerdomain *pwrdm; @@ -90,7 +92,6 @@ struct cpu_pm_ops { static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info); static struct powerdomain *mpuss_pd; -static void __iomem *sar_base; static u32 cpu_context_offset; static int default_finish_suspend(unsigned long cpu_state) @@ -366,9 +367,6 @@ int __init omap4_mpuss_init(void) return -ENODEV; } - if (cpu_is_omap44xx()) - sar_base = omap4_get_sar_ram_base(); - /* Initilaise per CPU PM information */ pm_info = &per_cpu(omap4_pm_info, 0x0); if (sar_base) { @@ -444,3 +442,26 @@ int __init omap4_mpuss_init(void) } #endif + +/* + * For kexec, we must set CPU1_WAKEUP_NS_PA_ADDR to point to + * current kernel's secondary_startup() early before + * clockdomains_init(). Otherwise clockdomain_init() can + * wake CPU1 and cause a hang. + */ +void __init omap4_mpuss_early_init(void) +{ + unsigned long startup_pa; + + if (!cpu_is_omap44xx()) + return; + + sar_base = omap4_get_sar_ram_base(); + + if (cpu_is_omap443x()) + startup_pa = virt_to_phys(omap4_secondary_startup); + else + startup_pa = virt_to_phys(omap4460_secondary_startup); + + writel_relaxed(startup_pa, sar_base + CPU1_WAKEUP_NS_PA_ADDR_OFFSET); +} diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 8cd1de914ee4..b4de3da6dffa 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -40,14 +40,35 @@ #define OMAP5_CORE_COUNT 0x2 -/* SCU base address */ -static void __iomem *scu_base; +struct omap_smp_config { + unsigned long cpu1_rstctrl_pa; + void __iomem *cpu1_rstctrl_va; + void __iomem *scu_base; + void *startup_addr; +}; + +static struct omap_smp_config cfg; + +static const struct omap_smp_config omap443x_cfg __initconst = { + .cpu1_rstctrl_pa = 0x4824380c, + .startup_addr = omap4_secondary_startup, +}; + +static const struct omap_smp_config omap446x_cfg __initconst = { + .cpu1_rstctrl_pa = 0x4824380c, + .startup_addr = omap4460_secondary_startup, +}; + +static const struct omap_smp_config omap5_cfg __initconst = { + .cpu1_rstctrl_pa = 0x48243810, + .startup_addr = omap5_secondary_startup, +}; static DEFINE_SPINLOCK(boot_lock); void __iomem *omap4_get_scu_base(void) { - return scu_base; + return cfg.scu_base; } #ifdef CONFIG_OMAP5_ERRATA_801819 @@ -93,7 +114,7 @@ static void omap4_secondary_init(unsigned int cpu) * OMAP443X GP devices- SMP bit isn't accessible. * OMAP446X GP devices - SMP bit access is enabled on both CPUs. */ - if (cpu_is_omap443x() && (omap_type() != OMAP2_DEVICE_TYPE_GP)) + if (soc_is_omap443x() && (omap_type() != OMAP2_DEVICE_TYPE_GP)) omap_secure_dispatcher(OMAP4_PPA_CPU_ACTRL_SMP_INDEX, 4, 0, 0, 0, 0, 0); @@ -179,7 +200,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) * Ensure that CPU power state is set to ON to avoid CPU * powerdomain transition on wfi */ - clkdm_wakeup_nolock(cpu1_clkdm); + clkdm_deny_idle_nolock(cpu1_clkdm); pwrdm_set_next_pwrst(cpu1_pwrdm, PWRDM_POWER_ON); clkdm_allow_idle_nolock(cpu1_clkdm); @@ -222,9 +243,9 @@ static void __init omap4_smp_init_cpus(void) * Currently we can't call ioremap here because * SoC detection won't work until after init_early. */ - scu_base = OMAP2_L4_IO_ADDRESS(scu_a9_get_base()); - BUG_ON(!scu_base); - ncores = scu_get_core_count(scu_base); + cfg.scu_base = OMAP2_L4_IO_ADDRESS(scu_a9_get_base()); + BUG_ON(!cfg.scu_base); + ncores = scu_get_core_count(cfg.scu_base); } else if (cpu_id == CPU_CORTEX_A15) { ncores = OMAP5_CORE_COUNT; } @@ -242,20 +263,51 @@ static void __init omap4_smp_init_cpus(void) static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) { - void *startup_addr = omap4_secondary_startup; void __iomem *base = omap_get_wakeupgen_base(); + const struct omap_smp_config *c = NULL; + + if (soc_is_omap443x()) + c = &omap443x_cfg; + else if (soc_is_omap446x()) + c = &omap446x_cfg; + else if (soc_is_dra74x() || soc_is_omap54xx()) + c = &omap5_cfg; + + if (!c) { + pr_err("%s Unknown SMP SoC?\n", __func__); + return; + } + + /* Must preserve cfg.scu_base set earlier */ + cfg.cpu1_rstctrl_pa = c->cpu1_rstctrl_pa; + cfg.startup_addr = c->startup_addr; + + if (soc_is_dra74x() || soc_is_omap54xx()) { + if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE) + cfg.startup_addr = omap5_secondary_hyp_startup; + omap5_erratum_workaround_801819(); + } + + cfg.cpu1_rstctrl_va = ioremap(cfg.cpu1_rstctrl_pa, 4); + if (!cfg.cpu1_rstctrl_va) + return; /* * Initialise the SCU and wake up the secondary core using * wakeup_secondary(). */ - if (scu_base) - scu_enable(scu_base); + if (cfg.scu_base) + scu_enable(cfg.scu_base); - if (cpu_is_omap446x()) - startup_addr = omap4460_secondary_startup; - if (soc_is_dra74x() || soc_is_omap54xx()) - omap5_erratum_workaround_801819(); + /* + * Reset CPU1 before configuring, otherwise kexec will + * end up trying to use old kernel startup address. + */ + if (cfg.cpu1_rstctrl_va) { + writel_relaxed(1, cfg.cpu1_rstctrl_va); + readl_relaxed(cfg.cpu1_rstctrl_va); + writel_relaxed(0, cfg.cpu1_rstctrl_va); + } /* * Write the address of secondary startup routine into the @@ -264,19 +316,10 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) * A barrier is added to ensure that write buffer is drained */ if (omap_secure_apis_support()) - omap_auxcoreboot_addr(virt_to_phys(startup_addr)); + omap_auxcoreboot_addr(virt_to_phys(cfg.startup_addr)); else - /* - * If the boot CPU is in HYP mode then start secondary - * CPU in HYP mode as well. - */ - if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE) - writel_relaxed(virt_to_phys(omap5_secondary_hyp_startup), - base + OMAP_AUX_CORE_BOOT_1); - else - writel_relaxed(virt_to_phys(omap5_secondary_startup), - base + OMAP_AUX_CORE_BOOT_1); - + writel_relaxed(virt_to_phys(cfg.startup_addr), + base + OMAP_AUX_CORE_BOOT_1); } const struct smp_operations omap4_smp_ops __initconst = { @@ -286,5 +329,6 @@ const struct smp_operations omap4_smp_ops __initconst = { .smp_boot_secondary = omap4_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_die = omap4_cpu_die, + .cpu_kill = omap4_cpu_kill, #endif }; diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 949696b6f17b..cf65ab8bb004 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -61,7 +61,7 @@ static phys_addr_t dram_sync_paddr; static u32 dram_sync_size; /* - * The OMAP4 bus structure contains asynchrnous bridges which can buffer + * The OMAP4 bus structure contains asynchronous bridges which can buffer * data writes from the MPU. These asynchronous bridges can be found on * paths between the MPU to EMIF, and the MPU to L3 interconnects. * @@ -266,10 +266,11 @@ void __iomem *omap4_get_sar_ram_base(void) } /* - * SAR RAM used to save and restore the HW - * context in low power modes + * SAR RAM used to save and restore the HW context in low power modes. + * Note that we need to initialize this very early for kexec. See + * omap4_mpuss_early_init(). */ -static int __init omap4_sar_ram_init(void) +void __init omap4_sar_ram_init(void) { unsigned long sar_base; @@ -282,16 +283,13 @@ static int __init omap4_sar_ram_init(void) else if (soc_is_omap54xx()) sar_base = OMAP54XX_SAR_RAM_BASE; else - return -ENOMEM; + return; /* Static mapping, never released */ sar_ram_base = ioremap(sar_base, SZ_16K); if (WARN_ON(!sar_ram_base)) - return -ENOMEM; - - return 0; + return; } -omap_early_initcall(omap4_sar_ram_init); static const struct of_device_id intc_match[] = { { .compatible = "ti,omap4-wugen-mpu", }, diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c index f7ff3b9dad87..e920dd83e443 100644 --- a/arch/arm/mach-omap2/omap_device.c +++ b/arch/arm/mach-omap2/omap_device.c @@ -63,7 +63,22 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias, return; } - rc = clk_add_alias(clk_alias, dev_name(&od->pdev->dev), clk_name, NULL); + r = clk_get_sys(NULL, clk_name); + + if (IS_ERR(r) && of_have_populated_dt()) { + struct of_phandle_args clkspec; + + clkspec.np = of_find_node_by_name(NULL, clk_name); + + r = of_clk_get_from_provider(&clkspec); + + rc = clk_register_clkdev(r, clk_alias, + dev_name(&od->pdev->dev)); + } else { + rc = clk_add_alias(clk_alias, dev_name(&od->pdev->dev), + clk_name, NULL); + } + if (rc) { if (rc == -ENODEV || rc == -ENOMEM) dev_err(&od->pdev->dev, @@ -194,7 +209,7 @@ static int _omap_device_notifier_call(struct notifier_block *nb, int err; switch (event) { - case BUS_NOTIFY_DEL_DEVICE: + case BUS_NOTIFY_REMOVED_DEVICE: if (pdev->archdata.od) omap_device_delete(pdev->archdata.od); break; @@ -268,7 +283,7 @@ static int _omap_device_idle_hwmods(struct omap_device *od) * function returns a value different than the value the caller got * the last time it called this function. * - * If any hwmods exist for the omap_device assoiated with @pdev, + * If any hwmods exist for the omap_device associated with @pdev, * return the context loss counter for that hwmod, otherwise return * zero. */ diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 83cb527755a9..5b709383381c 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -178,6 +178,11 @@ */ #define OMAP4_RST_CTRL_ST_OFFSET 4 +/* + * Maximum length for module clock handle names + */ +#define MOD_CLK_MAX_NAME_LEN 32 + /** * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations * @enable_module: function to enable a module (via MODULEMODE) @@ -200,6 +205,7 @@ struct omap_hwmod_soc_ops { int (*init_clkdm)(struct omap_hwmod *oh); void (*update_context_lost)(struct omap_hwmod *oh); int (*get_context_lost)(struct omap_hwmod *oh); + int (*disable_direct_prcm)(struct omap_hwmod *oh); }; /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ @@ -776,17 +782,35 @@ static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) * @oh: struct omap_hwmod * * * Called from _init_clocks(). Populates the @oh _clk (main - * functional clock pointer) if a main_clk is present. Returns 0 on - * success or -EINVAL on error. + * functional clock pointer) if a clock matching the hwmod name is found, + * or a main_clk is present. Returns 0 on success or -EINVAL on error. */ static int _init_main_clk(struct omap_hwmod *oh) { int ret = 0; + char name[MOD_CLK_MAX_NAME_LEN]; + struct clk *clk; - if (!oh->main_clk) - return 0; + /* +7 magic comes from '_mod_ck' suffix */ + if (strlen(oh->name) + 7 > MOD_CLK_MAX_NAME_LEN) + pr_warn("%s: warning: cropping name for %s\n", __func__, + oh->name); + + strncpy(name, oh->name, MOD_CLK_MAX_NAME_LEN - 7); + strcat(name, "_mod_ck"); + + clk = clk_get(NULL, name); + if (!IS_ERR(clk)) { + oh->_clk = clk; + soc_ops.disable_direct_prcm(oh); + oh->main_clk = kstrdup(name, GFP_KERNEL); + } else { + if (!oh->main_clk) + return 0; + + oh->_clk = clk_get(NULL, oh->main_clk); + } - oh->_clk = clk_get(NULL, oh->main_clk); if (IS_ERR(oh->_clk)) { pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n", oh->name, oh->main_clk); @@ -1678,7 +1702,6 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; int ret = -EINVAL; - int hwsup = 0; if (!oh) return -EINVAL; @@ -1696,7 +1719,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) * might not be completed. The clockdomain can be set * in HW_AUTO only when the module become ready. */ - hwsup = clkdm_in_hwsup(oh->clkdm); + clkdm_deny_idle(oh->clkdm); ret = clkdm_hwmod_enable(oh->clkdm, oh); if (ret) { WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", @@ -1723,8 +1746,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) * Set the clockdomain to HW_AUTO, assuming that the * previous state was HW_AUTO. */ - if (hwsup) - clkdm_allow_idle(oh->clkdm); + clkdm_allow_idle(oh->clkdm); clkdm_hwmod_disable(oh->clkdm, oh); } @@ -2078,7 +2100,6 @@ static int _enable_preprogram(struct omap_hwmod *oh) static int _enable(struct omap_hwmod *oh) { int r; - int hwsup = 0; pr_debug("omap_hwmod: %s: enabling\n", oh->name); @@ -2138,8 +2159,7 @@ static int _enable(struct omap_hwmod *oh) * completely the module. The clockdomain can be set * in HW_AUTO only when the module become ready. */ - hwsup = clkdm_in_hwsup(oh->clkdm) && - !clkdm_missing_idle_reporting(oh->clkdm); + clkdm_deny_idle(oh->clkdm); r = clkdm_hwmod_enable(oh->clkdm, oh); if (r) { WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", @@ -2159,14 +2179,10 @@ static int _enable(struct omap_hwmod *oh) r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : -EINVAL; - if (!r) { - /* - * Set the clockdomain to HW_AUTO only if the target is ready, - * assuming that the previous state was HW_AUTO - */ - if (oh->clkdm && hwsup) - clkdm_allow_idle(oh->clkdm); + if (oh->clkdm) + clkdm_allow_idle(oh->clkdm); + if (!r) { oh->_state = _HWMOD_STATE_ENABLED; /* Access the sysconfig only if the target is ready */ @@ -2220,6 +2236,9 @@ static int _idle(struct omap_hwmod *oh) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); + if (oh->clkdm) + clkdm_deny_idle(oh->clkdm); + if (oh->flags & HWMOD_BLOCK_WFI) cpu_idle_poll_ctrl(false); if (soc_ops.disable_module) @@ -2232,8 +2251,10 @@ static int _idle(struct omap_hwmod *oh) * transition to complete properly. */ _disable_clocks(oh); - if (oh->clkdm) + if (oh->clkdm) { + clkdm_allow_idle(oh->clkdm); clkdm_hwmod_disable(oh->clkdm, oh); + } /* Mux pins for device idle if populated */ if (oh->mux && oh->mux->pads_dynamic) { @@ -3091,6 +3112,25 @@ static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, } /** + * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod + * @oh: struct omap_hwmod * to disable control for + * + * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod + * will be using its main_clk to enable/disable the module. Returns + * 0 if successful. + */ +static int _omap4_disable_direct_prcm(struct omap_hwmod *oh) +{ + if (!oh) + return -EINVAL; + + oh->prcm.omap4.clkctrl_offs = 0; + oh->prcm.omap4.modulemode = 0; + + return 0; +} + +/** * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args * @oh: struct omap_hwmod * to deassert hardreset * @ohri: hardreset line data @@ -3913,6 +3953,7 @@ void __init omap_hwmod_init(void) soc_ops.init_clkdm = _init_clkdm; soc_ops.update_context_lost = _omap4_update_context_lost; soc_ops.get_context_lost = _omap4_get_context_lost; + soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm; } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() || soc_is_am43xx()) { soc_ops.enable_module = _omap4_enable_module; @@ -3922,6 +3963,7 @@ void __init omap_hwmod_init(void) soc_ops.deassert_hardreset = _am33xx_deassert_hardreset; soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; soc_ops.init_clkdm = _init_clkdm; + soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm; } else { WARN(1, "omap_hwmod: unknown SoC type\n"); } diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h index 7f737965f543..d3e61d1a02d7 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h @@ -36,17 +36,8 @@ extern struct omap_hwmod_ocp_if am33xx_l4_per__gpio3; extern struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio; extern struct omap_hwmod_ocp_if am33xx_l4_ls__elm; extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0; -extern struct omap_hwmod_ocp_if am33xx_epwmss0__ecap0; -extern struct omap_hwmod_ocp_if am33xx_epwmss0__eqep0; -extern struct omap_hwmod_ocp_if am33xx_epwmss0__ehrpwm0; extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1; -extern struct omap_hwmod_ocp_if am33xx_epwmss1__ecap1; -extern struct omap_hwmod_ocp_if am33xx_epwmss1__eqep1; -extern struct omap_hwmod_ocp_if am33xx_epwmss1__ehrpwm1; extern struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2; -extern struct omap_hwmod_ocp_if am33xx_epwmss2__ecap2; -extern struct omap_hwmod_ocp_if am33xx_epwmss2__eqep2; -extern struct omap_hwmod_ocp_if am33xx_epwmss2__ehrpwm2; extern struct omap_hwmod_ocp_if am33xx_l3_s__gpmc; extern struct omap_hwmod_ocp_if am33xx_l4_per__i2c2; extern struct omap_hwmod_ocp_if am33xx_l4_per__i2c3; @@ -98,17 +89,8 @@ extern struct omap_hwmod am33xx_dcan0_hwmod; extern struct omap_hwmod am33xx_dcan1_hwmod; extern struct omap_hwmod am33xx_elm_hwmod; extern struct omap_hwmod am33xx_epwmss0_hwmod; -extern struct omap_hwmod am33xx_ecap0_hwmod; -extern struct omap_hwmod am33xx_eqep0_hwmod; -extern struct omap_hwmod am33xx_ehrpwm0_hwmod; extern struct omap_hwmod am33xx_epwmss1_hwmod; -extern struct omap_hwmod am33xx_ecap1_hwmod; -extern struct omap_hwmod am33xx_eqep1_hwmod; -extern struct omap_hwmod am33xx_ehrpwm1_hwmod; extern struct omap_hwmod am33xx_epwmss2_hwmod; -extern struct omap_hwmod am33xx_ecap2_hwmod; -extern struct omap_hwmod am33xx_eqep2_hwmod; -extern struct omap_hwmod am33xx_ehrpwm2_hwmod; extern struct omap_hwmod am33xx_gpio1_hwmod; extern struct omap_hwmod am33xx_gpio2_hwmod; extern struct omap_hwmod am33xx_gpio3_hwmod; diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c index 1c210cb2b8c1..10dff2f0086a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c @@ -176,28 +176,6 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0 = { .user = OCP_USER_MPU, }; -struct omap_hwmod_ocp_if am33xx_epwmss0__ecap0 = { - .master = &am33xx_epwmss0_hwmod, - .slave = &am33xx_ecap0_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - -struct omap_hwmod_ocp_if am33xx_epwmss0__eqep0 = { - .master = &am33xx_epwmss0_hwmod, - .slave = &am33xx_eqep0_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - -struct omap_hwmod_ocp_if am33xx_epwmss0__ehrpwm0 = { - .master = &am33xx_epwmss0_hwmod, - .slave = &am33xx_ehrpwm0_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - - static struct omap_hwmod_addr_space am33xx_epwmss1_addr_space[] = { { .pa_start = 0x48302000, @@ -215,27 +193,6 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1 = { .user = OCP_USER_MPU, }; -struct omap_hwmod_ocp_if am33xx_epwmss1__ecap1 = { - .master = &am33xx_epwmss1_hwmod, - .slave = &am33xx_ecap1_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - -struct omap_hwmod_ocp_if am33xx_epwmss1__eqep1 = { - .master = &am33xx_epwmss1_hwmod, - .slave = &am33xx_eqep1_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - -struct omap_hwmod_ocp_if am33xx_epwmss1__ehrpwm1 = { - .master = &am33xx_epwmss1_hwmod, - .slave = &am33xx_ehrpwm1_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod_addr_space am33xx_epwmss2_addr_space[] = { { .pa_start = 0x48304000, @@ -253,27 +210,6 @@ struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2 = { .user = OCP_USER_MPU, }; -struct omap_hwmod_ocp_if am33xx_epwmss2__ecap2 = { - .master = &am33xx_epwmss2_hwmod, - .slave = &am33xx_ecap2_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - -struct omap_hwmod_ocp_if am33xx_epwmss2__eqep2 = { - .master = &am33xx_epwmss2_hwmod, - .slave = &am33xx_eqep2_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - -struct omap_hwmod_ocp_if am33xx_epwmss2__ehrpwm2 = { - .master = &am33xx_epwmss2_hwmod, - .slave = &am33xx_ehrpwm2_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - /* l3s cfg -> gpmc */ struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = { .master = &am33xx_l3_s_hwmod, diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c index aed33621deeb..55c5878577f4 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c @@ -449,18 +449,6 @@ struct omap_hwmod_class am33xx_epwmss_hwmod_class = { .sysc = &am33xx_epwmss_sysc, }; -static struct omap_hwmod_class am33xx_ecap_hwmod_class = { - .name = "ecap", -}; - -static struct omap_hwmod_class am33xx_eqep_hwmod_class = { - .name = "eqep", -}; - -struct omap_hwmod_class am33xx_ehrpwm_hwmod_class = { - .name = "ehrpwm", -}; - /* epwmss0 */ struct omap_hwmod am33xx_epwmss0_hwmod = { .name = "epwmss0", @@ -474,30 +462,6 @@ struct omap_hwmod am33xx_epwmss0_hwmod = { }, }; -/* ecap0 */ -struct omap_hwmod am33xx_ecap0_hwmod = { - .name = "ecap0", - .class = &am33xx_ecap_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - -/* eqep0 */ -struct omap_hwmod am33xx_eqep0_hwmod = { - .name = "eqep0", - .class = &am33xx_eqep_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - -/* ehrpwm0 */ -struct omap_hwmod am33xx_ehrpwm0_hwmod = { - .name = "ehrpwm0", - .class = &am33xx_ehrpwm_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - /* epwmss1 */ struct omap_hwmod am33xx_epwmss1_hwmod = { .name = "epwmss1", @@ -511,30 +475,6 @@ struct omap_hwmod am33xx_epwmss1_hwmod = { }, }; -/* ecap1 */ -struct omap_hwmod am33xx_ecap1_hwmod = { - .name = "ecap1", - .class = &am33xx_ecap_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - -/* eqep1 */ -struct omap_hwmod am33xx_eqep1_hwmod = { - .name = "eqep1", - .class = &am33xx_eqep_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - -/* ehrpwm1 */ -struct omap_hwmod am33xx_ehrpwm1_hwmod = { - .name = "ehrpwm1", - .class = &am33xx_ehrpwm_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - /* epwmss2 */ struct omap_hwmod am33xx_epwmss2_hwmod = { .name = "epwmss2", @@ -548,30 +488,6 @@ struct omap_hwmod am33xx_epwmss2_hwmod = { }, }; -/* ecap2 */ -struct omap_hwmod am33xx_ecap2_hwmod = { - .name = "ecap2", - .class = &am33xx_ecap_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - -/* eqep2 */ -struct omap_hwmod am33xx_eqep2_hwmod = { - .name = "eqep2", - .class = &am33xx_eqep_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - -/* ehrpwm2 */ -struct omap_hwmod am33xx_ehrpwm2_hwmod = { - .name = "ehrpwm2", - .class = &am33xx_ehrpwm_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - /* * 'gpio' class: for gpio 0,1,2,3 */ @@ -1476,6 +1392,7 @@ static void omap_hwmod_am43xx_rst(void) { RSTCTRL(am33xx_pruss_hwmod, AM43XX_RM_PER_RSTCTRL_OFFSET); RSTCTRL(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTCTRL_OFFSET); + RSTST(am33xx_pruss_hwmod, AM43XX_RM_PER_RSTST_OFFSET); RSTST(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTST_OFFSET); } diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index cc0791d9125b..e1c2025d6d3e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -593,17 +593,8 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_ls__spinlock, &am33xx_l4_ls__elm, &am33xx_l4_ls__epwmss0, - &am33xx_epwmss0__ecap0, - &am33xx_epwmss0__eqep0, - &am33xx_epwmss0__ehrpwm0, &am33xx_l4_ls__epwmss1, - &am33xx_epwmss1__ecap1, - &am33xx_epwmss1__eqep1, - &am33xx_epwmss1__ehrpwm1, &am33xx_l4_ls__epwmss2, - &am33xx_epwmss2__ecap2, - &am33xx_epwmss2__eqep2, - &am33xx_epwmss2__ehrpwm2, &am33xx_l3_s__gpmc, &am33xx_l3_main__lcdc, &am33xx_l4_ls__mcspi0, diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 9869a75c5d96..d72ee6185d5e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1322,16 +1322,8 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { .name = "mcbsp2_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, - .main_clk = "mcbsp2_fck", - .prcm = { - .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP3430_EN_MCBSP2_SHIFT, - .module_offs = OMAP3430_PER_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, - }, - }, + .main_clk = "mcbsp2_ick", + .flags = HWMOD_NO_IDLEST, }; /* mcbsp3_sidetone */ @@ -1344,16 +1336,8 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { .name = "mcbsp3_sidetone", .class = &omap3xxx_mcbsp_sidetone_hwmod_class, .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, - .main_clk = "mcbsp3_fck", - .prcm = { - .omap2 = { - .prcm_reg_id = 1, - .module_bit = OMAP3430_EN_MCBSP3_SHIFT, - .module_offs = OMAP3430_PER_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, - }, - }, + .main_clk = "mcbsp3_ick", + .flags = HWMOD_NO_IDLEST, }; /* SR common */ diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index 97fd399202dc..61f2f301d739 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c @@ -202,13 +202,6 @@ static struct omap_hwmod am43xx_epwmss3_hwmod = { }, }; -static struct omap_hwmod am43xx_ehrpwm3_hwmod = { - .name = "ehrpwm3", - .class = &am33xx_ehrpwm_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - static struct omap_hwmod am43xx_epwmss4_hwmod = { .name = "epwmss4", .class = &am33xx_epwmss_hwmod_class, @@ -222,13 +215,6 @@ static struct omap_hwmod am43xx_epwmss4_hwmod = { }, }; -static struct omap_hwmod am43xx_ehrpwm4_hwmod = { - .name = "ehrpwm4", - .class = &am33xx_ehrpwm_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - static struct omap_hwmod am43xx_epwmss5_hwmod = { .name = "epwmss5", .class = &am33xx_epwmss_hwmod_class, @@ -242,13 +228,6 @@ static struct omap_hwmod am43xx_epwmss5_hwmod = { }, }; -static struct omap_hwmod am43xx_ehrpwm5_hwmod = { - .name = "ehrpwm5", - .class = &am33xx_ehrpwm_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "l4ls_gclk", -}; - static struct omap_hwmod am43xx_spi2_hwmod = { .name = "spi2", .class = &am33xx_spi_hwmod_class, @@ -744,13 +723,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss3 = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_ocp_if am43xx_epwmss3__ehrpwm3 = { - .master = &am43xx_epwmss3_hwmod, - .slave = &am43xx_ehrpwm3_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss4 = { .master = &am33xx_l4_ls_hwmod, .slave = &am43xx_epwmss4_hwmod, @@ -758,13 +730,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss4 = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_ocp_if am43xx_epwmss4__ehrpwm4 = { - .master = &am43xx_epwmss4_hwmod, - .slave = &am43xx_ehrpwm4_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss5 = { .master = &am33xx_l4_ls_hwmod, .slave = &am43xx_epwmss5_hwmod, @@ -772,13 +737,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss5 = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_ocp_if am43xx_epwmss5__ehrpwm5 = { - .master = &am43xx_epwmss5_hwmod, - .slave = &am43xx_ehrpwm5_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod_ocp_if am43xx_l4_ls__mcspi2 = { .master = &am33xx_l4_ls_hwmod, .slave = &am43xx_spi2_hwmod, @@ -919,11 +877,8 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am43xx_l4_ls__timer10, &am43xx_l4_ls__timer11, &am43xx_l4_ls__epwmss3, - &am43xx_epwmss3__ehrpwm3, &am43xx_l4_ls__epwmss4, - &am43xx_epwmss4__ehrpwm4, &am43xx_l4_ls__epwmss5, - &am43xx_epwmss5__ehrpwm5, &am43xx_l4_ls__mcspi2, &am43xx_l4_ls__mcspi3, &am43xx_l4_ls__mcspi4, @@ -982,17 +937,8 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_ls__spinlock, &am33xx_l4_ls__elm, &am33xx_l4_ls__epwmss0, - &am33xx_epwmss0__ecap0, - &am33xx_epwmss0__eqep0, - &am33xx_epwmss0__ehrpwm0, &am33xx_l4_ls__epwmss1, - &am33xx_epwmss1__ecap1, - &am33xx_epwmss1__eqep1, - &am33xx_epwmss1__ehrpwm1, &am33xx_l4_ls__epwmss2, - &am33xx_epwmss2__ecap2, - &am33xx_epwmss2__eqep2, - &am33xx_epwmss2__ehrpwm2, &am33xx_l3_s__gpmc, &am33xx_l4_ls__mcspi0, &am33xx_l4_ls__mcspi1, diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index d0e7e5259ec3..1ab7096af8e2 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -2905,58 +2905,27 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__tptc1 = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space dra7xx_dss_addrs[] = { - { - .name = "family", - .pa_start = 0x58000000, - .pa_end = 0x5800007f, - .flags = ADDR_TYPE_RT - }, -}; - /* l3_main_1 -> dss */ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__dss = { .master = &dra7xx_l3_main_1_hwmod, .slave = &dra7xx_dss_hwmod, .clk = "l3_iclk_div", - .addr = dra7xx_dss_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space dra7xx_dss_dispc_addrs[] = { - { - .name = "dispc", - .pa_start = 0x58001000, - .pa_end = 0x58001fff, - .flags = ADDR_TYPE_RT - }, -}; - /* l3_main_1 -> dispc */ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__dispc = { .master = &dra7xx_l3_main_1_hwmod, .slave = &dra7xx_dss_dispc_hwmod, .clk = "l3_iclk_div", - .addr = dra7xx_dss_dispc_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space dra7xx_dss_hdmi_addrs[] = { - { - .name = "hdmi_wp", - .pa_start = 0x58040000, - .pa_end = 0x580400ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l3_main_1 -> dispc */ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__hdmi = { .master = &dra7xx_l3_main_1_hwmod, .slave = &dra7xx_dss_hdmi_hwmod, .clk = "l3_iclk_div", - .addr = dra7xx_dss_hdmi_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -3410,21 +3379,11 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess2 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space dra7xx_qspi_addrs[] = { - { - .pa_start = 0x4b300000, - .pa_end = 0x4b30007f, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l3_main_1 -> qspi */ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__qspi = { .master = &dra7xx_l3_main_1_hwmod, .slave = &dra7xx_qspi_hwmod, .clk = "l3_iclk_div", - .addr = dra7xx_qspi_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c index df8327713d06..b82b77cff24c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c @@ -243,7 +243,7 @@ static struct omap_hwmod_class ti81xx_rtc_hwmod_class = { .sysc = &ti81xx_rtc_sysc, }; -struct omap_hwmod ti81xx_rtc_hwmod = { +static struct omap_hwmod ti81xx_rtc_hwmod = { .name = "rtc", .class = &ti81xx_rtc_hwmod_class, .clkdm_name = "alwon_l3s_clkdm", diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 6571ad959908..05e20aaf68dd 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -26,6 +26,7 @@ #include <linux/platform_data/wkup_m3.h> #include <linux/platform_data/pwm_omap_dmtimer.h> #include <linux/platform_data/media/ir-rx51.h> +#include <linux/platform_data/asoc-ti-mcbsp.h> #include <plat/dmtimer.h> #include "common.h" @@ -273,8 +274,6 @@ static struct platform_device omap3_rom_rng_device = { }, }; -static struct platform_device rx51_lirc_device; - static void __init nokia_n900_legacy_init(void) { hsmmc2_internal_input_clk(); @@ -293,10 +292,7 @@ static void __init nokia_n900_legacy_init(void) pr_info("RX-51: Registering OMAP3 HWRNG device\n"); platform_device_register(&omap3_rom_rng_device); - } - - platform_device_register(&rx51_lirc_device); } static void __init omap3_tao3530_legacy_init(void) @@ -491,10 +487,6 @@ static struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = { static struct lirc_rx51_platform_data __maybe_unused rx51_lirc_data = { .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat, - .pwm_timer = 9, /* Use GPT 9 for CIR */ -#if IS_ENABLED(CONFIG_OMAP_DM_TIMER) - .dmtimer = &pwm_dmtimer_pdata, -#endif }; static struct platform_device __maybe_unused rx51_lirc_device = { @@ -505,6 +497,16 @@ static struct platform_device __maybe_unused rx51_lirc_device = { }, }; +#if IS_ENABLED(CONFIG_SND_OMAP_SOC_MCBSP) +static struct omap_mcbsp_platform_data mcbsp_pdata; +static void __init omap3_mcbsp_init(void) +{ + omap3_mcbsp_init_pdata_callback(&mcbsp_pdata); +} +#else +static void __init omap3_mcbsp_init(void) {} +#endif + /* * Few boards still need auxdata populated before we populate * the dev entries in of_platform_populate(). @@ -532,10 +534,16 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { &omap3_iommu_pdata), OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]), OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]), + OF_DEV_AUXDATA("nokia,n900-ir", 0, "n900-ir", &rx51_lirc_data), /* Only on am3517 */ OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", &am35xx_emac_pdata), + /* McBSP modules with sidetone core */ +#if IS_ENABLED(CONFIG_SND_OMAP_SOC_MCBSP) + OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49022000, "49022000.mcbsp", &mcbsp_pdata), + OF_DEV_AUXDATA("ti,omap3-mcbsp", 0x49024000, "49024000.mcbsp", &mcbsp_pdata), +#endif #endif #ifdef CONFIG_SOC_AM33XX OF_DEV_AUXDATA("ti,am3352-wkup-m3", 0x44d00000, "44d00000.wkup_m3", @@ -608,6 +616,8 @@ void __init pdata_quirks_init(const struct of_device_id *omap_dt_match_table) of_machine_is_compatible("ti,omap3")) omap_sdrc_init(NULL, NULL); + if (of_machine_is_compatible("ti,omap3")) + omap3_mcbsp_init(); pdata_quirks_check(auxdata_quirks); of_platform_populate(NULL, omap_dt_match_table, omap_auxdata_lookup, NULL); diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 2f7b11da7d5d..678d2a31dcb8 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -110,13 +110,7 @@ static void __init omap2_init_processor_devices(void) int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused) { - /* XXX The usecount test is racy */ - if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) && - !(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING)) - clkdm_allow_idle(clkdm); - else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && - clkdm->usecount == 0) - clkdm_sleep(clkdm); + clkdm_allow_idle(clkdm); return 0; } diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index daf2753de7aa..76eb6ec5f157 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -223,7 +223,6 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) * @pwrdm: struct powerdomain * to operate on * @curr_pwrst: current power state of @pwrdm * @pwrst: power state to switch to - * @hwsup: ptr to a bool to return whether the clkdm is hardware-supervised * * Determine whether the powerdomain needs to be turned on before * attempting to switch power states. Called by @@ -234,8 +233,7 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) * "Types of sleep_switch" comment above). */ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm, - u8 curr_pwrst, u8 pwrst, - bool *hwsup) + u8 curr_pwrst, u8 pwrst) { u8 sleep_switch; @@ -245,8 +243,7 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm, arch_pwrdm->pwrdm_set_lowpwrstchange) { sleep_switch = LOWPOWERSTATE_SWITCH; } else { - *hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]); - clkdm_wakeup_nolock(pwrdm->pwrdm_clkdms[0]); + clkdm_deny_idle_nolock(pwrdm->pwrdm_clkdms[0]); sleep_switch = FORCEWAKEUP_SWITCH; } } else { @@ -260,7 +257,6 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm, * _pwrdm_restore_clkdm_state - restore the clkdm hwsup state after pwrst change * @pwrdm: struct powerdomain * to operate on * @sleep_switch: return value from _pwrdm_save_clkdm_state_and_activate() - * @hwsup: should @pwrdm's first clockdomain be set to hardware-supervised mode? * * Restore the clockdomain state perturbed by * _pwrdm_save_clkdm_state_and_activate(), and call the power state @@ -271,14 +267,11 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm, * software-supervised sleep. No return value. */ static void _pwrdm_restore_clkdm_state(struct powerdomain *pwrdm, - u8 sleep_switch, bool hwsup) + u8 sleep_switch) { switch (sleep_switch) { case FORCEWAKEUP_SWITCH: - if (hwsup) - clkdm_allow_idle_nolock(pwrdm->pwrdm_clkdms[0]); - else - clkdm_sleep_nolock(pwrdm->pwrdm_clkdms[0]); + clkdm_allow_idle_nolock(pwrdm->pwrdm_clkdms[0]); break; case LOWPOWERSTATE_SWITCH: if (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE && @@ -1093,7 +1086,6 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst) u8 next_pwrst, sleep_switch; int curr_pwrst; int ret = 0; - bool hwsup = false; if (!pwrdm || IS_ERR(pwrdm)) return -EINVAL; @@ -1117,14 +1109,14 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst) goto osps_out; sleep_switch = _pwrdm_save_clkdm_state_and_activate(pwrdm, curr_pwrst, - pwrst, &hwsup); + pwrst); ret = pwrdm_set_next_pwrst(pwrdm, pwrst); if (ret) pr_err("%s: unable to set power state of powerdomain: %s\n", __func__, pwrdm->name); - _pwrdm_restore_clkdm_state(pwrdm, sleep_switch, hwsup); + _pwrdm_restore_clkdm_state(pwrdm, sleep_switch); osps_out: pwrdm_unlock(pwrdm); diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h index 7c34c44eb0ae..babb5db5a3a4 100644 --- a/arch/arm/mach-omap2/prcm43xx.h +++ b/arch/arm/mach-omap2/prcm43xx.h @@ -39,6 +39,7 @@ /* RM RSTST offsets */ #define AM43XX_RM_GFX_RSTST_OFFSET 0x0014 +#define AM43XX_RM_PER_RSTST_OFFSET 0x0014 #define AM43XX_RM_WKUP_RSTST_OFFSET 0x0014 /* CM instances */ diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h index 2bc4ec52ba78..66302c6aba61 100644 --- a/arch/arm/mach-omap2/prm33xx.h +++ b/arch/arm/mach-omap2/prm33xx.h @@ -52,8 +52,6 @@ /* PRM.PER_PRM register offsets */ #define AM33XX_RM_PER_RSTCTRL_OFFSET 0x0000 #define AM33XX_RM_PER_RSTCTRL AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0000) -#define AM33XX_RM_PER_RSTST_OFFSET 0x0004 -#define AM33XX_RM_PER_RSTST AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0004) #define AM33XX_PM_PER_PWRSTST_OFFSET 0x0008 #define AM33XX_PM_PER_PWRSTST AM33XX_PRM_REGADDR(AM33XX_PRM_PER_MOD, 0x0008) #define AM33XX_PM_PER_PWRSTCTRL_OFFSET 0x000c diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h index 645a2a46b213..f11500612983 100644 --- a/arch/arm/mach-omap2/sdrc.h +++ b/arch/arm/mach-omap2/sdrc.h @@ -175,8 +175,8 @@ u32 omap2xxx_sdrc_reprogram(u32 level, u32 force); * don't adjust it down as your clock period increases the refresh interval * will not be met. Setting all parameters for complete worst case may work, * but may cut memory performance by 2x. Due to errata the DLLs need to be - * unlocked and their value needs run time calibration. A dynamic call is - * need for that as no single right value exists acorss production samples. + * unlocked and their value needs run time calibration. A dynamic call is + * need for that as no single right value exists across production samples. * * Only the FULL speed values are given. Current code is such that rate * changes must be made at DPLLoutx2. The actual value adjustment for low diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index cb9497a20fb3..5e2e2218a402 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -289,6 +289,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, if (!timer->io_base) return -ENXIO; + omap_hwmod_setup_one(oh_name); + /* After the dmtimer is using hwmod these clocks won't be needed */ timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh)); if (IS_ERR(timer->fclk)) @@ -303,7 +305,6 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, clk_put(src); - omap_hwmod_setup_one(oh_name); omap_hwmod_enable(oh); __omap_dm_timer_init_regs(timer); |