diff options
Diffstat (limited to 'arch/arm/mach-clps7500')
| -rw-r--r-- | arch/arm/mach-clps7500/core.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/acornfb.h | 33 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/debug-macro.S | 21 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/dma.h | 21 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/entry-macro.S | 16 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/hardware.h | 67 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/io.h | 255 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/irq.h | 32 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/irqs.h | 66 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/memory.h | 35 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/system.h | 23 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/timex.h | 13 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/uncompress.h | 35 | ||||
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/vmalloc.h | 4 |
14 files changed, 622 insertions, 1 deletions
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c index 2ac63671ea5f..cc1b82179e83 100644 --- a/arch/arm/mach-clps7500/core.c +++ b/arch/arm/mach-clps7500/core.c @@ -21,7 +21,7 @@ #include <asm/mach/irq.h> #include <asm/mach/time.h> -#include <asm/hardware.h> +#include <mach/hardware.h> #include <asm/hardware/iomd.h> #include <asm/io.h> #include <asm/irq.h> diff --git a/arch/arm/mach-clps7500/include/mach/acornfb.h b/arch/arm/mach-clps7500/include/mach/acornfb.h new file mode 100644 index 000000000000..aea6330c9745 --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/acornfb.h @@ -0,0 +1,33 @@ +#define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119) + +static inline void +acornfb_vidc20_find_rates(struct vidc_timing *vidc, + struct fb_var_screeninfo *var) +{ + u_int bandwidth; + + vidc->control |= VIDC20_CTRL_PIX_CK; + + /* Calculate bandwidth */ + bandwidth = var->pixclock * 8 / var->bits_per_pixel; + + /* Encode bandwidth as VIDC20 setting */ + if (bandwidth > 16667*2) + vidc->control |= VIDC20_CTRL_FIFO_16; + else if (bandwidth > 13333*2) + vidc->control |= VIDC20_CTRL_FIFO_20; + else if (bandwidth > 11111*2) + vidc->control |= VIDC20_CTRL_FIFO_24; + else + vidc->control |= VIDC20_CTRL_FIFO_28; + + vidc->pll_ctl = 0x2020; +} + +#ifdef CONFIG_CHRONTEL_7003 +#define acornfb_default_control() VIDC20_CTRL_PIX_HCLK +#else +#define acornfb_default_control() VIDC20_CTRL_PIX_VCLK +#endif + +#define acornfb_default_econtrol() VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK diff --git a/arch/arm/mach-clps7500/include/mach/debug-macro.S b/arch/arm/mach-clps7500/include/mach/debug-macro.S new file mode 100644 index 000000000000..af4104e7e84a --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/debug-macro.S @@ -0,0 +1,21 @@ +/* arch/arm/mach-clps7500/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + + .macro addruart,rx + mov \rx, #0xe0000000 + orr \rx, \rx, #0x00010000 + orr \rx, \rx, #0x00000be0 + .endm + +#define UART_SHIFT 2 +#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/mach-clps7500/include/mach/dma.h b/arch/arm/mach-clps7500/include/mach/dma.h new file mode 100644 index 000000000000..63fcde505498 --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/dma.h @@ -0,0 +1,21 @@ +/* + * arch/arm/mach-clps7500/include/mach/dma.h + * + * Copyright (C) 1999 Nexus Electronics Ltd. + */ + +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +/* DMA is not yet implemented! It should be the same as acorn, copy over.. */ + +/* + * This is the maximum DMA address that can be DMAd to. + * There should not be more than (0xd0000000 - 0xc0000000) + * bytes of RAM. + */ +#define MAX_DMA_ADDRESS 0xd0000000 + +#define DMA_S0 0 + +#endif /* _ASM_ARCH_DMA_H */ diff --git a/arch/arm/mach-clps7500/include/mach/entry-macro.S b/arch/arm/mach-clps7500/include/mach/entry-macro.S new file mode 100644 index 000000000000..4e7e54144093 --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/entry-macro.S @@ -0,0 +1,16 @@ +#include <mach/hardware.h> +#include <asm/hardware/entry-macro-iomd.S> + + .equ ioc_base_high, IOC_BASE & 0xff000000 + .equ ioc_base_low, IOC_BASE & 0x00ff0000 + + .macro get_irqnr_preamble, base, tmp + mov \base, #ioc_base_high @ point at IOC + .if ioc_base_low + orr \base, \base, #ioc_base_low + .endif + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + diff --git a/arch/arm/mach-clps7500/include/mach/hardware.h b/arch/arm/mach-clps7500/include/mach/hardware.h new file mode 100644 index 000000000000..d66578a3371c --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/hardware.h @@ -0,0 +1,67 @@ +/* + * arch/arm/mach-clps7500/include/mach/hardware.h + * + * Copyright (C) 1996-1999 Russell King. + * Copyright (C) 1999 Nexus Electronics Ltd. + * + * This file contains the hardware definitions of the + * CL7500 evaluation board. + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include <mach/memory.h> +#include <asm/hardware/iomd.h> + +#ifdef __ASSEMBLY__ +#define IOMEM(x) x +#else +#define IOMEM(x) ((void __iomem *)(x)) +#endif + +/* + * What hardware must be present + */ +#define HAS_IOMD +#define HAS_VIDC20 + +/* Hardware addresses of major areas. + * *_START is the physical address + * *_SIZE is the size of the region + * *_BASE is the virtual address + */ + +#define IO_START 0x03000000 /* I/O */ +#define IO_SIZE 0x01000000 +#define IO_BASE IOMEM(0xe0000000) + +#define ISA_START 0x0c000000 /* ISA */ +#define ISA_SIZE 0x00010000 +#define ISA_BASE 0xe1000000 + +#define FLASH_START 0x01000000 /* XXX */ +#define FLASH_SIZE 0x01000000 +#define FLASH_BASE 0xe2000000 + +#define LED_START 0x0302B000 +#define LED_SIZE 0x00001000 +#define LED_BASE 0xe3000000 +#define LED_ADDRESS (LED_BASE + 0xa00) + +/* Let's define SCREEN_START for CL7500, even though it's a lie. */ +#define SCREEN_START 0x02000000 /* VRAM */ +#define SCREEN_END 0xdfc00000 +#define SCREEN_BASE 0xdf800000 + +#define VIDC_BASE (void __iomem *)0xe0400000 +#define IOMD_BASE IOMEM(0xe0200000) +#define IOC_BASE IOMEM(0xe0200000) +#define FLOPPYDMA_BASE IOMEM(0xe002a000) +#define PCIO_BASE IOMEM(0xe0010000) + +#define vidc_writel(val) __raw_writel(val, VIDC_BASE) + +/* in/out bias for the ISA slot region */ +#define ISASLOT_IO 0x80400000 + +#endif diff --git a/arch/arm/mach-clps7500/include/mach/io.h b/arch/arm/mach-clps7500/include/mach/io.h new file mode 100644 index 000000000000..2ff2860889ed --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/io.h @@ -0,0 +1,255 @@ +/* + * arch/arm/mach-clps7500/include/mach/io.h + * from arch/arm/mach-rpc/include/mach/io.h + * + * Copyright (C) 1997 Russell King + * + * Modifications: + * 06-Dec-1997 RMK Created. + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#include <mach/hardware.h> + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * GCC is totally crap at loading/storing data. We try to persuade it + * to do the right thing by using these whereever possible instead of + * the above. + */ +#define __arch_base_getb(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_getl(b,o) \ + ({ \ + unsigned int v, r = (b); \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2]" \ + : "=r" (v) \ + : "r" (r), "Ir" (o)); \ + v; \ + }) + +#define __arch_base_putb(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "strb %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +#define __arch_base_putl(v,b,o) \ + ({ \ + unsigned int r = (b); \ + __asm__ __volatile__( \ + "str %0, [%1, %2]" \ + : \ + : "r" (v), "r" (r), "Ir" (o)); \ + }) + +/* + * We use two different types of addressing - PC style addresses, and ARM + * addresses. PC style accesses the PC hardware with the normal PC IO + * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ + * and are translated to the start of IO. Note that all addresses are + * shifted left! + */ +#define __PORT_PCIO(x) (!((x) & 0x80000000)) + +/* + * Dynamic IO functions - let the compiler + * optimize the expressions + */ +static inline void __outb (unsigned int value, unsigned int port) +{ + unsigned long temp; + __asm__ __volatile__( + "tst %2, #0x80000000\n\t" + "mov %0, %4\n\t" + "addeq %0, %0, %3\n\t" + "strb %1, [%0, %2, lsl #2] @ outb" + : "=&r" (temp) + : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) + : "cc"); +} + +static inline void __outw (unsigned int value, unsigned int port) +{ + unsigned long temp; + __asm__ __volatile__( + "tst %2, #0x80000000\n\t" + "mov %0, %4\n\t" + "addeq %0, %0, %3\n\t" + "str %1, [%0, %2, lsl #2] @ outw" + : "=&r" (temp) + : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) + : "cc"); +} + +static inline void __outl (unsigned int value, unsigned int port) +{ + unsigned long temp; + __asm__ __volatile__( + "tst %2, #0x80000000\n\t" + "mov %0, %4\n\t" + "addeq %0, %0, %3\n\t" + "str %1, [%0, %2, lsl #2] @ outl" + : "=&r" (temp) + : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) + : "cc"); +} + +#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ +static inline unsigned sz __in##fnsuffix (unsigned int port) \ +{ \ + unsigned long temp, value; \ + __asm__ __volatile__( \ + "tst %2, #0x80000000\n\t" \ + "mov %0, %4\n\t" \ + "addeq %0, %0, %3\n\t" \ + "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ + : "=&r" (temp), "=r" (value) \ + : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ + : "cc"); \ + return (unsigned sz)value; \ +} + +static inline unsigned int __ioaddr (unsigned int port) \ +{ \ + if (__PORT_PCIO(port)) \ + return (unsigned int)(PCIO_BASE + (port << 2)); \ + else \ + return (unsigned int)(IO_BASE + (port << 2)); \ +} + +#define DECLARE_IO(sz,fnsuffix,instr) \ + DECLARE_DYN_IN(sz,fnsuffix,instr) + +DECLARE_IO(char,b,"b") +DECLARE_IO(short,w,"") +DECLARE_IO(int,l,"") + +#undef DECLARE_IO +#undef DECLARE_DYN_IN + +/* + * Constant address IO functions + * + * These have to be macros for the 'J' constraint to work - + * +/-4096 immediate operand. + */ +#define __outbc(value,port) \ +({ \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "strb %0, [%1, %2] @ outbc" \ + : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "strb %0, [%1, %2] @ outbc" \ + : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \ +}) + +#define __inbc(port) \ +({ \ + unsigned char result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2] @ inbc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2] @ inbc" \ + : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ + result; \ +}) + +#define __outwc(value,port) \ +({ \ + unsigned long v = value; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outwc" \ + : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outwc" \ + : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \ +}) + +#define __inwc(port) \ +({ \ + unsigned short result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inwc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inwc" \ + : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ + result & 0xffff; \ +}) + +#define __outlc(value,port) \ +({ \ + unsigned long v = value; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outlc" \ + : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outlc" \ + : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \ +}) + +#define __inlc(port) \ +({ \ + unsigned long result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inlc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ + else \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inlc" \ + : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ + result; \ +}) + +#define __ioaddrc(port) \ + (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2)) + +#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) +#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) +#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) +#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) +#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) +#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) +#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) +/* the following macro is deprecated */ +#define ioaddr(port) __ioaddr((port)) + +#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) +#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) + +#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l) +#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) + +/* + * 1:1 mapping for ioremapped regions. + */ +#define __mem_pci(x) (x) + +#endif diff --git a/arch/arm/mach-clps7500/include/mach/irq.h b/arch/arm/mach-clps7500/include/mach/irq.h new file mode 100644 index 000000000000..e8da3c58df76 --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/irq.h @@ -0,0 +1,32 @@ +/* + * arch/arm/mach-clps7500/include/mach/irq.h + * + * Copyright (C) 1996 Russell King + * Copyright (C) 1999, 2001 Nexus Electronics Ltd. + * + * Changelog: + * 10-10-1996 RMK Brought up to date with arch-sa110eval + * 22-08-1998 RMK Restructured IRQ routines + * 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code + */ + +#include <asm/hardware/iomd.h> +#include <asm/io.h> + +static inline int fixup_irq(unsigned int irq) +{ + if (irq == IRQ_ISA) { + int isabits = *((volatile unsigned int *)0xe002b700); + if (isabits == 0) { + printk("Spurious ISA IRQ!\n"); + return irq; + } + irq = IRQ_ISA_BASE; + while (!(isabits & 1)) { + irq++; + isabits >>= 1; + } + } + + return irq; +} diff --git a/arch/arm/mach-clps7500/include/mach/irqs.h b/arch/arm/mach-clps7500/include/mach/irqs.h new file mode 100644 index 000000000000..bee66b487f59 --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/irqs.h @@ -0,0 +1,66 @@ +/* + * arch/arm/mach-clps7500/include/mach/irqs.h + * + * Copyright (C) 1999 Nexus Electronics Ltd + */ + +#define IRQ_INT2 0 +#define IRQ_INT1 2 +#define IRQ_VSYNCPULSE 3 +#define IRQ_POWERON 4 +#define IRQ_TIMER0 5 +#define IRQ_TIMER1 6 +#define IRQ_FORCE 7 +#define IRQ_INT8 8 +#define IRQ_ISA 9 +#define IRQ_INT6 10 +#define IRQ_INT5 11 +#define IRQ_INT4 12 +#define IRQ_INT3 13 +#define IRQ_KEYBOARDTX 14 +#define IRQ_KEYBOARDRX 15 + +#define IRQ_DMA0 16 +#define IRQ_DMA1 17 +#define IRQ_DMA2 18 +#define IRQ_DMA3 19 +#define IRQ_DMAS0 20 +#define IRQ_DMAS1 21 + +#define IRQ_IOP0 24 +#define IRQ_IOP1 25 +#define IRQ_IOP2 26 +#define IRQ_IOP3 27 +#define IRQ_IOP4 28 +#define IRQ_IOP5 29 +#define IRQ_IOP6 30 +#define IRQ_IOP7 31 + +#define IRQ_MOUSERX 40 +#define IRQ_MOUSETX 41 +#define IRQ_ADC 42 +#define IRQ_EVENT1 43 +#define IRQ_EVENT2 44 + +#define IRQ_ISA_BASE 48 +#define IRQ_ISA_3 48 +#define IRQ_ISA_4 49 +#define IRQ_ISA_5 50 +#define IRQ_ISA_7 51 +#define IRQ_ISA_9 52 +#define IRQ_ISA_10 53 +#define IRQ_ISA_11 54 +#define IRQ_ISA_14 55 + +#define FIQ_INT9 0 +#define FIQ_INT5 1 +#define FIQ_INT6 4 +#define FIQ_INT8 6 +#define FIQ_FORCE 7 + +/* + * This is the offset of the FIQ "IRQ" numbers + */ +#define FIQ_START 64 + +#define IRQ_TIMER IRQ_TIMER0 diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h new file mode 100644 index 000000000000..3326aa99d3ec --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/memory.h @@ -0,0 +1,35 @@ +/* + * arch/arm/mach-clps7500/include/mach/memory.h + * + * Copyright (c) 1996,1997,1998 Russell King. + * + * Changelog: + * 20-Oct-1996 RMK Created + * 31-Dec-1997 RMK Fixed definitions to reduce warnings + * 11-Jan-1998 RMK Uninlined to reduce hits on cache + * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt + * 21-Mar-1999 RMK Renamed to memory.h + * RMK Added TASK_SIZE and PAGE_OFFSET + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET UL(0x10000000) + +/* + * These are exactly the same on the RiscPC as the + * physical memory view. + */ +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + +/* + * Cache flushing area - ROM + */ +#define FLUSH_BASE_PHYS 0x00000000 +#define FLUSH_BASE 0xdf000000 + +#endif diff --git a/arch/arm/mach-clps7500/include/mach/system.h b/arch/arm/mach-clps7500/include/mach/system.h new file mode 100644 index 000000000000..624fc2830ae0 --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/system.h @@ -0,0 +1,23 @@ +/* + * arch/arm/mach-clps7500/include/mach/system.h + * + * Copyright (c) 1999 Nexus Electronics Ltd. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include <asm/hardware/iomd.h> +#include <asm/io.h> + +static inline void arch_idle(void) +{ + iomd_writeb(0, IOMD_SUSMODE); +} + +#define arch_reset(mode) \ + do { \ + iomd_writeb(0, IOMD_ROMCR0); \ + cpu_reset(0); \ + } while (0) + +#endif diff --git a/arch/arm/mach-clps7500/include/mach/timex.h b/arch/arm/mach-clps7500/include/mach/timex.h new file mode 100644 index 000000000000..dfaa9b425757 --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/timex.h @@ -0,0 +1,13 @@ +/* + * arch/arm/mach-clps7500/include/mach/timex.h + * + * CL7500 architecture timex specifications + * + * Copyright (C) 1999 Nexus Electronics Ltd + */ + +/* + * On the ARM7500, the clock ticks at 2MHz. + */ +#define CLOCK_TICK_RATE 2000000 + diff --git a/arch/arm/mach-clps7500/include/mach/uncompress.h b/arch/arm/mach-clps7500/include/mach/uncompress.h new file mode 100644 index 000000000000..d7d0af4b49fc --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/uncompress.h @@ -0,0 +1,35 @@ +/* + * arch/arm/mach-clps7500/include/mach/uncompress.h + * + * Copyright (C) 1999, 2000 Nexus Electronics Ltd. + */ +#define BASE 0x03010000 +#define SERBASE (BASE + (0x2f8 << 2)) + +static inline void putc(char c) +{ + while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20)) + barrier(); + + *((volatile unsigned int *)(SERBASE)) = c; +} + +static inline void flush(void) +{ +} + +static __inline__ void arch_decomp_setup(void) +{ + int baud = 3686400 / (9600 * 32); + + *((volatile unsigned int *)(SERBASE + 0xC)) = 0x80; + *((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff; + *((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8; + *((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */ + *((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */ +} + +/* + * nothing to do + */ +#define arch_decomp_wdog() diff --git a/arch/arm/mach-clps7500/include/mach/vmalloc.h b/arch/arm/mach-clps7500/include/mach/vmalloc.h new file mode 100644 index 000000000000..8fc5406d1b6d --- /dev/null +++ b/arch/arm/mach-clps7500/include/mach/vmalloc.h @@ -0,0 +1,4 @@ +/* + * arch/arm/mach-clps7500/include/mach/vmalloc.h + */ +#define VMALLOC_END (PAGE_OFFSET + 0x1c000000) |