diff options
Diffstat (limited to 'arch/arm/boot/dts')
25 files changed, 183 insertions, 80 deletions
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 28b5ec79f339..0401f4dba2a2 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -86,6 +86,11 @@ reg = <0x10023CE0 0x20>; }; + pd_gps_alive: gps-alive-power-domain@10023D00 { + compatible = "samsung,exynos4210-pd"; + reg = <0x10023D00 0x20>; + }; + gic: interrupt-controller@10490000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index 2aa13cb3bbed..72fb11f7ea21 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -19,7 +19,7 @@ / { model = "Insignal Origen evaluation board based on Exynos4210"; - compatible = "insignal,origen", "samsung,exynos4210"; + compatible = "insignal,origen", "samsung,exynos4210", "samsung,exynos4"; memory { reg = <0x40000000 0x10000000 diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts index 9c01b718d29d..636d16684750 100644 --- a/arch/arm/boot/dts/exynos4210-smdkv310.dts +++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts @@ -19,7 +19,7 @@ / { model = "Samsung smdkv310 evaluation board based on Exynos4210"; - compatible = "samsung,smdkv310", "samsung,exynos4210"; + compatible = "samsung,smdkv310", "samsung,exynos4210", "samsung,exynos4"; memory { reg = <0x40000000 0x80000000>; diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 63cc571ca307..361cb58052bf 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -17,7 +17,7 @@ / { model = "Samsung Trats based on Exynos4210"; - compatible = "samsung,trats", "samsung,exynos4210"; + compatible = "samsung,trats", "samsung,exynos4210", "samsung,exynos4"; memory { reg = <0x40000000 0x10000000 diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts index d2e3f5f5916d..27d3b70ee9e3 100644 --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts @@ -17,7 +17,7 @@ / { model = "Samsung Universal C210 based on Exynos4210 rev0"; - compatible = "samsung,universal_c210", "samsung,exynos4210"; + compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4"; memory { reg = <0x40000000 0x10000000 diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index cb0e768dc6d4..cacf6140dd2f 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -23,7 +23,7 @@ #include "exynos4210-pinctrl.dtsi" / { - compatible = "samsung,exynos4210"; + compatible = "samsung,exynos4210", "samsung,exynos4"; aliases { pinctrl0 = &pinctrl_0; diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi index 94a43f9a05e2..3c00e6ec9302 100644 --- a/arch/arm/boot/dts/exynos4212.dtsi +++ b/arch/arm/boot/dts/exynos4212.dtsi @@ -20,18 +20,13 @@ #include "exynos4x12.dtsi" / { - compatible = "samsung,exynos4212"; + compatible = "samsung,exynos4212", "samsung,exynos4"; - gic: interrupt-controller@10490000 { - cpu-offset = <0x8000>; + combiner: interrupt-controller@10440000 { + samsung,combiner-nr = <18>; }; - interrupt-controller@10440000 { - samsung,combiner-nr = <18>; - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 107 0>, <0 108 0>; + gic: interrupt-controller@10490000 { + cpu-offset = <0x8000>; }; }; diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 12459b01cca3..31db28a4bb33 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -16,7 +16,7 @@ / { model = "Hardkernel ODROID-X board based on Exynos4412"; - compatible = "hardkernel,odroid-x", "samsung,exynos4412"; + compatible = "hardkernel,odroid-x", "samsung,exynos4412", "samsung,exynos4"; memory { reg = <0x40000000 0x40000000>; diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 388f03579661..e2c0dcab4d81 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -17,7 +17,7 @@ / { model = "Insignal Origen evaluation board based on Exynos4412"; - compatible = "insignal,origen4412", "samsung,exynos4412"; + compatible = "insignal,origen4412", "samsung,exynos4412", "samsung,exynos4"; memory { reg = <0x40000000 0x40000000>; diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts index ad316a1ee9e0..ded0b70f7644 100644 --- a/arch/arm/boot/dts/exynos4412-smdk4412.dts +++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts @@ -17,7 +17,7 @@ / { model = "Samsung SMDK evaluation board based on Exynos4412"; - compatible = "samsung,smdk4412", "samsung,exynos4412"; + compatible = "samsung,smdk4412", "samsung,exynos4412", "samsung,exynos4"; memory { reg = <0x40000000 0x40000000>; diff --git a/arch/arm/boot/dts/exynos4412-tiny4412.dts b/arch/arm/boot/dts/exynos4412-tiny4412.dts index 0a9831256b33..ea6929d9c621 100644 --- a/arch/arm/boot/dts/exynos4412-tiny4412.dts +++ b/arch/arm/boot/dts/exynos4412-tiny4412.dts @@ -16,7 +16,7 @@ / { model = "FriendlyARM TINY4412 board based on Exynos4412"; - compatible = "friendlyarm,tiny4412", "samsung,exynos4412"; + compatible = "friendlyarm,tiny4412", "samsung,exynos4412", "samsung,exynos4"; memory { reg = <0x40000000 0x40000000>; diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 4f851ccf40eb..c16b3159b813 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -17,7 +17,7 @@ / { model = "Samsung Trats 2 based on Exynos4412"; - compatible = "samsung,trats2", "samsung,exynos4412"; + compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4"; aliases { i2c8 = &i2c_ak8975; @@ -106,6 +106,11 @@ }; }; + adc: adc@126C0000 { + vdd-supply = <&ldo3_reg>; + status = "okay"; + }; + i2c@13890000 { samsung,i2c-sda-delay = <100>; samsung,i2c-slave-addr = <0x10>; @@ -589,4 +594,20 @@ }; }; }; + + thermistor-ap@0 { + compatible = "ntc,ncp15wb473"; + pullup-uv = <1800000>; /* VCC_1.8V_AP */ + pullup-ohm = <100000>; /* 100K */ + pulldown-ohm = <100000>; /* 100K */ + io-channels = <&adc 1>; /* AP temperature */ + }; + + thermistor-battery@1 { + compatible = "ntc,ncp15wb473"; + pullup-uv = <1800000>; /* VCC_1.8V_AP */ + pullup-ohm = <100000>; /* 100K */ + pulldown-ohm = <100000>; /* 100K */ + io-channels = <&adc 2>; /* Battery temperature */ + }; }; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 87b339c739de..15d3c0ac2f5f 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -20,19 +20,13 @@ #include "exynos4x12.dtsi" / { - compatible = "samsung,exynos4412"; + compatible = "samsung,exynos4412", "samsung,exynos4"; - gic: interrupt-controller@10490000 { - cpu-offset = <0x4000>; - }; - - interrupt-controller@10440000 { + combiner: interrupt-controller@10440000 { samsung,combiner-nr = <20>; - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>; }; + gic: interrupt-controller@10490000 { + cpu-offset = <0x4000>; + }; }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index e0eb6bb64c34..c4a9306f8529 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -31,6 +31,12 @@ mshc0 = &mshc_0; }; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupt-parent = <&combiner>; + interrupts = <2 2>, <3 2>, <18 2>, <19 2>; + }; + pd_isp: isp-power-domain@10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>; @@ -62,6 +68,14 @@ }; }; + combiner: interrupt-controller@10440000 { + interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, + <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, + <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, + <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, + <0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>; + }; + pinctrl_0: pinctrl@11400000 { compatible = "samsung,exynos4x12-pinctrl"; reg = <0x11400000 0x1000>; @@ -80,6 +94,18 @@ }; }; + adc: adc@126C0000 { + compatible = "samsung,exynos-adc-v1"; + reg = <0x126C0000 0x100>, <0x10020718 0x4>; + interrupt-parent = <&combiner>; + interrupts = <10 3>; + clocks = <&clock CLK_TSADC>; + clock-names = "adc"; + #io-channel-cells = <1>; + io-channel-ranges; + status = "disabled"; + }; + pinctrl_2: pinctrl@03860000 { compatible = "samsung,exynos4x12-pinctrl"; reg = <0x03860000 0x1000>; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index 38b96a4cba6d..090f9830b129 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -15,7 +15,7 @@ / { model = "Insignal Arndale evaluation board based on EXYNOS5250"; - compatible = "insignal,arndale", "samsung,exynos5250"; + compatible = "insignal,arndale", "samsung,exynos5250", "samsung,exynos5"; memory { reg = <0x40000000 0x80000000>; @@ -375,6 +375,27 @@ }; }; + i2c@121D0000 { + status = "okay"; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <40000>; + samsung,i2c-slave-addr = <0x38>; + + sata_phy_i2c:sata-phy@38 { + compatible = "samsung,exynos-sataphy-i2c"; + reg = <0x38>; + }; + }; + + sata@122F0000 { + status = "okay"; + }; + + sata-phy@12170000 { + status = "okay"; + samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>; + }; + mmc_0: mmc@12200000 { status = "okay"; num-slots = <1>; diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index f76946e97e6a..a794a705d404 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -14,7 +14,7 @@ / { model = "SAMSUNG SMDK5250 board based on EXYNOS5250"; - compatible = "samsung,smdk5250", "samsung,exynos5250"; + compatible = "samsung,smdk5250", "samsung,exynos5250", "samsung,exynos5"; aliases { }; @@ -242,16 +242,12 @@ samsung,i2c-slave-addr = <0x38>; status = "okay"; - sata-phy { - compatible = "samsung,sata-phy"; + sata_phy_i2c:sata-phy@38 { + compatible = "samsung,exynos-sataphy-i2c"; reg = <0x38>; }; }; - sata@122F0000 { - samsung,sata-freq = <66>; - }; - i2c@12C80000 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <66000>; @@ -274,6 +270,15 @@ }; }; + sata@122F0000 { + status = "okay"; + }; + + sata-phy@12170000 { + status = "okay"; + samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>; + }; + mmc@12200000 { status = "okay"; num-slots = <1>; @@ -310,10 +315,6 @@ }; }; - spi_0: spi@12d20000 { - status = "disabled"; - }; - spi_1: spi@12d30000 { status = "okay"; diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index b13bf499f5e2..1ce1088a00fb 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -14,7 +14,7 @@ / { model = "Google Snow"; - compatible = "google,snow", "samsung,exynos5250"; + compatible = "google,snow", "samsung,exynos5250", "samsung,exynos5"; aliases { i2c104 = &i2c_104; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 987cfbe9634b..37423314a028 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -21,10 +21,10 @@ #include "exynos5.dtsi" #include "exynos5250-pinctrl.dtsi" -#include <dt-bindings/clk/exynos-audss-clk.h> +#include <dt-bindings/clock/exynos-audss-clk.h> / { - compatible = "samsung,exynos5250"; + compatible = "samsung,exynos5250", "samsung,exynos5"; aliases { spi0 = &spi_0; @@ -47,6 +47,7 @@ i2c6 = &i2c_6; i2c7 = &i2c_7; i2c8 = &i2c_8; + i2c9 = &i2c_9; pinctrl0 = &pinctrl_0; pinctrl1 = &pinctrl_1; pinctrl2 = &pinctrl_2; @@ -235,16 +236,25 @@ }; sata@122F0000 { - compatible = "samsung,exynos5-sata-ahci"; + compatible = "snps,dwc-ahci"; + samsung,sata-freq = <66>; reg = <0x122F0000 0x1ff>; interrupts = <0 115 0>; clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>; clock-names = "sata", "sclk_sata"; + phys = <&sata_phy>; + phy-names = "sata-phy"; + status = "disabled"; }; - sata-phy@12170000 { - compatible = "samsung,exynos5-sata-phy"; + sata_phy: sata-phy@12170000 { + compatible = "samsung,exynos5250-sata-phy"; reg = <0x12170000 0x1ff>; + clocks = <&clock 287>; + clock-names = "sata_phyctrl"; + #phy-cells = <0>; + samsung,syscon-phandle = <&pmu_system_controller>; + status = "disabled"; }; i2c_0: i2c@12C60000 { @@ -362,7 +372,7 @@ status = "disabled"; }; - i2c@121D0000 { + i2c_9: i2c@121D0000 { compatible = "samsung,exynos5-sata-phy-i2c"; reg = <0x121D0000 0x100>; #address-cells = <1>; @@ -718,4 +728,12 @@ io-channel-ranges; status = "disabled"; }; + + sss@10830000 { + compatible = "samsung,exynos4210-secss"; + reg = <0x10830000 0x10000>; + interrupts = <0 112 0>; + clocks = <&clock 348>; + clock-names = "secss"; + }; }; diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index f509e8fc290f..80a3bf4c5986 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -16,7 +16,7 @@ / { model = "Insignal Arndale Octa evaluation board based on EXYNOS5420"; - compatible = "insignal,arndale-octa", "samsung,exynos5420"; + compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5"; memory { reg = <0x20000000 0x80000000>; @@ -113,6 +113,7 @@ regulator-name = "PVDD_APIO_MMCON_1V8"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + regulator-always-on; }; ldo4_reg: LDO4 { @@ -150,6 +151,7 @@ regulator-name = "PVDD_USB_3V3"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; + regulator-always-on; }; ldo10_reg: LDO10 { @@ -218,6 +220,7 @@ regulator-name = "PVDD_MIFS_1V1"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; + regulator-always-on; }; ldo24_reg: LDO24 { @@ -361,4 +364,16 @@ gpio-key,wakeup; }; }; + + amba { + mdma1: mdma@11C10000 { + /* + * MDMA1 can support both secure and non-secure + * AXI transactions. When this is enabled in the kernel + * for boards that run in secure mode, we are getting + * imprecise external aborts causing the kernel to oops. + */ + status = "disabled"; + }; + }; }; diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index ae1ee0470fca..69104850eb5e 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -14,7 +14,7 @@ / { model = "Samsung SMDK5420 board based on EXYNOS5420"; - compatible = "samsung,smdk5420", "samsung,exynos5420"; + compatible = "samsung,smdk5420", "samsung,exynos5420", "samsung,exynos5"; memory { reg = <0x20000000 0x80000000>; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index e3329afbd8c4..c3a9a66c5767 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -17,10 +17,10 @@ #include "exynos5.dtsi" #include "exynos5420-pinctrl.dtsi" -#include <dt-bindings/clk/exynos-audss-clk.h> +#include <dt-bindings/clock/exynos-audss-clk.h> / { - compatible = "samsung,exynos5420"; + compatible = "samsung,exynos5420", "samsung,exynos5"; aliases { mshc0 = &mmc_0; @@ -723,4 +723,13 @@ clock-names = "watchdog"; samsung,syscon-phandle = <&pmu_system_controller>; }; + + sss@10830000 { + compatible = "samsung,exynos4210-secss"; + reg = <0x10830000 0x10000>; + interrupts = <0 112 0>; + clocks = <&clock 471>; + clock-names = "secss"; + samsung,power-domain = <&g2d_pd>; + }; }; diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts b/arch/arm/boot/dts/exynos5440-sd5v1.dts index 777fb1c2c70f..268609a42b2c 100644 --- a/arch/arm/boot/dts/exynos5440-sd5v1.dts +++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts @@ -14,7 +14,7 @@ / { model = "SAMSUNG SD5v1 board based on EXYNOS5440"; - compatible = "samsung,sd5v1", "samsung,exynos5440"; + compatible = "samsung,sd5v1", "samsung,exynos5440", "samsung,exynos5"; chosen { bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts index d58cb787061a..ff55dac6e219 100644 --- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts +++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts @@ -14,7 +14,7 @@ / { model = "SAMSUNG SSDK5440 board based on EXYNOS5440"; - compatible = "samsung,ssdk5440", "samsung,exynos5440"; + compatible = "samsung,ssdk5440", "samsung,exynos5440", "samsung,exynos5"; chosen { bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 75c7b89cec2f..84f77c2fe4d4 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -13,7 +13,7 @@ #include "skeleton.dtsi" / { - compatible = "samsung,exynos5440"; + compatible = "samsung,exynos5440", "samsung,exynos5"; interrupt-parent = <&gic>; diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 286a840e3dce..511180769af5 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -129,30 +129,28 @@ } ; slcr: slcr@f8000000 { - compatible = "xlnx,zynq-slcr"; + #address-cells = <1>; + #size-cells = <1>; + compatible = "xlnx,zynq-slcr", "syscon"; reg = <0xF8000000 0x1000>; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - clkc: clkc { - #clock-cells = <1>; - compatible = "xlnx,ps7-clkc"; - ps-clk-frequency = <33333333>; - fclk-enable = <0>; - clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", - "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", - "dci", "lqspi", "smc", "pcap", "gem0", "gem1", - "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", - "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", - "dma", "usb0_aper", "usb1_aper", "gem0_aper", - "gem1_aper", "sdio0_aper", "sdio1_aper", - "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", - "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", - "gpio_aper", "lqspi_aper", "smc_aper", "swdt", - "dbg_trc", "dbg_apb"; - }; + ranges; + clkc: clkc@100 { + #clock-cells = <1>; + compatible = "xlnx,ps7-clkc"; + ps-clk-frequency = <33333333>; + fclk-enable = <0>; + clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", + "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", + "dci", "lqspi", "smc", "pcap", "gem0", "gem1", + "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", + "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", + "dma", "usb0_aper", "usb1_aper", "gem0_aper", + "gem1_aper", "sdio0_aper", "sdio1_aper", + "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", + "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", + "gpio_aper", "lqspi_aper", "smc_aper", "swdt", + "dbg_trc", "dbg_apb"; + reg = <0x100 0x100>; }; }; |