diff options
Diffstat (limited to 'arch/arm/boot/dts/rk3066a.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3066a.dtsi | 239 |
1 files changed, 149 insertions, 90 deletions
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 653127a377fa..3d1b02f45ffd 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -80,6 +80,11 @@ vop0_out: port { #address-cells = <1>; #size-cells = <0>; + + vop0_out_hdmi: endpoint@0 { + reg = <0>; + remote-endpoint = <&hdmi_in_vop0>; + }; }; }; @@ -101,6 +106,49 @@ vop1_out: port { #address-cells = <1>; #size-cells = <0>; + + vop1_out_hdmi: endpoint@0 { + reg = <0>; + remote-endpoint = <&hdmi_in_vop1>; + }; + }; + }; + + hdmi: hdmi@10116000 { + compatible = "rockchip,rk3066-hdmi"; + reg = <0x10116000 0x2000>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_HDMI>; + clock-names = "hclk"; + pinctrl-names = "default"; + pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; + power-domains = <&power RK3066_PD_VIO>; + rockchip,grf = <&grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in_vop0: endpoint@0 { + reg = <0>; + remote-endpoint = <&vop0_out_hdmi>; + }; + + hdmi_in_vop1: endpoint@1 { + reg = <1>; + remote-endpoint = <&vop1_out_hdmi>; + }; + }; + + hdmi_out: port@1 { + reg = <1>; + }; }; }; @@ -343,33 +391,33 @@ emac { emac_xfer: emac-xfer { - rockchip,pins = <RK_GPIO1 16 RK_FUNC_2 &pcfg_pull_none>, /* mac_clk */ - <RK_GPIO1 17 RK_FUNC_2 &pcfg_pull_none>, /* tx_en */ - <RK_GPIO1 18 RK_FUNC_2 &pcfg_pull_none>, /* txd1 */ - <RK_GPIO1 19 RK_FUNC_2 &pcfg_pull_none>, /* txd0 */ - <RK_GPIO1 20 RK_FUNC_2 &pcfg_pull_none>, /* rx_err */ - <RK_GPIO1 21 RK_FUNC_2 &pcfg_pull_none>, /* crs_dvalid */ - <RK_GPIO1 22 RK_FUNC_2 &pcfg_pull_none>, /* rxd1 */ - <RK_GPIO1 23 RK_FUNC_2 &pcfg_pull_none>; /* rxd0 */ + rockchip,pins = <1 RK_PC0 2 &pcfg_pull_none>, /* mac_clk */ + <1 RK_PC1 2 &pcfg_pull_none>, /* tx_en */ + <1 RK_PC2 2 &pcfg_pull_none>, /* txd1 */ + <1 RK_PC3 2 &pcfg_pull_none>, /* txd0 */ + <1 RK_PC4 2 &pcfg_pull_none>, /* rx_err */ + <1 RK_PC5 2 &pcfg_pull_none>, /* crs_dvalid */ + <1 RK_PC6 2 &pcfg_pull_none>, /* rxd1 */ + <1 RK_PC7 2 &pcfg_pull_none>; /* rxd0 */ }; emac_mdio: emac-mdio { - rockchip,pins = <RK_GPIO1 24 RK_FUNC_2 &pcfg_pull_none>, /* mac_md */ - <RK_GPIO1 25 RK_FUNC_2 &pcfg_pull_none>; /* mac_mdclk */ + rockchip,pins = <1 RK_PD0 2 &pcfg_pull_none>, /* mac_md */ + <1 RK_PD1 2 &pcfg_pull_none>; /* mac_mdclk */ }; }; emmc { emmc_clk: emmc-clk { - rockchip,pins = <RK_GPIO3 31 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <3 RK_PD7 2 &pcfg_pull_default>; }; emmc_cmd: emmc-cmd { - rockchip,pins = <RK_GPIO4 9 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <4 RK_PB1 2 &pcfg_pull_default>; }; emmc_rst: emmc-rst { - rockchip,pins = <RK_GPIO4 10 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <4 RK_PB2 2 &pcfg_pull_default>; }; /* @@ -380,245 +428,256 @@ */ }; + hdmi { + hdmi_hpd: hdmi-hpd { + rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; + }; + + hdmii2c_xfer: hdmii2c-xfer { + rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, + <0 RK_PA2 1 &pcfg_pull_none>; + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { - rockchip,pins = <RK_GPIO2 28 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO2 29 RK_FUNC_1 &pcfg_pull_none>; + rockchip,pins = <2 RK_PD4 1 &pcfg_pull_none>, + <2 RK_PD5 1 &pcfg_pull_none>; }; }; i2c1 { i2c1_xfer: i2c1-xfer { - rockchip,pins = <RK_GPIO2 30 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO2 31 RK_FUNC_1 &pcfg_pull_none>; + rockchip,pins = <2 RK_PD6 1 &pcfg_pull_none>, + <2 RK_PD7 1 &pcfg_pull_none>; }; }; i2c2 { i2c2_xfer: i2c2-xfer { - rockchip,pins = <RK_GPIO3 0 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO3 1 RK_FUNC_1 &pcfg_pull_none>; + rockchip,pins = <3 RK_PA0 1 &pcfg_pull_none>, + <3 RK_PA1 1 &pcfg_pull_none>; }; }; i2c3 { i2c3_xfer: i2c3-xfer { - rockchip,pins = <RK_GPIO3 2 RK_FUNC_2 &pcfg_pull_none>, - <RK_GPIO3 3 RK_FUNC_2 &pcfg_pull_none>; + rockchip,pins = <3 RK_PA2 2 &pcfg_pull_none>, + <3 RK_PA3 2 &pcfg_pull_none>; }; }; i2c4 { i2c4_xfer: i2c4-xfer { - rockchip,pins = <RK_GPIO3 4 RK_FUNC_1 &pcfg_pull_none>, - <RK_GPIO3 5 RK_FUNC_1 &pcfg_pull_none>; + rockchip,pins = <3 RK_PA4 1 &pcfg_pull_none>, + <3 RK_PA5 1 &pcfg_pull_none>; }; }; pwm0 { pwm0_out: pwm0-out { - rockchip,pins = <RK_GPIO0 3 RK_FUNC_1 &pcfg_pull_none>; + rockchip,pins = <0 RK_PA3 1 &pcfg_pull_none>; }; }; pwm1 { pwm1_out: pwm1-out { - rockchip,pins = <RK_GPIO0 4 RK_FUNC_1 &pcfg_pull_none>; + rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>; }; }; pwm2 { pwm2_out: pwm2-out { - rockchip,pins = <RK_GPIO0 30 RK_FUNC_1 &pcfg_pull_none>; + rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>; }; }; pwm3 { pwm3_out: pwm3-out { - rockchip,pins = <RK_GPIO0 31 RK_FUNC_1 &pcfg_pull_none>; + rockchip,pins = <0 RK_PD7 1 &pcfg_pull_none>; }; }; spi0 { spi0_clk: spi0-clk { - rockchip,pins = <RK_GPIO1 5 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <1 RK_PA5 2 &pcfg_pull_default>; }; spi0_cs0: spi0-cs0 { - rockchip,pins = <RK_GPIO1 4 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <1 RK_PA4 2 &pcfg_pull_default>; }; spi0_tx: spi0-tx { - rockchip,pins = <RK_GPIO1 7 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <1 RK_PA7 2 &pcfg_pull_default>; }; spi0_rx: spi0-rx { - rockchip,pins = <RK_GPIO1 6 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <1 RK_PA6 2 &pcfg_pull_default>; }; spi0_cs1: spi0-cs1 { - rockchip,pins = <RK_GPIO4 15 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <4 RK_PB7 1 &pcfg_pull_default>; }; }; spi1 { spi1_clk: spi1-clk { - rockchip,pins = <RK_GPIO2 19 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <2 RK_PC3 2 &pcfg_pull_default>; }; spi1_cs0: spi1-cs0 { - rockchip,pins = <RK_GPIO2 20 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <2 RK_PC4 2 &pcfg_pull_default>; }; spi1_rx: spi1-rx { - rockchip,pins = <RK_GPIO2 22 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <2 RK_PC6 2 &pcfg_pull_default>; }; spi1_tx: spi1-tx { - rockchip,pins = <RK_GPIO2 21 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <2 RK_PC5 2 &pcfg_pull_default>; }; spi1_cs1: spi1-cs1 { - rockchip,pins = <RK_GPIO2 23 RK_FUNC_2 &pcfg_pull_default>; + rockchip,pins = <2 RK_PC7 2 &pcfg_pull_default>; }; }; uart0 { uart0_xfer: uart0-xfer { - rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <1 RK_PA0 1 &pcfg_pull_default>, + <1 RK_PA1 1 &pcfg_pull_default>; }; uart0_cts: uart0-cts { - rockchip,pins = <RK_GPIO1 2 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <1 RK_PA2 1 &pcfg_pull_default>; }; uart0_rts: uart0-rts { - rockchip,pins = <RK_GPIO1 3 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <1 RK_PA3 1 &pcfg_pull_default>; }; }; uart1 { uart1_xfer: uart1-xfer { - rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <1 RK_PA4 1 &pcfg_pull_default>, + <1 RK_PA5 1 &pcfg_pull_default>; }; uart1_cts: uart1-cts { - rockchip,pins = <RK_GPIO1 6 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <1 RK_PA6 1 &pcfg_pull_default>; }; uart1_rts: uart1-rts { - rockchip,pins = <RK_GPIO1 7 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <1 RK_PA7 1 &pcfg_pull_default>; }; }; uart2 { uart2_xfer: uart2-xfer { - rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <1 RK_PB0 1 &pcfg_pull_default>, + <1 RK_PB1 1 &pcfg_pull_default>; }; /* no rts / cts for uart2 */ }; uart3 { uart3_xfer: uart3-xfer { - rockchip,pins = <RK_GPIO3 27 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO3 28 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PD3 1 &pcfg_pull_default>, + <3 RK_PD4 1 &pcfg_pull_default>; }; uart3_cts: uart3-cts { - rockchip,pins = <RK_GPIO3 29 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PD5 1 &pcfg_pull_default>; }; uart3_rts: uart3-rts { - rockchip,pins = <RK_GPIO3 30 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PD6 1 &pcfg_pull_default>; }; }; sd0 { sd0_clk: sd0-clk { - rockchip,pins = <RK_GPIO3 8 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PB0 1 &pcfg_pull_default>; }; sd0_cmd: sd0-cmd { - rockchip,pins = <RK_GPIO3 9 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PB1 1 &pcfg_pull_default>; }; sd0_cd: sd0-cd { - rockchip,pins = <RK_GPIO3 14 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PB6 1 &pcfg_pull_default>; }; sd0_wp: sd0-wp { - rockchip,pins = <RK_GPIO3 15 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PB7 1 &pcfg_pull_default>; }; sd0_bus1: sd0-bus-width1 { - rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PB2 1 &pcfg_pull_default>; }; sd0_bus4: sd0-bus-width4 { - rockchip,pins = <RK_GPIO3 10 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO3 11 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO3 12 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO3 13 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PB2 1 &pcfg_pull_default>, + <3 RK_PB3 1 &pcfg_pull_default>, + <3 RK_PB4 1 &pcfg_pull_default>, + <3 RK_PB5 1 &pcfg_pull_default>; }; }; sd1 { sd1_clk: sd1-clk { - rockchip,pins = <RK_GPIO3 21 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PC5 1 &pcfg_pull_default>; }; sd1_cmd: sd1-cmd { - rockchip,pins = <RK_GPIO3 16 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PC0 1 &pcfg_pull_default>; }; sd1_cd: sd1-cd { - rockchip,pins = <RK_GPIO3 22 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PC6 1 &pcfg_pull_default>; }; sd1_wp: sd1-wp { - rockchip,pins = <RK_GPIO3 23 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PC7 1 &pcfg_pull_default>; }; sd1_bus1: sd1-bus-width1 { - rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PC1 1 &pcfg_pull_default>; }; sd1_bus4: sd1-bus-width4 { - rockchip,pins = <RK_GPIO3 17 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO3 18 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO3 19 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO3 20 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <3 RK_PC1 1 &pcfg_pull_default>, + <3 RK_PC2 1 &pcfg_pull_default>, + <3 RK_PC3 1 &pcfg_pull_default>, + <3 RK_PC4 1 &pcfg_pull_default>; }; }; i2s0 { i2s0_bus: i2s0-bus { - rockchip,pins = <RK_GPIO0 7 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 8 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 9 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 10 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 11 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 12 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 13 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 14 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 15 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <0 RK_PA7 1 &pcfg_pull_default>, + <0 RK_PB0 1 &pcfg_pull_default>, + <0 RK_PB1 1 &pcfg_pull_default>, + <0 RK_PB2 1 &pcfg_pull_default>, + <0 RK_PB3 1 &pcfg_pull_default>, + <0 RK_PB4 1 &pcfg_pull_default>, + <0 RK_PB5 1 &pcfg_pull_default>, + <0 RK_PB6 1 &pcfg_pull_default>, + <0 RK_PB7 1 &pcfg_pull_default>; }; }; i2s1 { i2s1_bus: i2s1-bus { - rockchip,pins = <RK_GPIO0 16 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 17 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 18 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 19 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 20 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 21 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <0 RK_PC0 1 &pcfg_pull_default>, + <0 RK_PC1 1 &pcfg_pull_default>, + <0 RK_PC2 1 &pcfg_pull_default>, + <0 RK_PC3 1 &pcfg_pull_default>, + <0 RK_PC4 1 &pcfg_pull_default>, + <0 RK_PC5 1 &pcfg_pull_default>; }; }; i2s2 { i2s2_bus: i2s2-bus { - rockchip,pins = <RK_GPIO0 24 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 25 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 26 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 27 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 28 RK_FUNC_1 &pcfg_pull_default>, - <RK_GPIO0 29 RK_FUNC_1 &pcfg_pull_default>; + rockchip,pins = <0 RK_PD0 1 &pcfg_pull_default>, + <0 RK_PD1 1 &pcfg_pull_default>, + <0 RK_PD2 1 &pcfg_pull_default>, + <0 RK_PD3 1 &pcfg_pull_default>, + <0 RK_PD4 1 &pcfg_pull_default>, + <0 RK_PD5 1 &pcfg_pull_default>; }; }; }; |