diff options
Diffstat (limited to 'arch/arm/boot/dts/berlin2cd.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/berlin2cd.dtsi | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi index cc1df65da504..230df3b1770e 100644 --- a/arch/arm/boot/dts/berlin2cd.dtsi +++ b/arch/arm/boot/dts/berlin2cd.dtsi @@ -45,6 +45,15 @@ ranges = <0 0xf7000000 0x1000000>; + sdhci0: sdhci@ab0000 { + compatible = "mrvl,pxav3-mmc"; + reg = <0xab0000 0x200>; + clocks = <&chip CLKID_SDIO0XIN>, <&chip CLKID_SDIO0>; + clock-names = "io", "core"; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + l2: l2-cache-controller@ac0000 { compatible = "arm,pl310-cache"; reg = <0xac0000 0x1000>; @@ -66,6 +75,58 @@ clocks = <&chip CLKID_TWD>; }; + usb_phy0: usb-phy@b74000 { + compatible = "marvell,berlin2cd-usb-phy"; + reg = <0xb74000 0x128>; + #phy-cells = <0>; + resets = <&chip 0x178 23>; + status = "disabled"; + }; + + usb_phy1: usb-phy@b78000 { + compatible = "marvell,berlin2cd-usb-phy"; + reg = <0xb78000 0x128>; + #phy-cells = <0>; + resets = <&chip 0x178 24>; + status = "disabled"; + }; + + eth1: ethernet@b90000 { + compatible = "marvell,pxa168-eth"; + reg = <0xb90000 0x10000>; + clocks = <&chip CLKID_GETH1>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + /* set by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + #address-cells = <1>; + #size-cells = <0>; + phy-connection-type = "mii"; + phy-handle = <ðphy1>; + status = "disabled"; + + ethphy1: ethernet-phy@0 { + reg = <0>; + }; + }; + + eth0: ethernet@e50000 { + compatible = "marvell,pxa168-eth"; + reg = <0xe50000 0x10000>; + clocks = <&chip CLKID_GETH0>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + /* set by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + #address-cells = <1>; + #size-cells = <0>; + phy-connection-type = "mii"; + phy-handle = <ðphy0>; + status = "disabled"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + }; + apb@e80000 { compatible = "simple-bus"; #address-cells = <1>; @@ -231,6 +292,7 @@ chip: chip-control@ea0000 { compatible = "marvell,berlin2cd-chip-ctrl"; #clock-cells = <1>; + #reset-cells = <2>; reg = <0xea0000 0x400>; clocks = <&refclk>; clock-names = "refclk"; @@ -241,6 +303,26 @@ }; }; + usb0: usb@ed0000 { + compatible = "chipidea,usb2"; + reg = <0xed0000 0x200>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&chip CLKID_USB0>; + phys = <&usb_phy0>; + phy-names = "usb-phy"; + status = "disabled"; + }; + + usb1: usb@ee0000 { + compatible = "chipidea,usb2"; + reg = <0xee0000 0x200>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&chip CLKID_USB1>; + phys = <&usb_phy1>; + phy-names = "usb-phy"; + status = "disabled"; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; |