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-rw-r--r--arch/arc/boot/dts/axc003_idu.dtsi23
-rw-r--r--arch/arc/boot/dts/haps_hs_idu.dts10
-rw-r--r--arch/arc/boot/dts/nsim_hs_idu.dts15
-rw-r--r--arch/arc/boot/dts/nsimosci_hs_idu.dts20
-rw-r--r--arch/arc/boot/dts/vdk_axc003_idu.dtsi13
5 files changed, 14 insertions, 67 deletions
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index 3d6cfa32bf51..695f9fa1996b 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -40,18 +40,7 @@
compatible = "snps,archs-idu-intc";
interrupt-controller;
interrupt-parent = <&core_intc>;
-
- /*
- * <hwirq distribution>
- * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
- */
- #interrupt-cells = <2>;
-
- /*
- * upstream irqs to core intc - downstream these are
- * "COMMON" irq 0,1..
- */
- interrupts = <24 25>;
+ #interrupt-cells = <1>;
};
/*
@@ -73,12 +62,7 @@
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&idu_intc>;
-
- /*
- * cmn irq 1 -> cpu irq 25
- * Distribute to cpu0 only
- */
- interrupts = <1 1>;
+ interrupts = <1>;
};
};
@@ -119,8 +103,7 @@
reg = < 0xe0012000 0x200 >;
interrupt-controller;
interrupt-parent = <&idu_intc>;
- interrupts = <0 1>; /* cmn irq 0 -> cpu irq 24
- distribute to cpu0 only */
+ interrupts = <0>;
};
memory {
diff --git a/arch/arc/boot/dts/haps_hs_idu.dts b/arch/arc/boot/dts/haps_hs_idu.dts
index 65204b4c0f13..0a857fa73190 100644
--- a/arch/arc/boot/dts/haps_hs_idu.dts
+++ b/arch/arc/boot/dts/haps_hs_idu.dts
@@ -54,11 +54,7 @@
compatible = "snps,archs-idu-intc";
interrupt-controller;
interrupt-parent = <&core_intc>;
- /* <hwirq distribution>
- distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3 */
- #interrupt-cells = <2>;
- interrupts = <24 25 26 27 28 29 30 31>;
-
+ #interrupt-cells = <1>;
};
uart0: serial@f0000000 {
@@ -66,9 +62,7 @@
compatible = "ns16550a";
reg = <0xf0000000 0x2000>;
interrupt-parent = <&idu_intc>;
- /* interrupts = <0 1>; DEST=1*/
- /* interrupts = <0 2>; DEST=2*/
- interrupts = <0 0>; /* RR*/
+ interrupts = <0>;
clock-frequency = <50000000>;
baud = <115200>;
reg-shift = <2>;
diff --git a/arch/arc/boot/dts/nsim_hs_idu.dts b/arch/arc/boot/dts/nsim_hs_idu.dts
index 48434d7c4498..4f98ebf71fd8 100644
--- a/arch/arc/boot/dts/nsim_hs_idu.dts
+++ b/arch/arc/boot/dts/nsim_hs_idu.dts
@@ -46,25 +46,14 @@
compatible = "snps,archs-idu-intc";
interrupt-controller;
interrupt-parent = <&core_intc>;
-
- /*
- * <hwirq distribution>
- * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
- */
- #interrupt-cells = <2>;
-
- /*
- * upstream irqs to core intc - downstream these are
- * "COMMON" irq 0,1..
- */
- interrupts = <24 25 26 27 28 29 30 31>;
+ #interrupt-cells = <1>;
};
arcuart0: serial@c0fc1000 {
compatible = "snps,arc-uart";
reg = <0xc0fc1000 0x100>;
interrupt-parent = <&idu_intc>;
- interrupts = <0 0>;
+ interrupts = <0>;
clock-frequency = <80000000>;
current-speed = <115200>;
status = "okay";
diff --git a/arch/arc/boot/dts/nsimosci_hs_idu.dts b/arch/arc/boot/dts/nsimosci_hs_idu.dts
index cbf65b6cc7c6..37be2bb8dd39 100644
--- a/arch/arc/boot/dts/nsimosci_hs_idu.dts
+++ b/arch/arc/boot/dts/nsimosci_hs_idu.dts
@@ -50,26 +50,14 @@
compatible = "snps,archs-idu-intc";
interrupt-controller;
interrupt-parent = <&core_intc>;
-
- /*
- * <hwirq distribution>
- * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
- */
- #interrupt-cells = <2>;
-
- /*
- * upstream irqs to core intc - downstream these are
- * "COMMON" irq 0,1..
- */
- interrupts = <24 25 26 27 28 29 30 31>;
+ #interrupt-cells = <1>;
};
uart0: serial@f0000000 {
compatible = "ns8250";
reg = <0xf0000000 0x2000>;
interrupt-parent = <&idu_intc>;
- interrupts = <0 0>; /* cmn irq 0 -> cpu irq 24
- RR distribute to all cpus */
+ interrupts = <0>;
clock-frequency = <3686400>;
baud = <115200>;
reg-shift = <2>;
@@ -93,7 +81,7 @@
ps2: ps2@f9001000 {
compatible = "snps,arc_ps2";
reg = <0xf9000400 0x14>;
- interrupts = <3 0>;
+ interrupts = <3>;
interrupt-parent = <&idu_intc>;
interrupt-names = "arc_ps2_irq";
};
@@ -102,7 +90,7 @@
compatible = "ezchip,nps-mgt-enet";
reg = <0xf0003000 0x44>;
interrupt-parent = <&idu_intc>;
- interrupts = <1 2>;
+ interrupts = <1>;
};
arcpct0: pct {
diff --git a/arch/arc/boot/dts/vdk_axc003_idu.dtsi b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
index 82214cd7ba0c..28956f9a9f3d 100644
--- a/arch/arc/boot/dts/vdk_axc003_idu.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
@@ -41,14 +41,7 @@
compatible = "snps,archs-idu-intc";
interrupt-controller;
interrupt-parent = <&core_intc>;
-
- /*
- * <hwirq distribution>
- * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
- */
- #interrupt-cells = <2>;
-
- interrupts = <24 25 26 27>;
+ #interrupt-cells = <1>;
};
debug_uart: dw-apb-uart@0x5000 {
@@ -56,7 +49,7 @@
reg = <0x5000 0x100>;
clock-frequency = <2403200>;
interrupt-parent = <&idu_intc>;
- interrupts = <2 0>;
+ interrupts = <2>;
baud = <115200>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -70,7 +63,7 @@
reg = < 0xe0012000 0x200 >;
interrupt-controller;
interrupt-parent = <&idu_intc>;
- interrupts = < 0 0 >;
+ interrupts = <0>;
};
memory {