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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/samsung,exynos-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos SoC USB 3.0 DWC3 Controller
+
+maintainers:
+ - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
+
+properties:
+ compatible:
+ enum:
+ - samsung,exynos5250-dwusb3
+ - samsung,exynos5433-dwusb3
+ - samsung,exynos7-dwusb3
+
+ '#address-cells':
+ const: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 4
+
+ clock-names:
+ minItems: 1
+ maxItems: 4
+
+ ranges: true
+
+ '#size-cells':
+ const: 1
+
+ vdd10-supply:
+ description: 1.0V power supply
+
+ vdd33-supply:
+ description: 3.0V/3.3V power supply
+
+patternProperties:
+ "^usb@[0-9a-f]+$":
+ $ref: snps,dwc3.yaml#
+ description: Required child node
+
+required:
+ - compatible
+ - '#address-cells'
+ - clocks
+ - clock-names
+ - ranges
+ - '#size-cells'
+ - vdd10-supply
+ - vdd33-supply
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos5250-dwusb3
+ then:
+ properties:
+ clocks:
+ minItems: 1
+ maxItems: 1
+ clock-names:
+ items:
+ - const: usbdrd30
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos54333-dwusb3
+ then:
+ properties:
+ clocks:
+ minItems: 4
+ maxItems: 4
+ clock-names:
+ items:
+ - const: aclk
+ - const: susp_clk
+ - const: pipe_pclk
+ - const: phyclk
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos7-dwusb3
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ maxItems: 3
+ clock-names:
+ items:
+ - const: usbdrd30
+ - const: usbdrd30_susp_clk
+ - const: usbdrd30_axius_clk
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/exynos5420.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ usb {
+ compatible = "samsung,exynos5250-dwusb3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clocks = <&clock CLK_USBD300>;
+ clock-names = "usbdrd30";
+ vdd33-supply = <&ldo9_reg>;
+ vdd10-supply = <&ldo11_reg>;
+
+ usb@12000000 {
+ compatible = "snps,dwc3";
+ reg = <0x12000000 0x10000>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ snps,dis_u3_susphy_quirk;
+ };
+ };