diff options
31 files changed, 140 insertions, 517 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 5f0420a0da5b..5e92f5500729 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8919,7 +8919,20 @@ M: Josh Poimboeuf <jpoimboe@redhat.com> S: Supported F: tools/objtool/ -OMAP SUPPORT +OMAP1 SUPPORT +M: Aaro Koskinen <aaro.koskinen@iki.fi> +M: Tony Lindgren <tony@atomide.com> +L: linux-omap@vger.kernel.org +Q: http://patchwork.kernel.org/project/linux-omap/list/ +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git +S: Maintained +F: arch/arm/mach-omap1/ +F: arch/arm/plat-omap/ +F: arch/arm/configs/omap1_defconfig +F: drivers/i2c/busses/i2c-omap.c +F: include/linux/i2c-omap.h + +OMAP2+ SUPPORT M: Tony Lindgren <tony@atomide.com> L: linux-omap@vger.kernel.org W: http://www.muru.com/linux/omap/ @@ -8927,8 +8940,8 @@ W: http://linux.omap.com/ Q: http://patchwork.kernel.org/project/linux-omap/list/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git S: Maintained -F: arch/arm/*omap*/ -F: arch/arm/configs/omap1_defconfig +F: arch/arm/mach-omap2/ +F: arch/arm/plat-omap/ F: arch/arm/configs/omap2plus_defconfig F: drivers/i2c/busses/i2c-omap.c F: drivers/irqchip/irq-omap-intc.c diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig index 5225fbcb250d..f3f8c5c658db 100644 --- a/arch/arm/mach-aspeed/Kconfig +++ b/arch/arm/mach-aspeed/Kconfig @@ -5,6 +5,8 @@ menuconfig ARCH_ASPEED select WATCHDOG select ASPEED_WATCHDOG select MOXART_TIMER + select MFD_SYSCON + select PINCTRL help Say Y here if you want to run your kernel on an ASpeed BMC SoC. @@ -14,6 +16,7 @@ config MACH_ASPEED_G4 bool "Aspeed SoC 4th Generation" depends on ARCH_MULTI_V5 select CPU_ARM926T + select PINCTRL_ASPEED_G4 help Say yes if you intend to run on an Aspeed ast2400 or similar fourth generation BMCs, such as those used by OpenPower Power8 @@ -23,6 +26,7 @@ config MACH_ASPEED_G5 bool "Aspeed SoC 5th Generation" depends on ARCH_MULTI_V6 select CPU_V6 + select PINCTRL_ASPEED_G5 help Say yes if you intend to run on an Aspeed ast2500 or similar fifth generation Aspeed BMCs. diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index b4332b727e9c..3d89b7905bd9 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -55,7 +55,7 @@ static struct { int memctrl; } at91_pm_data; -void __iomem *at91_ramc_base[2]; +static void __iomem *at91_ramc_base[2]; static int at91_pm_valid_state(suspend_state_t state) { diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 3fcf8810f14e..bf980c6ef294 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -18,8 +18,6 @@ #include <soc/at91/at91sam9_sdramc.h> #ifndef __ASSEMBLY__ -extern void __iomem *at91_ramc_base[]; - #define at91_ramc_read(id, field) \ __raw_readl(at91_ramc_base[id] + field) diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index 757fc11de30d..35b832f4bc7e 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -45,8 +45,8 @@ static struct platform_device exynos_cpuidle = { .id = -1, }; -void __iomem *sysram_base_addr; -void __iomem *sysram_ns_base_addr; +void __iomem *sysram_base_addr __ro_after_init; +void __iomem *sysram_ns_base_addr __ro_after_init; void __init exynos_sysram_init(void) { diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c index f086bf615b29..038fd8c993d0 100644 --- a/arch/arm/mach-exynos/mcpm-exynos.c +++ b/arch/arm/mach-exynos/mcpm-exynos.c @@ -32,7 +32,7 @@ #define EXYNOS5420_USE_ARM_CORE_DOWN_STATE BIT(29) #define EXYNOS5420_USE_L2_COMMON_UP_STATE BIT(30) -static void __iomem *ns_sram_base_addr; +static void __iomem *ns_sram_base_addr __ro_after_init; /* * The common v7_exit_coherency_flush API could not be used because of the diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c index 06332f626565..518420241062 100644 --- a/arch/arm/mach-exynos/suspend.c +++ b/arch/arm/mach-exynos/suspend.c @@ -57,7 +57,7 @@ struct exynos_wkup_irq { struct exynos_pm_data { const struct exynos_wkup_irq *wkup_irq; unsigned int wake_disable_mask; - unsigned int *release_ret_regs; + const unsigned int *release_ret_regs; void (*pm_prepare)(void); void (*pm_resume_prepare)(void); @@ -66,7 +66,7 @@ struct exynos_pm_data { int (*cpu_suspend)(unsigned long); }; -static const struct exynos_pm_data *pm_data; +static const struct exynos_pm_data *pm_data __ro_after_init; static int exynos5420_cpu_state; static unsigned int exynos_pmu_spare3; @@ -95,7 +95,7 @@ static const struct exynos_wkup_irq exynos5250_wkup_irq[] = { { /* sentinel */ }, }; -static unsigned int exynos_release_ret_regs[] = { +static const unsigned int exynos_release_ret_regs[] = { S5P_PAD_RET_MAUDIO_OPTION, S5P_PAD_RET_GPIO_OPTION, S5P_PAD_RET_UART_OPTION, @@ -106,7 +106,7 @@ static unsigned int exynos_release_ret_regs[] = { REG_TABLE_END, }; -static unsigned int exynos3250_release_ret_regs[] = { +static const unsigned int exynos3250_release_ret_regs[] = { S5P_PAD_RET_MAUDIO_OPTION, S5P_PAD_RET_GPIO_OPTION, S5P_PAD_RET_UART_OPTION, @@ -119,7 +119,7 @@ static unsigned int exynos3250_release_ret_regs[] = { REG_TABLE_END, }; -static unsigned int exynos5420_release_ret_regs[] = { +static const unsigned int exynos5420_release_ret_regs[] = { EXYNOS_PAD_RET_DRAM_OPTION, EXYNOS_PAD_RET_MAUDIO_OPTION, EXYNOS_PAD_RET_JTAG_OPTION, diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 4f5fd4a084c0..43e3e188f521 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -720,26 +720,6 @@ EXPORT_SYMBOL(clk_get_parent); * OMAP specific clock functions shared between omap1 and omap2 */ -int __initdata mpurate; - -/* - * By default we use the rate set by the bootloader. - * You can override this with mpurate= cmdline option. - */ -static int __init omap_clk_setup(char *str) -{ - get_option(&str, &mpurate); - - if (!mpurate) - return 1; - - if (mpurate < 1000) - mpurate *= 1000000; - - return 1; -} -__setup("mpurate=", omap_clk_setup); - /* Used for clocks that always have same value as the parent clock */ unsigned long followparent_recalc(struct clk *clk) { diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 1e4918a3a5ee..f2d1be211723 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -173,8 +173,6 @@ struct clk_functions { void (*clk_disable_unused)(struct clk *clk); }; -extern int mpurate; - extern int clk_init(struct clk_functions *custom_clocks); extern void clk_preinit(struct clk *clk); extern int clk_register(struct clk *clk); diff --git a/arch/arm/mach-omap1/include/mach/usb.h b/arch/arm/mach-omap1/include/mach/usb.h index a7c5559caef2..eb76628ff843 100644 --- a/arch/arm/mach-omap1/include/mach/usb.h +++ b/arch/arm/mach-omap1/include/mach/usb.h @@ -10,8 +10,6 @@ #include <linux/platform_data/usb-omap1.h> -void omap_otg_init(struct omap_usb_config *config); - #if IS_ENABLED(CONFIG_USB) void omap1_usb_init(struct omap_usb_config *pdata); #else diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index 2506e598a067..455e2cf2866d 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c @@ -1,5 +1,5 @@ /* - * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx + * Platform level USB initialization for FS USB OTG controller on omap1 * * Copyright (C) 2004 Texas Instruments, Inc. * @@ -58,11 +58,12 @@ #ifdef CONFIG_ARCH_OMAP_OTG -void __init +static void __init omap_otg_init(struct omap_usb_config *config) { u32 syscon; int alt_pingroup = 0; + u16 w; /* NOTE: no bus or clock setup (yet?) */ @@ -87,39 +88,35 @@ omap_otg_init(struct omap_usb_config *config) if (config->otg) syscon |= OTG_EN; #endif - if (cpu_class_is_omap1()) - pr_debug("USB_TRANSCEIVER_CTRL = %03x\n", - omap_readl(USB_TRANSCEIVER_CTRL)); + pr_debug("USB_TRANSCEIVER_CTRL = %03x\n", + omap_readl(USB_TRANSCEIVER_CTRL)); pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2)); omap_writel(syscon, OTG_SYSCON_2); printk("USB: hmc %d", config->hmc_mode); if (!alt_pingroup) - printk(", usb2 alt %d wires", config->pins[2]); + pr_cont(", usb2 alt %d wires", config->pins[2]); else if (config->pins[0]) - printk(", usb0 %d wires%s", config->pins[0], + pr_cont(", usb0 %d wires%s", config->pins[0], is_usb0_device(config) ? " (dev)" : ""); if (config->pins[1]) - printk(", usb1 %d wires", config->pins[1]); + pr_cont(", usb1 %d wires", config->pins[1]); if (!alt_pingroup && config->pins[2]) - printk(", usb2 %d wires", config->pins[2]); + pr_cont(", usb2 %d wires", config->pins[2]); if (config->otg) - printk(", Mini-AB on usb%d", config->otg - 1); - printk("\n"); + pr_cont(", Mini-AB on usb%d", config->otg - 1); + pr_cont("\n"); - if (cpu_class_is_omap1()) { - u16 w; + /* leave USB clocks/controllers off until needed */ + w = omap_readw(ULPD_SOFT_REQ); + w &= ~SOFT_USB_CLK_REQ; + omap_writew(w, ULPD_SOFT_REQ); - /* leave USB clocks/controllers off until needed */ - w = omap_readw(ULPD_SOFT_REQ); - w &= ~SOFT_USB_CLK_REQ; - omap_writew(w, ULPD_SOFT_REQ); + w = omap_readw(ULPD_CLOCK_CTRL); + w &= ~USB_MCLK_EN; + w |= DIS_USB_PVCI_CLK; + omap_writew(w, ULPD_CLOCK_CTRL); - w = omap_readw(ULPD_CLOCK_CTRL); - w &= ~USB_MCLK_EN; - w |= DIS_USB_PVCI_CLK; - omap_writew(w, ULPD_CLOCK_CTRL); - } syscon = omap_readl(OTG_SYSCON_1); syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; @@ -166,7 +163,7 @@ omap_otg_init(struct omap_usb_config *config) } #else -void omap_otg_init(struct omap_usb_config *config) {} +static void omap_otg_init(struct omap_usb_config *config) {} #endif #if IS_ENABLED(CONFIG_USB_OMAP) @@ -573,13 +570,13 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config) printk("USB: hmc %d", config->hmc_mode); if (config->pins[0]) - printk(", usb0 %d wires%s", config->pins[0], + pr_cont(", usb0 %d wires%s", config->pins[0], is_usb0_device(config) ? " (dev)" : ""); if (config->pins[1]) - printk(", usb1 %d wires", config->pins[1]); + pr_cont(", usb1 %d wires", config->pins[1]); if (config->pins[2]) - printk(", usb2 %d wires", config->pins[2]); - printk("\n"); + pr_cont(", usb2 %d wires", config->pins[2]); + pr_cont("\n"); /* use DPLL for 48 MHz function clock */ pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL), diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index d058125876d8..1270afdcacdf 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -78,8 +78,6 @@ int __init omap2_clk_setup_ll_ops(void) * OMAP2+ specific clock functions */ -/* Private functions */ - /* Public functions */ /** @@ -112,65 +110,6 @@ void omap2_init_clk_clkdm(struct clk_hw *hw) } } -static int __initdata mpurate; - -/* - * By default we use the rate set by the bootloader. - * You can override this with mpurate= cmdline option. - */ -static int __init omap_clk_setup(char *str) -{ - get_option(&str, &mpurate); - - if (!mpurate) - return 1; - - if (mpurate < 1000) - mpurate *= 1000000; - - return 1; -} -__setup("mpurate=", omap_clk_setup); - -/** - * omap2_clk_print_new_rates - print summary of current clock tree rates - * @hfclkin_ck_name: clk name for the off-chip HF oscillator - * @core_ck_name: clk name for the on-chip CORE_CLK - * @mpu_ck_name: clk name for the ARM MPU clock - * - * Prints a short message to the console with the HFCLKIN oscillator - * rate, the rate of the CORE clock, and the rate of the ARM MPU clock. - * Called by the boot-time MPU rate switching code. XXX This is intended - * to be handled by the OPP layer code in the near future and should be - * removed from the clock code. No return value. - */ -void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name, - const char *core_ck_name, - const char *mpu_ck_name) -{ - struct clk *hfclkin_ck, *core_ck, *mpu_ck; - unsigned long hfclkin_rate; - - mpu_ck = clk_get(NULL, mpu_ck_name); - if (WARN(IS_ERR(mpu_ck), "clock: failed to get %s.\n", mpu_ck_name)) - return; - - core_ck = clk_get(NULL, core_ck_name); - if (WARN(IS_ERR(core_ck), "clock: failed to get %s.\n", core_ck_name)) - return; - - hfclkin_ck = clk_get(NULL, hfclkin_ck_name); - if (WARN(IS_ERR(hfclkin_ck), "Failed to get %s.\n", hfclkin_ck_name)) - return; - - hfclkin_rate = clk_get_rate(hfclkin_ck); - - pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n", - (hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10), - (clk_get_rate(core_ck) / 1000000), - (clk_get_rate(mpu_ck) / 1000000)); -} - /** * ti_clk_init_features - init clock features struct for the SoC * diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 67da640ba1c7..4e66295dca25 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -64,10 +64,6 @@ #define OMAP4XXX_EN_DPLL_FRBYPASS 0x6 #define OMAP4XXX_EN_DPLL_LOCKED 0x7 -void omap2_clk_print_new_rates(const char *hfclkin_ck_name, - const char *core_ck_name, - const char *mpu_ck_name); - extern u16 cpu_mask; extern const struct clkops clkops_omap2_dflt_wait; diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index e71cca0950e9..8fa01c0ecdb2 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -46,8 +46,6 @@ #define DISPC_CONTROL3 0x0848 #define DISPC_IRQSTATUS 0x0018 -#define DSS_SYSCONFIG 0x10 -#define DSS_SYSSTATUS 0x14 #define DSS_CONTROL 0x40 #define DSS_SDI_CONTROL 0x44 #define DSS_PLL_CONTROL 0x48 @@ -76,36 +74,6 @@ static struct platform_device omap_display_device = { }, }; -struct omap_dss_hwmod_data { - const char *oh_name; - const char *dev_name; - const int id; -}; - -static const struct omap_dss_hwmod_data omap2_dss_hwmod_data[] __initconst = { - { "dss_core", "omapdss_dss", -1 }, - { "dss_dispc", "omapdss_dispc", -1 }, - { "dss_rfbi", "omapdss_rfbi", -1 }, - { "dss_venc", "omapdss_venc", -1 }, -}; - -static const struct omap_dss_hwmod_data omap3_dss_hwmod_data[] __initconst = { - { "dss_core", "omapdss_dss", -1 }, - { "dss_dispc", "omapdss_dispc", -1 }, - { "dss_rfbi", "omapdss_rfbi", -1 }, - { "dss_venc", "omapdss_venc", -1 }, - { "dss_dsi1", "omapdss_dsi", 0 }, -}; - -static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initconst = { - { "dss_core", "omapdss_dss", -1 }, - { "dss_dispc", "omapdss_dispc", -1 }, - { "dss_rfbi", "omapdss_rfbi", -1 }, - { "dss_dsi1", "omapdss_dsi", 0 }, - { "dss_dsi2", "omapdss_dsi", 1 }, - { "dss_hdmi", "omapdss_hdmi", -1 }, -}; - #define OMAP4_DSIPHY_SYSCON_OFFSET 0x78 static struct regmap *omap4_dsi_mux_syscon; @@ -162,104 +130,6 @@ static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput) return omap_pm_set_min_bus_tput(dev, OCP_INITIATOR_AGENT, tput); } -static struct platform_device *create_dss_pdev(const char *pdev_name, - int pdev_id, const char *oh_name, void *pdata, int pdata_len, - struct platform_device *parent) -{ - struct platform_device *pdev; - struct omap_device *od; - struct omap_hwmod *ohs[1]; - struct omap_hwmod *oh; - int r; - - oh = omap_hwmod_lookup(oh_name); - if (!oh) { - pr_err("Could not look up %s\n", oh_name); - r = -ENODEV; - goto err; - } - - pdev = platform_device_alloc(pdev_name, pdev_id); - if (!pdev) { - pr_err("Could not create pdev for %s\n", pdev_name); - r = -ENOMEM; - goto err; - } - - if (parent != NULL) - pdev->dev.parent = &parent->dev; - - if (pdev->id != -1) - dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id); - else - dev_set_name(&pdev->dev, "%s", pdev->name); - - ohs[0] = oh; - od = omap_device_alloc(pdev, ohs, 1); - if (IS_ERR(od)) { - pr_err("Could not alloc omap_device for %s\n", pdev_name); - r = -ENOMEM; - goto err; - } - - r = platform_device_add_data(pdev, pdata, pdata_len); - if (r) { - pr_err("Could not set pdata for %s\n", pdev_name); - goto err; - } - - r = omap_device_register(pdev); - if (r) { - pr_err("Could not register omap_device for %s\n", pdev_name); - goto err; - } - - return pdev; - -err: - return ERR_PTR(r); -} - -static struct platform_device *create_simple_dss_pdev(const char *pdev_name, - int pdev_id, void *pdata, int pdata_len, - struct platform_device *parent) -{ - struct platform_device *pdev; - int r; - - pdev = platform_device_alloc(pdev_name, pdev_id); - if (!pdev) { - pr_err("Could not create pdev for %s\n", pdev_name); - r = -ENOMEM; - goto err; - } - - if (parent != NULL) - pdev->dev.parent = &parent->dev; - - if (pdev->id != -1) - dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id); - else - dev_set_name(&pdev->dev, "%s", pdev->name); - - r = platform_device_add_data(pdev, pdata, pdata_len); - if (r) { - pr_err("Could not set pdata for %s\n", pdev_name); - goto err; - } - - r = platform_device_add(pdev); - if (r) { - pr_err("Could not register platform_device for %s\n", pdev_name); - goto err; - } - - return pdev; - -err: - return ERR_PTR(r); -} - static enum omapdss_version __init omap_display_get_version(void) { if (cpu_is_omap24xx()) @@ -293,132 +163,6 @@ static enum omapdss_version __init omap_display_get_version(void) return OMAPDSS_VER_UNKNOWN; } -int __init omap_display_init(struct omap_dss_board_info *board_data) -{ - int r = 0; - struct platform_device *pdev; - int i, oh_count; - const struct omap_dss_hwmod_data *curr_dss_hwmod; - struct platform_device *dss_pdev; - enum omapdss_version ver; - - /* create omapdss device */ - - ver = omap_display_get_version(); - - if (ver == OMAPDSS_VER_UNKNOWN) { - pr_err("DSS not supported on this SoC\n"); - return -ENODEV; - } - - board_data->version = ver; - board_data->dsi_enable_pads = omap_dsi_enable_pads; - board_data->dsi_disable_pads = omap_dsi_disable_pads; - board_data->set_min_bus_tput = omap_dss_set_min_bus_tput; - - omap_display_device.dev.platform_data = board_data; - - r = platform_device_register(&omap_display_device); - if (r < 0) { - pr_err("Unable to register omapdss device\n"); - return r; - } - - /* create devices for dss hwmods */ - - if (cpu_is_omap24xx()) { - curr_dss_hwmod = omap2_dss_hwmod_data; - oh_count = ARRAY_SIZE(omap2_dss_hwmod_data); - } else if (cpu_is_omap34xx()) { - curr_dss_hwmod = omap3_dss_hwmod_data; - oh_count = ARRAY_SIZE(omap3_dss_hwmod_data); - } else { - curr_dss_hwmod = omap4_dss_hwmod_data; - oh_count = ARRAY_SIZE(omap4_dss_hwmod_data); - } - - /* - * First create the pdev for dss_core, which is used as a parent device - * by the other dss pdevs. Note: dss_core has to be the first item in - * the hwmod list. - */ - dss_pdev = create_dss_pdev(curr_dss_hwmod[0].dev_name, - curr_dss_hwmod[0].id, - curr_dss_hwmod[0].oh_name, - board_data, sizeof(*board_data), - NULL); - - if (IS_ERR(dss_pdev)) { - pr_err("Could not build omap_device for %s\n", - curr_dss_hwmod[0].oh_name); - - return PTR_ERR(dss_pdev); - } - - for (i = 1; i < oh_count; i++) { - pdev = create_dss_pdev(curr_dss_hwmod[i].dev_name, - curr_dss_hwmod[i].id, - curr_dss_hwmod[i].oh_name, - board_data, sizeof(*board_data), - dss_pdev); - - if (IS_ERR(pdev)) { - pr_err("Could not build omap_device for %s\n", - curr_dss_hwmod[i].oh_name); - - return PTR_ERR(pdev); - } - } - - /* Create devices for DPI and SDI */ - - pdev = create_simple_dss_pdev("omapdss_dpi", 0, - board_data, sizeof(*board_data), dss_pdev); - if (IS_ERR(pdev)) { - pr_err("Could not build platform_device for omapdss_dpi\n"); - return PTR_ERR(pdev); - } - - if (cpu_is_omap34xx()) { - pdev = create_simple_dss_pdev("omapdss_sdi", 0, - board_data, sizeof(*board_data), dss_pdev); - if (IS_ERR(pdev)) { - pr_err("Could not build platform_device for omapdss_sdi\n"); - return PTR_ERR(pdev); - } - } - - /* create DRM device */ - r = omap_init_drm(); - if (r < 0) { - pr_err("Unable to register omapdrm device\n"); - return r; - } - - /* create vrfb device */ - r = omap_init_vrfb(); - if (r < 0) { - pr_err("Unable to register omapvrfb device\n"); - return r; - } - - /* create FB device */ - r = omap_init_fb(); - if (r < 0) { - pr_err("Unable to register omapfb device\n"); - return r; - } - - /* create V4L2 display device */ - r = omap_init_vout(); - if (r < 0) { - pr_err("Unable to register omap_vout device\n"); - return r; - } - - return 0; -} - static void dispc_disable_outputs(void) { u32 v, irq_mask = 0; @@ -573,7 +317,7 @@ static const char * const omapdss_compat_names[] __initconst = { "ti,dra7-dss", }; -struct device_node * __init omapdss_find_dss_of_node(void) +static struct device_node * __init omapdss_find_dss_of_node(void) { struct device_node *node; int i; diff --git a/arch/arm/mach-omap2/display.h b/arch/arm/mach-omap2/display.h index 78f253005279..9a39646d4316 100644 --- a/arch/arm/mach-omap2/display.h +++ b/arch/arm/mach-omap2/display.h @@ -31,11 +31,4 @@ int omap_init_vrfb(void); int omap_init_fb(void); int omap_init_vout(void); -struct device_node * __init omapdss_find_dss_of_node(void); - -struct omap_dss_board_info; - -/* Init with the board info */ -int omap_display_init(struct omap_dss_board_info *board_data); - #endif diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index e8b988714a09..0da4f2ea76c4 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -3249,6 +3249,36 @@ int __init omap_hwmod_setup_one(const char *oh_name) } /** + * omap_hwmod_setup_earlycon_flags - set up flags for early console + * + * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as + * early concole so that hwmod core doesn't reset and keep it in idle + * that specific uart. + */ +#ifdef CONFIG_SERIAL_EARLYCON +static void __init omap_hwmod_setup_earlycon_flags(void) +{ + struct device_node *np; + struct omap_hwmod *oh; + const char *uart; + + np = of_find_node_by_path("/chosen"); + if (np) { + uart = of_get_property(np, "stdout-path", NULL); + if (uart) { + np = of_find_node_by_path(uart); + if (np) { + uart = of_get_property(np, "ti,hwmods", NULL); + oh = omap_hwmod_lookup(uart); + if (oh) + oh->flags |= DEBUG_OMAPUART_FLAGS; + } + } + } +} +#endif + +/** * omap_hwmod_setup_all - set up all registered IP blocks * * Initialize and set up all IP blocks registered with the hwmod code. @@ -3261,6 +3291,9 @@ static int __init omap_hwmod_setup_all(void) _ensure_mpu_hwmod_is_setup(NULL); omap_hwmod_for_each(_init, NULL); +#ifdef CONFIG_SERIAL_EARLYCON + omap_hwmod_setup_earlycon_flags(); +#endif omap_hwmod_for_each(_setup, NULL); return 0; diff --git a/arch/arm/mach-s3c24xx/bast-irq.c b/arch/arm/mach-s3c24xx/bast-irq.c index 2bb08961e934..ad8f4cd7c327 100644 --- a/arch/arm/mach-s3c24xx/bast-irq.c +++ b/arch/arm/mach-s3c24xx/bast-irq.c @@ -44,7 +44,7 @@ /* table of ISA irq nos to the relevant mask... zero means * the irq is not implemented */ -static unsigned char bast_pc104_irqmasks[] = { +static const unsigned char bast_pc104_irqmasks[] = { 0, /* 0 */ 0, /* 1 */ 0, /* 2 */ @@ -63,7 +63,7 @@ static unsigned char bast_pc104_irqmasks[] = { 0, /* 15 */ }; -static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 }; +static const unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 }; static void bast_pc104_mask(struct irq_data *data) diff --git a/arch/arm/mach-s3c24xx/iotiming-s3c2410.c b/arch/arm/mach-s3c24xx/iotiming-s3c2410.c index 65e5f9cb650f..b7970f1fa3d5 100644 --- a/arch/arm/mach-s3c24xx/iotiming-s3c2410.c +++ b/arch/arm/mach-s3c24xx/iotiming-s3c2410.c @@ -249,7 +249,7 @@ static int s3c2410_calc_bank(struct s3c_cpufreq_config *cfg, return 0; } -static unsigned int tacc_tab[] = { +static const unsigned int tacc_tab[] = { [0] = 1, [1] = 2, [2] = 3, diff --git a/arch/arm/mach-s3c24xx/pm-s3c2412.c b/arch/arm/mach-s3c24xx/pm-s3c2412.c index d75f95e487ee..0ae4d47a4663 100644 --- a/arch/arm/mach-s3c24xx/pm-s3c2412.c +++ b/arch/arm/mach-s3c24xx/pm-s3c2412.c @@ -53,7 +53,7 @@ static int s3c2412_cpu_suspend(unsigned long arg) } /* mapping of interrupts to parts of the wakeup mask */ -static struct samsung_wakeup_mask wake_irqs[] = { +static const struct samsung_wakeup_mask wake_irqs[] = { { .irq = IRQ_RTC, .bit = S3C2412_PWRCFG_RTC_MASKIRQ, }, }; diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c index 7c66ce1a6bb6..9843eb4dd04e 100644 --- a/arch/arm/mach-s3c64xx/common.c +++ b/arch/arm/mach-s3c64xx/common.c @@ -56,7 +56,8 @@ #include "watchdog-reset.h" /* External clock frequency */ -static unsigned long xtal_f = 12000000, xusbxti_f = 48000000; +static unsigned long xtal_f __ro_after_init = 12000000; +static unsigned long xusbxti_f __ro_after_init = 48000000; void __init s3c64xx_set_xtal_freq(unsigned long freq) { diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index b57783371d52..a3f39dd114f9 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c @@ -58,9 +58,6 @@ static struct resource s3c64xx_iis0_resource[] = { static struct s3c_audio_pdata i2s0_pdata = { .cfg_gpio = s3c64xx_i2s_cfg_gpio, - .dma_filter = pl08x_filter_id, - .dma_playback = DMACH_I2S0_OUT, - .dma_capture = DMACH_I2S0_IN, }; struct platform_device s3c64xx_device_iis0 = { @@ -80,9 +77,6 @@ static struct resource s3c64xx_iis1_resource[] = { static struct s3c_audio_pdata i2s1_pdata = { .cfg_gpio = s3c64xx_i2s_cfg_gpio, - .dma_filter = pl08x_filter_id, - .dma_playback = DMACH_I2S1_OUT, - .dma_capture = DMACH_I2S1_IN, }; struct platform_device s3c64xx_device_iis1 = { @@ -102,9 +96,6 @@ static struct resource s3c64xx_iisv4_resource[] = { static struct s3c_audio_pdata i2sv4_pdata = { .cfg_gpio = s3c64xx_i2s_cfg_gpio, - .dma_filter = pl08x_filter_id, - .dma_playback = DMACH_HSI_I2SV40_TX, - .dma_capture = DMACH_HSI_I2SV40_RX, .type = { .i2s = { .quirks = QUIRK_PRI_6CHAN, @@ -153,9 +144,6 @@ static struct resource s3c64xx_pcm0_resource[] = { static struct s3c_audio_pdata s3c_pcm0_pdata = { .cfg_gpio = s3c64xx_pcm_cfg_gpio, - .dma_filter = pl08x_filter_id, - .dma_capture = DMACH_PCM0_RX, - .dma_playback = DMACH_PCM0_TX, }; struct platform_device s3c64xx_device_pcm0 = { @@ -175,9 +163,6 @@ static struct resource s3c64xx_pcm1_resource[] = { static struct s3c_audio_pdata s3c_pcm1_pdata = { .cfg_gpio = s3c64xx_pcm_cfg_gpio, - .dma_filter = pl08x_filter_id, - .dma_playback = DMACH_PCM1_TX, - .dma_capture = DMACH_PCM1_RX, }; struct platform_device s3c64xx_device_pcm1 = { @@ -209,10 +194,6 @@ static struct resource s3c64xx_ac97_resource[] = { }; static struct s3c_audio_pdata s3c_ac97_pdata = { - .dma_playback = DMACH_AC97_PCMOUT, - .dma_filter = pl08x_filter_id, - .dma_capture = DMACH_AC97_PCMIN, - .dma_capture_mic = DMACH_AC97_MICIN, }; static u64 s3c64xx_ac97_dmamask = DMA_BIT_MASK(32); diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c index 59d91b83b03d..b0be382ff6bb 100644 --- a/arch/arm/mach-s3c64xx/pm.c +++ b/arch/arm/mach-s3c64xx/pm.c @@ -285,7 +285,7 @@ static int s3c64xx_cpu_suspend(unsigned long arg) } /* mapping of interrupts to parts of the wakeup mask */ -static struct samsung_wakeup_mask wake_irqs[] = { +static const struct samsung_wakeup_mask wake_irqs[] = { { .irq = IRQ_RTC_ALARM, .bit = S3C64XX_PWRCFG_RTC_ALARM_DISABLE, }, { .irq = IRQ_RTC_TIC, .bit = S3C64XX_PWRCFG_RTC_TICK_DISABLE, }, { .irq = IRQ_PENDN, .bit = S3C64XX_PWRCFG_TS_DISABLE, }, diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index 0c6bb458b7a4..e19266844e16 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -31,9 +31,21 @@ static struct { int bit; } apmu_cpus[NR_CPUS]; -#define WUPCR_OFFS 0x10 -#define PSTR_OFFS 0x40 -#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n))) +#define WUPCR_OFFS 0x10 /* Wake Up Control Register */ +#define PSTR_OFFS 0x40 /* Power Status Register */ +#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n))) + /* CPUn Power Status Control Register */ +#define DBGRCR_OFFS 0x180 /* Debug Resource Reset Control Reg. */ + +/* Power Status Register */ +#define CPUNST(r, n) (((r) >> (n * 4)) & 3) /* CPUn Status Bit */ +#define CPUST_RUN 0 /* Run Mode */ +#define CPUST_STANDBY 3 /* CoreStandby Mode */ + +/* Debug Resource Reset Control Register */ +#define DBGCPUREN BIT(24) /* CPU Other Reset Request Enable */ +#define DBGCPUNREN(n) BIT((n) + 20) /* CPUn Reset Request Enable */ +#define DBGCPUPREN BIT(19) /* CPU Peripheral Reset Req. Enable */ static int __maybe_unused apmu_power_on(void __iomem *p, int bit) { @@ -59,7 +71,7 @@ static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit) int k; for (k = 0; k < 1000; k++) { - if (((readl_relaxed(p + PSTR_OFFS) >> (bit * 4)) & 0x03) == 3) + if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY) return 1; mdelay(1); @@ -78,6 +90,8 @@ static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu) #ifdef CONFIG_SMP static void apmu_init_cpu(struct resource *res, int cpu, int bit) { + u32 x; + if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem) return; @@ -85,6 +99,11 @@ static void apmu_init_cpu(struct resource *res, int cpu, int bit) apmu_cpus[cpu].bit = bit; pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res); + + /* Setup for debug mode */ + x = readl(apmu_cpus[cpu].iomem + DBGRCR_OFFS); + x |= DBGCPUREN | DBGCPUNREN(bit) | DBGCPUPREN; + writel(x, apmu_cpus[cpu].iomem + DBGRCR_OFFS); } static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit), @@ -197,21 +216,9 @@ static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus) rcar_gen2_pm_init(); } -static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu, - struct task_struct *idle) -{ - /* Error out when hardware debug mode is enabled */ - if (rcar_gen2_read_mode_pins() & BIT(21)) { - pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu); - return -ENOTSUPP; - } - - return shmobile_smp_apmu_boot_secondary(cpu, idle); -} - static struct smp_operations apmu_smp_ops __initdata = { .smp_prepare_cpus = shmobile_smp_apmu_prepare_cpus_dt, - .smp_boot_secondary = shmobile_smp_apmu_boot_secondary_md21, + .smp_boot_secondary = shmobile_smp_apmu_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_can_disable = shmobile_smp_cpu_can_disable, .cpu_die = shmobile_smp_apmu_cpu_die, diff --git a/arch/arm/mach-shmobile/rcar-gen2.h b/arch/arm/mach-shmobile/rcar-gen2.h index 8a66b4aae035..6792e249cf56 100644 --- a/arch/arm/mach-shmobile/rcar-gen2.h +++ b/arch/arm/mach-shmobile/rcar-gen2.h @@ -2,8 +2,6 @@ #define __ASM_RCAR_GEN2_H__ void rcar_gen2_timer_init(void); -#define MD(nr) BIT(nr) -u32 rcar_gen2_read_mode_pins(void); void rcar_gen2_reserve(void); void rcar_gen2_pm_init(void); diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index ac63fa407b64..52d466b75973 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -29,24 +29,6 @@ #include "common.h" #include "rcar-gen2.h" -#define MODEMR 0xe6160060 - -u32 rcar_gen2_read_mode_pins(void) -{ - static u32 mode; - static bool mode_valid; - - if (!mode_valid) { - void __iomem *modemr = ioremap_nocache(MODEMR, 4); - BUG_ON(!modemr); - mode = ioread32(modemr); - iounmap(modemr); - mode_valid = true; - } - - return mode; -} - static unsigned int __init get_extal_freq(void) { struct device_node *cpg, *extal; diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c index 2d6417af73b5..2948c22cfc53 100644 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ b/arch/arm/mach-shmobile/smp-r8a7791.c @@ -42,21 +42,9 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus) rcar_gen2_pm_init(); } -static int r8a7791_smp_boot_secondary(unsigned int cpu, - struct task_struct *idle) -{ - /* Error out when hardware debug mode is enabled */ - if (rcar_gen2_read_mode_pins() & BIT(21)) { - pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu); - return -ENOTSUPP; - } - - return shmobile_smp_apmu_boot_secondary(cpu, idle); -} - const struct smp_operations r8a7791_smp_ops __initconst = { .smp_prepare_cpus = r8a7791_smp_prepare_cpus, - .smp_boot_secondary = r8a7791_smp_boot_secondary, + .smp_boot_secondary = shmobile_smp_apmu_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_can_disable = shmobile_smp_cpu_can_disable, .cpu_die = shmobile_smp_apmu_cpu_die, diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c index 46b1da1bf5d2..c0c36b978cba 100644 --- a/arch/arm/mach-ux500/cpu-db8500.c +++ b/arch/arm/mach-ux500/cpu-db8500.c @@ -12,7 +12,6 @@ #include <linux/init.h> #include <linux/device.h> #include <linux/amba/bus.h> -#include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/irqchip.h> diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 8f2f615ff958..e0ee139fdebf 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -31,10 +31,14 @@ #define UX500_CPU1_JUMPADDR_OFFSET 0x1FF4 #define UX500_CPU1_WAKEMAGIC_OFFSET 0x1FF0 -static void wakeup_secondary(void) +static void __iomem *backupram; + +static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) { struct device_node *np; - static void __iomem *backupram; + static void __iomem *scu_base; + unsigned int ncores; + int i; np = of_find_compatible_node(NULL, NULL, "ste,dbx500-backupram"); if (!np) { @@ -48,29 +52,6 @@ static void wakeup_secondary(void) return; } - /* - * write the address of secondary startup into the backup ram register - * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the - * backup ram register at offset 0x1FF0, which is what boot rom code - * is waiting for. This will wake up the secondary core from WFE. - */ - writel(virt_to_phys(secondary_startup), - backupram + UX500_CPU1_JUMPADDR_OFFSET); - writel(0xA1FEED01, - backupram + UX500_CPU1_WAKEMAGIC_OFFSET); - - /* make sure write buffer is drained */ - mb(); - iounmap(backupram); -} - -static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) -{ - struct device_node *np; - static void __iomem *scu_base; - unsigned int ncores; - int i; - np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); if (!np) { pr_err("No SCU base address\n"); @@ -92,7 +73,19 @@ static void __init ux500_smp_prepare_cpus(unsigned int max_cpus) static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle) { - wakeup_secondary(); + /* + * write the address of secondary startup into the backup ram register + * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the + * backup ram register at offset 0x1FF0, which is what boot rom code + * is waiting for. This will wake up the secondary core from WFE. + */ + writel(virt_to_phys(secondary_startup), + backupram + UX500_CPU1_JUMPADDR_OFFSET); + writel(0xA1FEED01, + backupram + UX500_CPU1_WAKEMAGIC_OFFSET); + + /* make sure write buffer is drained */ + mb(); arch_send_wakeup_ipi_mask(cpumask_of(cpu)); return 0; } diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index cf7b95fddbb3..03fac123676d 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c @@ -77,15 +77,6 @@ static struct resource s3c_ac97_resource[] = { [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97), }; -static struct s3c_audio_pdata s3c_ac97_pdata = { -#ifdef CONFIG_S3C24XX_DMAC - .dma_filter = s3c24xx_dma_filter, -#endif - .dma_playback = (void *)DMACH_PCM_OUT, - .dma_capture = (void *)DMACH_PCM_IN, - .dma_capture_mic = (void *)DMACH_MIC_IN, -}; - struct platform_device s3c_device_ac97 = { .name = "samsung-ac97", .id = -1, @@ -94,7 +85,6 @@ struct platform_device s3c_device_ac97 = { .dev = { .dma_mask = &samsung_device_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s3c_ac97_pdata, } }; #endif /* CONFIG_CPU_S3C2440 */ @@ -574,14 +564,6 @@ static struct resource s3c_iis_resource[] = { [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), }; -static struct s3c_audio_pdata s3c_iis_platdata = { -#ifdef CONFIG_S3C24XX_DMAC - .dma_filter = s3c24xx_dma_filter, -#endif - .dma_playback = (void *)DMACH_I2S_OUT, - .dma_capture = (void *)DMACH_I2S_IN, -}; - struct platform_device s3c_device_iis = { .name = "s3c24xx-iis", .id = -1, @@ -590,7 +572,6 @@ struct platform_device s3c_device_iis = { .dev = { .dma_mask = &samsung_device_dma_mask, .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s3c_iis_platdata, } }; #endif /* CONFIG_PLAT_S3C24XX */ diff --git a/arch/arm/plat-samsung/include/plat/wakeup-mask.h b/arch/arm/plat-samsung/include/plat/wakeup-mask.h index 43e4acd2e1c6..bbfa84b0505a 100644 --- a/arch/arm/plat-samsung/include/plat/wakeup-mask.h +++ b/arch/arm/plat-samsung/include/plat/wakeup-mask.h @@ -38,7 +38,7 @@ struct samsung_wakeup_mask { * required to be correct before we enter sleep. */ extern void samsung_sync_wakemask(void __iomem *reg, - struct samsung_wakeup_mask *masks, + const struct samsung_wakeup_mask *masks, int nr_masks); #endif /* __PLAT_WAKEUP_MASK_H */ diff --git a/arch/arm/plat-samsung/wakeup-mask.c b/arch/arm/plat-samsung/wakeup-mask.c index 20c3d9117cc2..b9de6b543330 100644 --- a/arch/arm/plat-samsung/wakeup-mask.c +++ b/arch/arm/plat-samsung/wakeup-mask.c @@ -20,7 +20,7 @@ #include <plat/pm.h> void samsung_sync_wakemask(void __iomem *reg, - struct samsung_wakeup_mask *mask, int nr_mask) + const struct samsung_wakeup_mask *mask, int nr_mask) { struct irq_data *data; u32 val; |