diff options
| -rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 13 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 19 |
2 files changed, 18 insertions, 14 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 3eb4c42ce7b9..17bc4b359912 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -43,7 +43,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/memreserve/ 0x80000000 0x00000008; /* cpu-release-addr */ +/memreserve/ 0x80000000 0x00080000; / { compatible = "socionext,uniphier-ld11"; @@ -70,19 +70,22 @@ device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x000>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x80000000>; + enable-method = "psci"; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x001>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x80000000>; + enable-method = "psci"; }; }; + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + clocks { refclk: ref { compatible = "fixed-clock"; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index 56a1b2e92cf3..c8ebe7e52809 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -43,7 +43,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/memreserve/ 0x80000000 0x00000008; /* cpu-release-addr */ +/memreserve/ 0x80000000 0x00080000; / { compatible = "socionext,uniphier-ld20"; @@ -79,35 +79,36 @@ device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0 0x000>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x80000000>; + enable-method = "psci"; }; cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0 0x001>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x80000000>; + enable-method = "psci"; }; cpu2: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x80000000>; + enable-method = "psci"; }; cpu3: cpu@101 { device_type = "cpu"; compatible = "arm,cortex-a53", "arm,armv8"; reg = <0 0x101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x80000000>; + enable-method = "psci"; }; }; + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + clocks { refclk: ref { compatible = "fixed-clock"; |