diff options
| -rw-r--r-- | drivers/iio/frequency/ad9523.c | 16 | ||||
| -rw-r--r-- | include/linux/iio/frequency/ad9523.h | 8 |
2 files changed, 12 insertions, 12 deletions
diff --git a/drivers/iio/frequency/ad9523.c b/drivers/iio/frequency/ad9523.c index 3f9be69499ec..9b9eee27176c 100644 --- a/drivers/iio/frequency/ad9523.c +++ b/drivers/iio/frequency/ad9523.c @@ -872,22 +872,22 @@ static int ad9523_setup(struct iio_dev *indio_dev) return ret; ret = ad9523_write(indio_dev, AD9523_PLL2_VCO_DIVIDER, - AD9523_PLL2_VCO_DIV_M1(pdata->pll2_vco_diff_m1) | - AD9523_PLL2_VCO_DIV_M2(pdata->pll2_vco_diff_m2) | - AD_IFE(pll2_vco_diff_m1, 0, + AD9523_PLL2_VCO_DIV_M1(pdata->pll2_vco_div_m1) | + AD9523_PLL2_VCO_DIV_M2(pdata->pll2_vco_div_m2) | + AD_IFE(pll2_vco_div_m1, 0, AD9523_PLL2_VCO_DIV_M1_PWR_DOWN_EN) | - AD_IFE(pll2_vco_diff_m2, 0, + AD_IFE(pll2_vco_div_m2, 0, AD9523_PLL2_VCO_DIV_M2_PWR_DOWN_EN)); if (ret < 0) return ret; - if (pdata->pll2_vco_diff_m1) + if (pdata->pll2_vco_div_m1) st->vco_out_freq[AD9523_VCO1] = - st->vco_freq / pdata->pll2_vco_diff_m1; + st->vco_freq / pdata->pll2_vco_div_m1; - if (pdata->pll2_vco_diff_m2) + if (pdata->pll2_vco_div_m2) st->vco_out_freq[AD9523_VCO2] = - st->vco_freq / pdata->pll2_vco_diff_m2; + st->vco_freq / pdata->pll2_vco_div_m2; st->vco_out_freq[AD9523_VCXO] = pdata->vcxo_freq; diff --git a/include/linux/iio/frequency/ad9523.h b/include/linux/iio/frequency/ad9523.h index 12ce3ee427fd..621b93c0bcf9 100644 --- a/include/linux/iio/frequency/ad9523.h +++ b/include/linux/iio/frequency/ad9523.h @@ -129,8 +129,8 @@ enum cpole1_capacitor { * @pll2_ndiv_b_cnt: PLL2 Feedback N-divider, B Counter, range 0..63. * @pll2_freq_doubler_en: PLL2 frequency doubler enable. * @pll2_r2_div: PLL2 R2 divider, range 0..31. - * @pll2_vco_diff_m1: VCO1 divider, range 3..5. - * @pll2_vco_diff_m2: VCO2 divider, range 3..5. + * @pll2_vco_div_m1: VCO1 divider, range 3..5. + * @pll2_vco_div_m2: VCO2 divider, range 3..5. * @rpole2: PLL2 loop filter Rpole resistor value. * @rzero: PLL2 loop filter Rzero resistor value. * @cpole1: PLL2 loop filter Cpole capacitor value. @@ -176,8 +176,8 @@ struct ad9523_platform_data { unsigned char pll2_ndiv_b_cnt; bool pll2_freq_doubler_en; unsigned char pll2_r2_div; - unsigned char pll2_vco_diff_m1; /* 3..5 */ - unsigned char pll2_vco_diff_m2; /* 3..5 */ + unsigned char pll2_vco_div_m1; /* 3..5 */ + unsigned char pll2_vco_div_m2; /* 3..5 */ /* Loop Filter PLL2 */ enum rpole2_resistor rpole2; |