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-rw-r--r--arch/arm/boot/dts/aspeed-g4.dtsi10
-rw-r--r--arch/arm/boot/dts/aspeed-g5.dtsi10
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index 48c28a71ae7e..36ae23aa3b48 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -162,6 +162,7 @@
reg-shift = <2>;
interrupts = <9>;
clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
+ resets = <&lpc_reset 4>;
no-loopback-test;
status = "disabled";
};
@@ -249,6 +250,12 @@
reg = <0x20 0x24 0x48 0x8>;
};
+ lpc_reset: reset-controller@18 {
+ compatible = "aspeed,ast2400-lpc-reset";
+ reg = <0x18 0x4>;
+ #reset-cells = <1>;
+ };
+
ibt: ibt@c0 {
compatible = "aspeed,ast2400-ibt-bmc";
reg = <0xc0 0x18>;
@@ -264,6 +271,7 @@
reg-shift = <2>;
interrupts = <32>;
clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
+ resets = <&lpc_reset 5>;
no-loopback-test;
status = "disabled";
};
@@ -274,6 +282,7 @@
reg-shift = <2>;
interrupts = <33>;
clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
+ resets = <&lpc_reset 6>;
no-loopback-test;
status = "disabled";
};
@@ -284,6 +293,7 @@
reg-shift = <2>;
interrupts = <34>;
clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
+ resets = <&lpc_reset 7>;
no-loopback-test;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 8eac57c33880..17ee0fa33a14 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -205,6 +205,7 @@
reg-shift = <2>;
interrupts = <9>;
clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
+ resets = <&lpc_reset 4>;
no-loopback-test;
status = "disabled";
};
@@ -299,6 +300,12 @@
reg = <0x20 0x24 0x48 0x8>;
};
+ lpc_reset: reset-controller@18 {
+ compatible = "aspeed,ast2500-lpc-reset";
+ reg = <0x18 0x4>;
+ #reset-cells = <1>;
+ };
+
ibt: ibt@c0 {
compatible = "aspeed,ast2500-ibt-bmc";
reg = <0xc0 0x18>;
@@ -314,6 +321,7 @@
reg-shift = <2>;
interrupts = <32>;
clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
+ resets = <&lpc_reset 5>;
no-loopback-test;
status = "disabled";
};
@@ -324,6 +332,7 @@
reg-shift = <2>;
interrupts = <33>;
clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
+ resets = <&lpc_reset 6>;
no-loopback-test;
status = "disabled";
};
@@ -334,6 +343,7 @@
reg-shift = <2>;
interrupts = <34>;
clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
+ resets = <&lpc_reset 7>;
no-loopback-test;
status = "disabled";
};