diff options
| -rw-r--r-- | arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 20 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos3250.dtsi | 97 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos4.dtsi | 95 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 20 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos4210.dtsi | 36 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos4x12-pinctrl.dtsi | 20 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos4x12.dtsi | 48 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos5.dtsi | 64 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos5250.dtsi | 80 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos5260.dtsi | 43 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos5410.dtsi | 26 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos5420.dtsi | 78 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos5440.dtsi | 70 | ||||
| -rw-r--r-- | arch/arm/boot/dts/exynos54xx.dtsi | 34 |
14 files changed, 437 insertions, 294 deletions
diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi index ec331169c3d9..a149f148e659 100644 --- a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi @@ -362,8 +362,14 @@ interrupt-controller; interrupt-parent = <&gic>; - interrupts = <0 32 0>, <0 33 0>, <0 34 0>, <0 35 0>, - <0 36 0>, <0 37 0>, <0 38 0>, <0 39 0>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; @@ -373,8 +379,14 @@ interrupt-controller; interrupt-parent = <&gic>; - interrupts = <0 40 0>, <0 41 0>, <0 42 0>, <0 43 0>, - <0 44 0>, <0 45 0>, <0 46 0>, <0 47 0>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index e9d2556c0dfd..ba17ee1eb749 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -20,6 +20,8 @@ #include "exynos4-cpu-thermal.dtsi" #include "exynos-syscon-restart.dtsi" #include <dt-bindings/clock/exynos3250.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> / { compatible = "samsung,exynos3250"; @@ -211,7 +213,8 @@ rtc: rtc@10070000 { compatible = "samsung,s3c6410-rtc"; reg = <0x10070000 0x100>; - interrupts = <0 73 0>, <0 74 0>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&pmu_system_controller>; status = "disabled"; }; @@ -219,7 +222,7 @@ tmu: tmu@100C0000 { compatible = "samsung,exynos3250-tmu"; reg = <0x100C0000 0x100>; - interrupts = <0 216 0>; + interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_TMU_APBIF>; clock-names = "tmu_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -234,14 +237,21 @@ <0x10482000 0x1000>, <0x10484000 0x2000>, <0x10486000 0x2000>; - interrupts = <1 9 0xf04>; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; mct@10050000 { compatible = "samsung,exynos4210-mct"; reg = <0x10050000 0x800>; - interrupts = <0 218 0>, <0 219 0>, <0 220 0>, <0 221 0>, - <0 223 0>, <0 226 0>, <0 227 0>, <0 228 0>; + interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>; clock-names = "fin_pll", "mct"; }; @@ -249,24 +259,24 @@ pinctrl_1: pinctrl@11000000 { compatible = "samsung,exynos3250-pinctrl"; reg = <0x11000000 0x1000>; - interrupts = <0 225 0>; + interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; - interrupts = <0 48 0>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; }; }; pinctrl_0: pinctrl@11400000 { compatible = "samsung,exynos3250-pinctrl"; reg = <0x11400000 0x1000>; - interrupts = <0 240 0>; + interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; }; jpeg: codec@11830000 { compatible = "samsung,exynos3250-jpeg"; reg = <0x11830000 0x1000>; - interrupts = <0 171 0>; + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>; clock-names = "jpeg", "sclk"; power-domains = <&pd_cam>; @@ -280,7 +290,8 @@ sysmmu_jpeg: sysmmu@11A60000 { compatible = "samsung,exynos-sysmmu"; reg = <0x11a60000 0x1000>; - interrupts = <0 156 0>, <0 161 0>; + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clock-names = "sysmmu", "master"; clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>; power-domains = <&pd_cam>; @@ -291,7 +302,9 @@ compatible = "samsung,exynos3250-fimd"; reg = <0x11c00000 0x30000>; interrupt-names = "fifo", "vsync", "lcd_sys"; - interrupts = <0 84 0>, <0 85 0>, <0 86 0>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>; clock-names = "sclk_fimd", "fimd"; power-domains = <&pd_lcd0>; @@ -303,7 +316,7 @@ dsi_0: dsi@11C80000 { compatible = "samsung,exynos3250-mipi-dsi"; reg = <0x11C80000 0x10000>; - interrupts = <0 83 0>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; samsung,phy-type = <0>; power-domains = <&pd_lcd0>; phys = <&mipi_phy 1>; @@ -318,7 +331,8 @@ sysmmu_fimd0: sysmmu@11E20000 { compatible = "samsung,exynos-sysmmu"; reg = <0x11e20000 0x1000>; - interrupts = <0 80 0>, <0 81 0>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; clock-names = "sysmmu", "master"; clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>; power-domains = <&pd_lcd0>; @@ -328,7 +342,7 @@ hsotg: hsotg@12480000 { compatible = "snps,dwc2"; reg = <0x12480000 0x20000>; - interrupts = <0 141 0>; + interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_USBOTG>; clock-names = "otg"; phys = <&exynos_usbphy 0>; @@ -339,7 +353,7 @@ mshc_0: mshc@12510000 { compatible = "samsung,exynos5420-dw-mshc"; reg = <0x12510000 0x1000>; - interrupts = <0 142 0>; + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>; clock-names = "biu", "ciu"; fifo-depth = <0x80>; @@ -351,7 +365,7 @@ mshc_1: mshc@12520000 { compatible = "samsung,exynos5420-dw-mshc"; reg = <0x12520000 0x1000>; - interrupts = <0 143 0>; + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>; clock-names = "biu", "ciu"; fifo-depth = <0x80>; @@ -363,7 +377,7 @@ mshc_2: mshc@12530000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12530000 0x1000>; - interrupts = <0 144 0>; + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>; clock-names = "biu", "ciu"; fifo-depth = <0x80>; @@ -391,7 +405,7 @@ pdma0: pdma@12680000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12680000 0x1000>; - interrupts = <0 138 0>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_PDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -402,7 +416,7 @@ pdma1: pdma@12690000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12690000 0x1000>; - interrupts = <0 139 0>; + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_PDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -415,7 +429,7 @@ compatible = "samsung,exynos3250-adc", "samsung,exynos-adc-v2"; reg = <0x126C0000 0x100>; - interrupts = <0 137 0>; + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; clock-names = "adc", "sclk"; clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>; #io-channel-cells = <1>; @@ -427,7 +441,7 @@ mfc: codec@13400000 { compatible = "samsung,mfc-v7"; reg = <0x13400000 0x10000>; - interrupts = <0 102 0>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; clock-names = "mfc", "sclk_mfc"; clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>; power-domains = <&pd_mfc>; @@ -437,7 +451,8 @@ sysmmu_mfc: sysmmu@13620000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13620000 0x1000>; - interrupts = <0 96 0>, <0 98 0>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; clock-names = "sysmmu", "master"; clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>; power-domains = <&pd_mfc>; @@ -447,7 +462,7 @@ serial_0: serial@13800000 { compatible = "samsung,exynos4210-uart"; reg = <0x13800000 0x100>; - interrupts = <0 109 0>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; pinctrl-names = "default"; @@ -458,7 +473,7 @@ serial_1: serial@13810000 { compatible = "samsung,exynos4210-uart"; reg = <0x13810000 0x100>; - interrupts = <0 110 0>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; pinctrl-names = "default"; @@ -469,7 +484,7 @@ serial_2: serial@13820000 { compatible = "samsung,exynos4210-uart"; reg = <0x13820000 0x100>; - interrupts = <0 111 0>; + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; pinctrl-names = "default"; @@ -482,7 +497,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x13860000 0x100>; - interrupts = <0 113 0>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_I2C0>; clock-names = "i2c"; pinctrl-names = "default"; @@ -495,7 +510,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x13870000 0x100>; - interrupts = <0 114 0>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_I2C1>; clock-names = "i2c"; pinctrl-names = "default"; @@ -508,7 +523,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x13880000 0x100>; - interrupts = <0 115 0>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_I2C2>; clock-names = "i2c"; pinctrl-names = "default"; @@ -521,7 +536,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x13890000 0x100>; - interrupts = <0 116 0>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_I2C3>; clock-names = "i2c"; pinctrl-names = "default"; @@ -534,7 +549,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x138A0000 0x100>; - interrupts = <0 117 0>; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_I2C4>; clock-names = "i2c"; pinctrl-names = "default"; @@ -547,7 +562,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x138B0000 0x100>; - interrupts = <0 118 0>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_I2C5>; clock-names = "i2c"; pinctrl-names = "default"; @@ -560,7 +575,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x138C0000 0x100>; - interrupts = <0 119 0>; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_I2C6>; clock-names = "i2c"; pinctrl-names = "default"; @@ -573,7 +588,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x138D0000 0x100>; - interrupts = <0 120 0>; + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_I2C7>; clock-names = "i2c"; pinctrl-names = "default"; @@ -584,7 +599,7 @@ spi_0: spi@13920000 { compatible = "samsung,exynos4210-spi"; reg = <0x13920000 0x100>; - interrupts = <0 121 0>; + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma0 7>, <&pdma0 6>; dma-names = "tx", "rx"; #address-cells = <1>; @@ -600,7 +615,7 @@ spi_1: spi@13930000 { compatible = "samsung,exynos4210-spi"; reg = <0x13930000 0x100>; - interrupts = <0 122 0>; + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma1 7>, <&pdma1 6>; dma-names = "tx", "rx"; #address-cells = <1>; @@ -616,7 +631,7 @@ i2s2: i2s@13970000 { compatible = "samsung,s3c6410-i2s"; reg = <0x13970000 0x100>; - interrupts = <0 126 0>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu CLK_I2S>, <&cmu CLK_SCLK_I2S>; clock-names = "iis", "i2s_opclk0"; dmas = <&pdma0 14>, <&pdma0 13>; @@ -629,15 +644,19 @@ pwm: pwm@139D0000 { compatible = "samsung,exynos4210-pwm"; reg = <0x139D0000 0x1000>; - interrupts = <0 104 0>, <0 105 0>, <0 106 0>, - <0 107 0>, <0 108 0>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; #pwm-cells = <3>; status = "disabled"; }; pmu { compatible = "arm,cortex-a7-pmu"; - interrupts = <0 18 0>, <0 19 0>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; }; ppmu_dmc0: ppmu_dmc0@106a0000 { diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 6865ca99932e..c64737baa45e 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -21,6 +21,8 @@ #include <dt-bindings/clock/exynos4.h> #include <dt-bindings/clock/exynos-audss-clk.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> #include "exynos-syscon-restart.dtsi" / { @@ -173,7 +175,7 @@ dsi_0: dsi@11C80000 { compatible = "samsung,exynos4210-mipi-dsi"; reg = <0x11C80000 0x10000>; - interrupts = <0 79 0>; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_lcd0>; phys = <&mipi_phy 1>; phy-names = "dsim"; @@ -196,7 +198,7 @@ fimc_0: fimc@11800000 { compatible = "samsung,exynos4210-fimc"; reg = <0x11800000 0x1000>; - interrupts = <0 84 0>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>; clock-names = "fimc", "sclk_fimc"; power-domains = <&pd_cam>; @@ -208,7 +210,7 @@ fimc_1: fimc@11810000 { compatible = "samsung,exynos4210-fimc"; reg = <0x11810000 0x1000>; - interrupts = <0 85 0>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>; clock-names = "fimc", "sclk_fimc"; power-domains = <&pd_cam>; @@ -220,7 +222,7 @@ fimc_2: fimc@11820000 { compatible = "samsung,exynos4210-fimc"; reg = <0x11820000 0x1000>; - interrupts = <0 86 0>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>; clock-names = "fimc", "sclk_fimc"; power-domains = <&pd_cam>; @@ -232,7 +234,7 @@ fimc_3: fimc@11830000 { compatible = "samsung,exynos4210-fimc"; reg = <0x11830000 0x1000>; - interrupts = <0 87 0>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>; clock-names = "fimc", "sclk_fimc"; power-domains = <&pd_cam>; @@ -244,7 +246,7 @@ csis_0: csis@11880000 { compatible = "samsung,exynos4210-csis"; reg = <0x11880000 0x4000>; - interrupts = <0 78 0>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>; clock-names = "csis", "sclk_csis"; bus-width = <4>; @@ -259,7 +261,7 @@ csis_1: csis@11890000 { compatible = "samsung,exynos4210-csis"; reg = <0x11890000 0x4000>; - interrupts = <0 80 0>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>; clock-names = "csis", "sclk_csis"; bus-width = <2>; @@ -275,7 +277,7 @@ watchdog: watchdog@10060000 { compatible = "samsung,s3c2410-wdt"; reg = <0x10060000 0x100>; - interrupts = <0 43 0>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_WDT>; clock-names = "watchdog"; status = "disabled"; @@ -285,7 +287,8 @@ compatible = "samsung,s3c6410-rtc"; reg = <0x10070000 0x100>; interrupt-parent = <&pmu_system_controller>; - interrupts = <0 44 0>, <0 45 0>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_RTC>; clock-names = "rtc"; status = "disabled"; @@ -294,7 +297,7 @@ keypad: keypad@100A0000 { compatible = "samsung,s5pv210-keypad"; reg = <0x100A0000 0x100>; - interrupts = <0 109 0>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_KEYIF>; clock-names = "keypad"; status = "disabled"; @@ -303,7 +306,7 @@ sdhci_0: sdhci@12510000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12510000 0x100>; - interrupts = <0 73 0>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>; clock-names = "hsmmc", "mmc_busclk.2"; status = "disabled"; @@ -312,7 +315,7 @@ sdhci_1: sdhci@12520000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12520000 0x100>; - interrupts = <0 74 0>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>; clock-names = "hsmmc", "mmc_busclk.2"; status = "disabled"; @@ -321,7 +324,7 @@ sdhci_2: sdhci@12530000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12530000 0x100>; - interrupts = <0 75 0>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>; clock-names = "hsmmc", "mmc_busclk.2"; status = "disabled"; @@ -330,7 +333,7 @@ sdhci_3: sdhci@12540000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12540000 0x100>; - interrupts = <0 76 0>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>; clock-names = "hsmmc", "mmc_busclk.2"; status = "disabled"; @@ -349,7 +352,7 @@ hsotg: hsotg@12480000 { compatible = "samsung,s3c6400-hsotg"; reg = <0x12480000 0x20000>; - interrupts = <0 71 0>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_USB_DEVICE>; clock-names = "otg"; phys = <&exynos_usbphy 0>; @@ -360,7 +363,7 @@ ehci: ehci@12580000 { compatible = "samsung,exynos4210-ehci"; reg = <0x12580000 0x100>; - interrupts = <0 70 0>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_USB_HOST>; clock-names = "usbhost"; status = "disabled"; @@ -386,7 +389,7 @@ ohci: ohci@12590000 { compatible = "samsung,exynos4210-ohci"; reg = <0x12590000 0x100>; - interrupts = <0 70 0>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_USB_HOST>; clock-names = "usbhost"; status = "disabled"; @@ -428,7 +431,7 @@ mfc: codec@13400000 { compatible = "samsung,mfc-v5"; reg = <0x13400000 0x10000>; - interrupts = <0 94 0>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_mfc>; clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>; clock-names = "mfc", "sclk_mfc"; @@ -439,7 +442,7 @@ serial_0: serial@13800000 { compatible = "samsung,exynos4210-uart"; reg = <0x13800000 0x100>; - interrupts = <0 52 0>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; dmas = <&pdma0 15>, <&pdma0 16>; @@ -450,7 +453,7 @@ serial_1: serial@13810000 { compatible = "samsung,exynos4210-uart"; reg = <0x13810000 0x100>; - interrupts = <0 53 0>; + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; dmas = <&pdma1 15>, <&pdma1 16>; @@ -461,7 +464,7 @@ serial_2: serial@13820000 { compatible = "samsung,exynos4210-uart"; reg = <0x13820000 0x100>; - interrupts = <0 54 0>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; dmas = <&pdma0 17>, <&pdma0 18>; @@ -472,7 +475,7 @@ serial_3: serial@13830000 { compatible = "samsung,exynos4210-uart"; reg = <0x13830000 0x100>; - interrupts = <0 55 0>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; clock-names = "uart", "clk_uart_baud0"; dmas = <&pdma1 17>, <&pdma1 18>; @@ -485,7 +488,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x13860000 0x100>; - interrupts = <0 58 0>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_I2C0>; clock-names = "i2c"; pinctrl-names = "default"; @@ -498,7 +501,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x13870000 0x100>; - interrupts = <0 59 0>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_I2C1>; clock-names = "i2c"; pinctrl-names = "default"; @@ -511,7 +514,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x13880000 0x100>; - interrupts = <0 60 0>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_I2C2>; clock-names = "i2c"; pinctrl-names = "default"; @@ -524,7 +527,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x13890000 0x100>; - interrupts = <0 61 0>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_I2C3>; clock-names = "i2c"; pinctrl-names = "default"; @@ -537,7 +540,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x138A0000 0x100>; - interrupts = <0 62 0>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_I2C4>; clock-names = "i2c"; pinctrl-names = "default"; @@ -550,7 +553,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x138B0000 0x100>; - interrupts = <0 63 0>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_I2C5>; clock-names = "i2c"; pinctrl-names = "default"; @@ -563,7 +566,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x138C0000 0x100>; - interrupts = <0 64 0>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_I2C6>; clock-names = "i2c"; pinctrl-names = "default"; @@ -576,7 +579,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-i2c"; reg = <0x138D0000 0x100>; - interrupts = <0 65 0>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_I2C7>; clock-names = "i2c"; pinctrl-names = "default"; @@ -589,7 +592,7 @@ #size-cells = <0>; compatible = "samsung,s3c2440-hdmiphy-i2c"; reg = <0x138E0000 0x100>; - interrupts = <0 93 0>; + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_I2C_HDMI>; clock-names = "i2c"; status = "disabled"; @@ -603,7 +606,7 @@ spi_0: spi@13920000 { compatible = "samsung,exynos4210-spi"; reg = <0x13920000 0x100>; - interrupts = <0 66 0>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma0 7>, <&pdma0 6>; dma-names = "tx", "rx"; #address-cells = <1>; @@ -618,7 +621,7 @@ spi_1: spi@13930000 { compatible = "samsung,exynos4210-spi"; reg = <0x13930000 0x100>; - interrupts = <0 67 0>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma1 7>, <&pdma1 6>; dma-names = "tx", "rx"; #address-cells = <1>; @@ -633,7 +636,7 @@ spi_2: spi@13940000 { compatible = "samsung,exynos4210-spi"; reg = <0x13940000 0x100>; - interrupts = <0 68 0>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma0 9>, <&pdma0 8>; dma-names = "tx", "rx"; #address-cells = <1>; @@ -648,7 +651,11 @@ pwm: pwm@139D0000 { compatible = "samsung,exynos4210-pwm"; reg = <0x139D0000 0x1000>; - interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PWM>; clock-names = "timers"; #pwm-cells = <3>; @@ -665,7 +672,7 @@ pdma0: pdma@12680000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12680000 0x1000>; - interrupts = <0 35 0>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -676,7 +683,7 @@ pdma1: pdma@12690000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12690000 0x1000>; - interrupts = <0 36 0>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -687,7 +694,7 @@ mdma1: mdma@12850000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12850000 0x1000>; - interrupts = <0 34 0>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_MDMA>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -717,7 +724,7 @@ jpeg_codec: jpeg-codec@11840000 { compatible = "samsung,exynos4210-jpeg"; reg = <0x11840000 0x1000>; - interrupts = <0 88 0>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_JPEG>; clock-names = "jpeg"; power-domains = <&pd_cam>; @@ -727,7 +734,7 @@ rotator: rotator@12810000 { compatible = "samsung,exynos4210-rotator"; reg = <0x12810000 0x64>; - interrupts = <0 83 0>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_ROTATOR>; clock-names = "rotator"; iommus = <&sysmmu_rotator>; @@ -736,7 +743,7 @@ hdmi: hdmi@12D00000 { compatible = "samsung,exynos4210-hdmi"; reg = <0x12D00000 0x70000>; - interrupts = <0 92 0>; + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy", "mout_hdmi"; clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, @@ -751,7 +758,7 @@ hdmicec: cec@100B0000 { compatible = "samsung,s5p-cec"; reg = <0x100B0000 0x200>; - interrupts = <0 114 0>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_HDMI_CEC>; clock-names = "hdmicec"; samsung,syscon-phandle = <&pmu_system_controller>; @@ -762,7 +769,7 @@ mixer: mixer@12C10000 { compatible = "samsung,exynos4210-mixer"; - interrupts = <0 91 0>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; reg = <0x12C10000 0x2100>, <0x12c00000 0x300>; power-domains = <&pd_tv>; iommus = <&sysmmu_tv>; @@ -989,7 +996,7 @@ sss: sss@10830000 { compatible = "samsung,exynos4210-secss"; reg = <0x10830000 0x300>; - interrupts = <0 112 0>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_SSS>; clock-names = "secss"; }; diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index d9b6d25e4abe..f280954b260a 100644 --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi @@ -537,8 +537,14 @@ interrupt-controller; interrupt-parent = <&gic>; - interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; @@ -548,8 +554,14 @@ interrupt-controller; interrupt-parent = <&gic>; - interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 2d9b02967105..7f3a18c8f60f 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -109,12 +109,12 @@ #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = <0 &gic 0 57 0>, - <1 &gic 0 69 0>, + interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, + <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>, <2 &combiner 12 6>, <3 &combiner 12 7>, - <4 &gic 0 42 0>, - <5 &gic 0 48 0>; + <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>, + <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -127,18 +127,18 @@ pinctrl_0: pinctrl@11400000 { compatible = "samsung,exynos4210-pinctrl"; reg = <0x11400000 0x1000>; - interrupts = <0 47 0>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_1: pinctrl@11000000 { compatible = "samsung,exynos4210-pinctrl"; reg = <0x11000000 0x1000>; - interrupts = <0 46 0>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; wakup_eint: wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = <0 32 0>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -182,7 +182,7 @@ g2d: g2d@12800000 { compatible = "samsung,s5pv210-g2d"; reg = <0x12800000 0x1000>; - interrupts = <0 89 0>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>; clock-names = "sclk_fimg2d", "fimg2d"; power-domains = <&pd_lcd0>; @@ -424,10 +424,22 @@ &combiner { samsung,combiner-nr = <16>; - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; }; &mdma1 { diff --git a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi index a56bf9b1a412..2f866f6e5838 100644 --- a/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos4x12-pinctrl.dtsi @@ -572,8 +572,14 @@ interrupt-controller; interrupt-parent = <&gic>; - interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; @@ -583,8 +589,14 @@ interrupt-controller; interrupt-parent = <&gic>; - interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 0074f566cd3b..85a7122658f1 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -88,11 +88,11 @@ #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = <0 &gic 0 57 0>, + interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>, <1 &combiner 12 5>, <2 &combiner 12 6>, <3 &combiner 12 7>, - <4 &gic 1 12 0>; + <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -112,7 +112,7 @@ g2d: g2d@10800000 { compatible = "samsung,exynos4212-g2d"; reg = <0x10800000 0x1000>; - interrupts = <0 89 0>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>; clock-names = "sclk_fimg2d", "fimg2d"; iommus = <&sysmmu_g2d>; @@ -127,7 +127,7 @@ fimc_lite_0: fimc-lite@12390000 { compatible = "samsung,exynos4212-fimc-lite"; reg = <0x12390000 0x1000>; - interrupts = <0 105 0>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_isp>; clocks = <&clock CLK_FIMC_LITE0>; clock-names = "flite"; @@ -138,7 +138,7 @@ fimc_lite_1: fimc-lite@123A0000 { compatible = "samsung,exynos4212-fimc-lite"; reg = <0x123A0000 0x1000>; - interrupts = <0 106 0>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_isp>; clocks = <&clock CLK_FIMC_LITE1>; clock-names = "flite"; @@ -149,7 +149,8 @@ fimc_is: fimc-is@12000000 { compatible = "samsung,exynos4212-fimc-is"; reg = <0x12000000 0x260000>; - interrupts = <0 90 0>, <0 95 0>; + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_isp>; clocks = <&clock CLK_FIMC_LITE0>, <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>, @@ -200,7 +201,7 @@ mshc_0: mmc@12550000 { compatible = "samsung,exynos4412-dw-mshc"; reg = <0x12550000 0x1000>; - interrupts = <0 77 0>; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; fifo-depth = <0x80>; @@ -461,11 +462,26 @@ }; &combiner { - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; }; &exynos_usbphy { @@ -529,18 +545,18 @@ &pinctrl_0 { compatible = "samsung,exynos4x12-pinctrl"; reg = <0x11400000 0x1000>; - interrupts = <0 47 0>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; }; &pinctrl_1 { compatible = "samsung,exynos4x12-pinctrl"; reg = <0x11000000 0x1000>; - interrupts = <0 46 0>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; wakup_eint: wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = <0 32 0>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -554,7 +570,7 @@ &pinctrl_3 { compatible = "samsung,exynos4x12-pinctrl"; reg = <0x106E0000 0x1000>; - interrupts = <0 72 0>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; }; &pmu_system_controller { diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi index 8f06609879f5..7fd870ee5093 100644 --- a/arch/arm/boot/dts/exynos5.dtsi +++ b/arch/arm/boot/dts/exynos5.dtsi @@ -13,6 +13,8 @@ * published by the Free Software Foundation. */ +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> #include "exynos-syscon-restart.dtsi" / { @@ -53,14 +55,38 @@ interrupt-controller; samsung,combiner-nr = <32>; reg = <0x10440000 0x1000>; - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, - <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, - <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, - <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; + interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, + <0 1 IRQ_TYPE_LEVEL_HIGH>, + <0 2 IRQ_TYPE_LEVEL_HIGH>, + <0 3 IRQ_TYPE_LEVEL_HIGH>, + <0 4 IRQ_TYPE_LEVEL_HIGH>, + <0 5 IRQ_TYPE_LEVEL_HIGH>, + <0 6 IRQ_TYPE_LEVEL_HIGH>, + <0 7 IRQ_TYPE_LEVEL_HIGH>, + <0 8 IRQ_TYPE_LEVEL_HIGH>, + <0 9 IRQ_TYPE_LEVEL_HIGH>, + <0 10 IRQ_TYPE_LEVEL_HIGH>, + <0 11 IRQ_TYPE_LEVEL_HIGH>, + <0 12 IRQ_TYPE_LEVEL_HIGH>, + <0 13 IRQ_TYPE_LEVEL_HIGH>, + <0 14 IRQ_TYPE_LEVEL_HIGH>, + <0 15 IRQ_TYPE_LEVEL_HIGH>, + <0 16 IRQ_TYPE_LEVEL_HIGH>, + <0 17 IRQ_TYPE_LEVEL_HIGH>, + <0 18 IRQ_TYPE_LEVEL_HIGH>, + <0 19 IRQ_TYPE_LEVEL_HIGH>, + <0 20 IRQ_TYPE_LEVEL_HIGH>, + <0 21 IRQ_TYPE_LEVEL_HIGH>, + <0 22 IRQ_TYPE_LEVEL_HIGH>, + <0 23 IRQ_TYPE_LEVEL_HIGH>, + <0 24 IRQ_TYPE_LEVEL_HIGH>, + <0 25 IRQ_TYPE_LEVEL_HIGH>, + <0 26 IRQ_TYPE_LEVEL_HIGH>, + <0 27 IRQ_TYPE_LEVEL_HIGH>, + <0 28 IRQ_TYPE_LEVEL_HIGH>, + <0 29 IRQ_TYPE_LEVEL_HIGH>, + <0 30 IRQ_TYPE_LEVEL_HIGH>, + <0 31 IRQ_TYPE_LEVEL_HIGH>; }; gic: interrupt-controller@10481000 { @@ -71,7 +97,8 @@ <0x10482000 0x1000>, <0x10484000 0x2000>, <0x10486000 0x2000>; - interrupts = <1 9 0xf04>; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; sysreg_system_controller: syscon@10050000 { @@ -82,31 +109,31 @@ serial_0: serial@12C00000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C00000 0x100>; - interrupts = <0 51 0>; + interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; }; serial_1: serial@12C10000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C10000 0x100>; - interrupts = <0 52 0>; + interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; }; serial_2: serial@12C20000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C20000 0x100>; - interrupts = <0 53 0>; + interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>; }; serial_3: serial@12C30000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C30000 0x100>; - interrupts = <0 54 0>; + interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>; }; i2c_0: i2c@12C60000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C60000 0x100>; - interrupts = <0 56 0>; + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; samsung,sysreg-phandle = <&sysreg_system_controller>; @@ -116,7 +143,7 @@ i2c_1: i2c@12C70000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C70000 0x100>; - interrupts = <0 57 0>; + interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; samsung,sysreg-phandle = <&sysreg_system_controller>; @@ -126,7 +153,7 @@ i2c_2: i2c@12C80000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C80000 0x100>; - interrupts = <0 58 0>; + interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; samsung,sysreg-phandle = <&sysreg_system_controller>; @@ -136,7 +163,7 @@ i2c_3: i2c@12C90000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C90000 0x100>; - interrupts = <0 59 0>; + interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; samsung,sysreg-phandle = <&sysreg_system_controller>; @@ -153,7 +180,8 @@ rtc: rtc@101E0000 { compatible = "samsung,s3c6410-rtc"; reg = <0x101E0000 0x100>; - interrupts = <0 43 0>, <0 44 0>; + interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>, + <0 44 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index f7357d99b47c..b6d7444d8585 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -181,8 +181,8 @@ <0x1 0 &combiner 23 4>, <0x2 0 &combiner 25 2>, <0x3 0 &combiner 25 3>, - <0x4 0 &gic 0 120 0>, - <0x5 0 &gic 0 121 0>; + <0x4 0 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, + <0x5 0 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -195,31 +195,31 @@ pinctrl_0: pinctrl@11400000 { compatible = "samsung,exynos5250-pinctrl"; reg = <0x11400000 0x1000>; - interrupts = <0 46 0>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; wakup_eint: wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = <0 32 0>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; }; }; pinctrl_1: pinctrl@13400000 { compatible = "samsung,exynos5250-pinctrl"; reg = <0x13400000 0x1000>; - interrupts = <0 45 0>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_2: pinctrl@10d10000 { compatible = "samsung,exynos5250-pinctrl"; reg = <0x10d10000 0x1000>; - interrupts = <0 50 0>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_3: pinctrl@03860000 { compatible = "samsung,exynos5250-pinctrl"; reg = <0x03860000 0x1000>; - interrupts = <0 47 0>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; }; pmu_system_controller: system-controller@10040000 { @@ -236,7 +236,7 @@ watchdog@101D0000 { compatible = "samsung,exynos5250-wdt"; reg = <0x101D0000 0x100>; - interrupts = <0 42 0>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_WDT>; clock-names = "watchdog"; samsung,syscon-phandle = <&pmu_system_controller>; @@ -245,7 +245,7 @@ g2d@10850000 { compatible = "samsung,exynos5250-g2d"; reg = <0x10850000 0x1000>; - interrupts = <0 91 0>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_G2D>; clock-names = "fimg2d"; iommus = <&sysmmu_g2d>; @@ -254,7 +254,7 @@ mfc: codec@11000000 { compatible = "samsung,mfc-v6"; reg = <0x11000000 0x10000>; - interrupts = <0 96 0>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_mfc>; clocks = <&clock CLK_MFC>; clock-names = "mfc"; @@ -265,7 +265,7 @@ rotator: rotator@11C00000 { compatible = "samsung,exynos5250-rotator"; reg = <0x11C00000 0x64>; - interrupts = <0 84 0>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_ROTATOR>; clock-names = "rotator"; iommus = <&sysmmu_rotator>; @@ -274,7 +274,7 @@ tmu: tmu@10060000 { compatible = "samsung,exynos5250-tmu"; reg = <0x10060000 0x100>; - interrupts = <0 65 0>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -284,7 +284,7 @@ compatible = "snps,dwc-ahci"; samsung,sata-freq = <66>; reg = <0x122F0000 0x1ff>; - interrupts = <0 115 0>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>; clock-names = "sata", "sclk_sata"; phys = <&sata_phy>; @@ -306,7 +306,7 @@ i2c_4: i2c@12CA0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CA0000 0x100>; - interrupts = <0 60 0>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_I2C4>; @@ -319,7 +319,7 @@ i2c_5: i2c@12CB0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CB0000 0x100>; - interrupts = <0 61 0>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_I2C5>; @@ -332,7 +332,7 @@ i2c_6: i2c@12CC0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CC0000 0x100>; - interrupts = <0 62 0>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_I2C6>; @@ -345,7 +345,7 @@ i2c_7: i2c@12CD0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CD0000 0x100>; - interrupts = <0 63 0>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_I2C7>; @@ -358,7 +358,7 @@ i2c_8: i2c@12CE0000 { compatible = "samsung,s3c2440-hdmiphy-i2c"; reg = <0x12CE0000 0x1000>; - interrupts = <0 64 0>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_I2C_HDMI>; @@ -380,7 +380,7 @@ compatible = "samsung,exynos4210-spi"; status = "disabled"; reg = <0x12d20000 0x100>; - interrupts = <0 66 0>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma0 5 &pdma0 4>; dma-names = "tx", "rx"; @@ -396,7 +396,7 @@ compatible = "samsung,exynos4210-spi"; status = "disabled"; reg = <0x12d30000 0x100>; - interrupts = <0 67 0>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma1 5 &pdma1 4>; dma-names = "tx", "rx"; @@ -412,7 +412,7 @@ compatible = "samsung,exynos4210-spi"; status = "disabled"; reg = <0x12d40000 0x100>; - interrupts = <0 68 0>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma0 7 &pdma0 6>; dma-names = "tx", "rx"; @@ -426,7 +426,7 @@ mmc_0: mmc@12200000 { compatible = "samsung,exynos5250-dw-mshc"; - interrupts = <0 75 0>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; reg = <0x12200000 0x1000>; @@ -438,7 +438,7 @@ mmc_1: mmc@12210000 { compatible = "samsung,exynos5250-dw-mshc"; - interrupts = <0 76 0>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; reg = <0x12210000 0x1000>; @@ -450,7 +450,7 @@ mmc_2: mmc@12220000 { compatible = "samsung,exynos5250-dw-mshc"; - interrupts = <0 77 0>; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; reg = <0x12220000 0x1000>; @@ -463,7 +463,7 @@ mmc_3: mmc@12230000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12230000 0x1000>; - interrupts = <0 78 0>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>; @@ -526,7 +526,7 @@ usbdrd_dwc3: dwc3@12000000 { compatible = "synopsys,dwc3"; reg = <0x12000000 0x10000>; - interrupts = <0 72 0>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; phys = <&usbdrd_phy 0>, <&usbdrd_phy 1>; phy-names = "usb2-phy", "usb3-phy"; }; @@ -544,7 +544,7 @@ ehci: usb@12110000 { compatible = "samsung,exynos4210-ehci"; reg = <0x12110000 0x100>; - interrupts = <0 71 0>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_USB2>; clock-names = "usbhost"; @@ -559,7 +559,7 @@ ohci: usb@12120000 { compatible = "samsung,exynos4210-ohci"; reg = <0x12120000 0x100>; - interrupts = <0 71 0>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_USB2>; clock-names = "usbhost"; @@ -591,7 +591,7 @@ pdma0: pdma@121A0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121A0000 0x1000>; - interrupts = <0 34 0>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -602,7 +602,7 @@ pdma1: pdma@121B0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121B0000 0x1000>; - interrupts = <0 35 0>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -613,7 +613,7 @@ mdma0: mdma@10800000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x10800000 0x1000>; - interrupts = <0 33 0>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_MDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -624,7 +624,7 @@ mdma1: mdma@11C10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x11C10000 0x1000>; - interrupts = <0 124 0>; + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_MDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -636,7 +636,7 @@ gsc_0: gsc@13e00000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e00000 0x1000>; - interrupts = <0 85 0>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_gsc>; clocks = <&clock CLK_GSCL0>; clock-names = "gscl"; @@ -646,7 +646,7 @@ gsc_1: gsc@13e10000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e10000 0x1000>; - interrupts = <0 86 0>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_gsc>; clocks = <&clock CLK_GSCL1>; clock-names = "gscl"; @@ -656,7 +656,7 @@ gsc_2: gsc@13e20000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e20000 0x1000>; - interrupts = <0 87 0>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_gsc>; clocks = <&clock CLK_GSCL2>; clock-names = "gscl"; @@ -666,7 +666,7 @@ gsc_3: gsc@13e30000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e30000 0x1000>; - interrupts = <0 88 0>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&pd_gsc>; clocks = <&clock CLK_GSCL3>; clock-names = "gscl"; @@ -677,7 +677,7 @@ compatible = "samsung,exynos4212-hdmi"; reg = <0x14530000 0x70000>; power-domains = <&pd_disp1>; - interrupts = <0 95 0>; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, <&clock CLK_MOUT_HDMI>; @@ -690,7 +690,7 @@ compatible = "samsung,exynos5250-mixer"; reg = <0x14450000 0x10000>; power-domains = <&pd_disp1>; - interrupts = <0 94 0>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>; clock-names = "mixer", "hdmi", "sclk_hdmi"; @@ -706,7 +706,7 @@ adc: adc@12D10000 { compatible = "samsung,exynos-adc-v1"; reg = <0x12D10000 0x100>; - interrupts = <0 106 0>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_ADC>; clock-names = "adc"; #io-channel-cells = <1>; @@ -718,7 +718,7 @@ sss@10830000 { compatible = "samsung,exynos4210-secss"; reg = <0x10830000 0x300>; - interrupts = <0 112 0>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_SSS>; clock-names = "secss"; }; diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi index a86a4898d077..5818718618b1 100644 --- a/arch/arm/boot/dts/exynos5260.dtsi +++ b/arch/arm/boot/dts/exynos5260.dtsi @@ -10,6 +10,8 @@ */ #include <dt-bindings/clock/exynos5260-clk.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> / { compatible = "samsung,exynos5260", "samsung,exynos5"; @@ -168,7 +170,8 @@ <0x10482000 0x1000>, <0x10484000 0x2000>, <0x10486000 0x2000>; - interrupts = <1 9 0xf04>; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; chipid: chipid@10000000 { @@ -181,10 +184,18 @@ reg = <0x100B0000 0x1000>; clocks = <&fin_pll>, <&clock_peri PERI_CLK_MCT>; clock-names = "fin_pll", "mct"; - interrupts = <0 104 0>, <0 105 0>, <0 106 0>, - <0 107 0>, <0 122 0>, <0 123 0>, - <0 124 0>, <0 125 0>, <0 126 0>, - <0 127 0>, <0 128 0>, <0 129 0>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; }; cci: cci@10F00000 { @@ -210,25 +221,25 @@ pinctrl_0: pinctrl@11600000 { compatible = "samsung,exynos5260-pinctrl"; reg = <0x11600000 0x1000>; - interrupts = <0 79 0>; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = <0 32 0>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; }; }; pinctrl_1: pinctrl@12290000 { compatible = "samsung,exynos5260-pinctrl"; reg = <0x12290000 0x1000>; - interrupts = <0 157 0>; + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_2: pinctrl@128B0000 { compatible = "samsung,exynos5260-pinctrl"; reg = <0x128B0000 0x1000>; - interrupts = <0 243 0>; + interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; }; pmu_system_controller: system-controller@10D50000 { @@ -239,7 +250,7 @@ uart0: serial@12C00000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C00000 0x100>; - interrupts = <0 146 0>; + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_peri PERI_CLK_UART0>, <&clock_peri PERI_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; @@ -248,7 +259,7 @@ uart1: serial@12C10000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C10000 0x100>; - interrupts = <0 147 0>; + interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_peri PERI_CLK_UART1>, <&clock_peri PERI_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; @@ -257,7 +268,7 @@ uart2: serial@12C20000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C20000 0x100>; - interrupts = <0 148 0>; + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_peri PERI_CLK_UART2>, <&clock_peri PERI_SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; @@ -266,7 +277,7 @@ uart3: serial@12860000 { compatible = "samsung,exynos4210-uart"; reg = <0x12860000 0x100>; - interrupts = <0 145 0>; + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_aud AUD_CLK_AUD_UART>, <&clock_aud AUD_SCLK_AUD_UART>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; @@ -275,7 +286,7 @@ mmc_0: mmc@12140000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12140000 0x2000>; - interrupts = <0 156 0>; + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock_fsys FSYS_CLK_MMC0>, <&clock_top TOP_SCLK_MMC0>; @@ -287,7 +298,7 @@ mmc_1: mmc@12150000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12150000 0x2000>; - interrupts = <0 158 0>; + interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock_fsys FSYS_CLK_MMC1>, <&clock_top TOP_SCLK_MMC1>; @@ -299,7 +310,7 @@ mmc_2: mmc@12160000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12160000 0x2000>; - interrupts = <0 159 0>; + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock_fsys FSYS_CLK_MMC2>, <&clock_top TOP_SCLK_MMC2>; diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index 9a91685d8890..bb90bbdbe2d9 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -94,7 +94,7 @@ tmu_cpu0: tmu@10060000 { compatible = "samsung,exynos5420-tmu"; reg = <0x10060000 0x100>; - interrupts = <GIC_SPI 65 0>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -103,7 +103,7 @@ tmu_cpu1: tmu@10064000 { compatible = "samsung,exynos5420-tmu"; reg = <0x10064000 0x100>; - interrupts = <GIC_SPI 183 0>; + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -112,7 +112,7 @@ tmu_cpu2: tmu@10068000 { compatible = "samsung,exynos5420-tmu"; reg = <0x10068000 0x100>; - interrupts = <GIC_SPI 184 0>; + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -121,7 +121,7 @@ tmu_cpu3: tmu@1006c000 { compatible = "samsung,exynos5420-tmu"; reg = <0x1006c000 0x100>; - interrupts = <GIC_SPI 185 0>; + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -130,7 +130,7 @@ mmc_0: mmc@12200000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12200000 0x1000>; - interrupts = <0 75 0>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_MMC0>, <&clock CLK_SCLK_MMC0>; @@ -142,7 +142,7 @@ mmc_1: mmc@12210000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12210000 0x1000>; - interrupts = <0 76 0>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>; @@ -154,7 +154,7 @@ mmc_2: mmc@12220000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12220000 0x1000>; - interrupts = <0 77 0>; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_MMC2>, <&clock CLK_SCLK_MMC2>; @@ -166,31 +166,31 @@ pinctrl_0: pinctrl@13400000 { compatible = "samsung,exynos5410-pinctrl"; reg = <0x13400000 0x1000>; - interrupts = <0 45 0>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = <0 32 0>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; }; }; pinctrl_1: pinctrl@14000000 { compatible = "samsung,exynos5410-pinctrl"; reg = <0x14000000 0x1000>; - interrupts = <0 46 0>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_2: pinctrl@10d10000 { compatible = "samsung,exynos5410-pinctrl"; reg = <0x10d10000 0x1000>; - interrupts = <0 50 0>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_3: pinctrl@03860000 { compatible = "samsung,exynos5410-pinctrl"; reg = <0x03860000 0x1000>; - interrupts = <0 47 0>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; }; amba { @@ -388,7 +388,7 @@ }; &usbdrd_dwc3_1 { - interrupts = <GIC_SPI 200 0>; + interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; }; &usbdrd_phy1 { diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 00c4cfa54839..906a1a42a7ea 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -193,7 +193,7 @@ mfc: codec@11000000 { compatible = "samsung,mfc-v7"; reg = <0x11000000 0x10000>; - interrupts = <0 96 0>; + interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_MFC>; clock-names = "mfc"; power-domains = <&mfc_pd>; @@ -203,7 +203,7 @@ mmc_0: mmc@12200000 { compatible = "samsung,exynos5420-dw-mshc-smu"; - interrupts = <0 75 0>; + interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; reg = <0x12200000 0x2000>; @@ -215,7 +215,7 @@ mmc_1: mmc@12210000 { compatible = "samsung,exynos5420-dw-mshc-smu"; - interrupts = <0 76 0>; + interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; reg = <0x12210000 0x2000>; @@ -227,7 +227,7 @@ mmc_2: mmc@12220000 { compatible = "samsung,exynos5420-dw-mshc"; - interrupts = <0 77 0>; + interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; reg = <0x12220000 0x1000>; @@ -320,37 +320,37 @@ pinctrl_0: pinctrl@13400000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x13400000 0x1000>; - interrupts = <0 45 0>; + interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>; wakeup-interrupt-controller { compatible = "samsung,exynos4210-wakeup-eint"; interrupt-parent = <&gic>; - interrupts = <0 32 0>; + interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; }; }; pinctrl_1: pinctrl@13410000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x13410000 0x1000>; - interrupts = <0 78 0>; + interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_2: pinctrl@14000000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x14000000 0x1000>; - interrupts = <0 46 0>; + interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_3: pinctrl@14010000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x14010000 0x1000>; - interrupts = <0 50 0>; + interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_4: pinctrl@03860000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x03860000 0x1000>; - interrupts = <0 47 0>; + interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; }; amba { @@ -363,7 +363,7 @@ adma: adma@03880000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x03880000 0x1000>; - interrupts = <0 110 0>; + interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock_audss EXYNOS_ADMA>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -374,7 +374,7 @@ pdma0: pdma@121A0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121A0000 0x1000>; - interrupts = <0 34 0>; + interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -385,7 +385,7 @@ pdma1: pdma@121B0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121B0000 0x1000>; - interrupts = <0 35 0>; + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -396,7 +396,7 @@ mdma0: mdma@10800000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x10800000 0x1000>; - interrupts = <0 33 0>; + interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_MDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -407,7 +407,7 @@ mdma1: mdma@11C10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x11C10000 0x1000>; - interrupts = <0 124 0>; + interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_MDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; @@ -479,7 +479,7 @@ spi_0: spi@12d20000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d20000 0x100>; - interrupts = <0 68 0>; + interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma0 5 &pdma0 4>; dma-names = "tx", "rx"; @@ -495,7 +495,7 @@ spi_1: spi@12d30000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d30000 0x100>; - interrupts = <0 69 0>; + interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma1 5 &pdma1 4>; dma-names = "tx", "rx"; @@ -511,7 +511,7 @@ spi_2: spi@12d40000 { compatible = "samsung,exynos4210-spi"; reg = <0x12d40000 0x100>; - interrupts = <0 70 0>; + interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>; dmas = <&pdma0 7 &pdma0 6>; dma-names = "tx", "rx"; @@ -539,7 +539,7 @@ dsi@14500000 { compatible = "samsung,exynos5410-mipi-dsi"; reg = <0x14500000 0x10000>; - interrupts = <0 82 0>; + interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; phys = <&mipi_phy 1>; phy-names = "dsim"; clocks = <&clock CLK_DSIM1>, <&clock CLK_SCLK_MIPI1>; @@ -552,7 +552,7 @@ adc: adc@12D10000 { compatible = "samsung,exynos-adc-v2"; reg = <0x12D10000 0x100>; - interrupts = <0 106 0>; + interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TSADC>; clock-names = "adc"; #io-channel-cells = <1>; @@ -564,7 +564,7 @@ hsi2c_8: i2c@12E00000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12E00000 0x1000>; - interrupts = <0 87 0>; + interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -577,7 +577,7 @@ hsi2c_9: i2c@12E10000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12E10000 0x1000>; - interrupts = <0 88 0>; + interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -590,7 +590,7 @@ hsi2c_10: i2c@12E20000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12E20000 0x1000>; - interrupts = <0 203 0>; + interrupts = <0 203 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; @@ -603,7 +603,7 @@ hdmi: hdmi@14530000 { compatible = "samsung,exynos5420-hdmi"; reg = <0x14530000 0x70000>; - interrupts = <0 95 0>; + interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, <&clock CLK_DOUT_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, <&clock CLK_MOUT_HDMI>; @@ -622,7 +622,7 @@ mixer: mixer@14450000 { compatible = "samsung,exynos5420-mixer"; reg = <0x14450000 0x10000>; - interrupts = <0 94 0>; + interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>; clock-names = "mixer", "hdmi", "sclk_hdmi"; @@ -633,7 +633,7 @@ rotator: rotator@11C00000 { compatible = "samsung,exynos5250-rotator"; reg = <0x11C00000 0x64>; - interrupts = <0 84 0>; + interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_ROTATOR>; clock-names = "rotator"; iommus = <&sysmmu_rotator>; @@ -642,7 +642,7 @@ gsc_0: video-scaler@13e00000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e00000 0x1000>; - interrupts = <0 85 0>; + interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_GSCL0>; clock-names = "gscl"; power-domains = <&gsc_pd>; @@ -652,7 +652,7 @@ gsc_1: video-scaler@13e10000 { compatible = "samsung,exynos5-gsc"; reg = <0x13e10000 0x1000>; - interrupts = <0 86 0>; + interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_GSCL1>; clock-names = "gscl"; power-domains = <&gsc_pd>; @@ -662,7 +662,7 @@ jpeg_0: jpeg@11F50000 { compatible = "samsung,exynos5420-jpeg"; reg = <0x11F50000 0x1000>; - interrupts = <0 89 0>; + interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; clock-names = "jpeg"; clocks = <&clock CLK_JPEG>; iommus = <&sysmmu_jpeg0>; @@ -671,7 +671,7 @@ jpeg_1: jpeg@11F60000 { compatible = "samsung,exynos5420-jpeg"; reg = <0x11F60000 0x1000>; - interrupts = <0 168 0>; + interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>; clock-names = "jpeg"; clocks = <&clock CLK_JPEG2>; iommus = <&sysmmu_jpeg1>; @@ -691,7 +691,7 @@ tmu_cpu0: tmu@10060000 { compatible = "samsung,exynos5420-tmu"; reg = <0x10060000 0x100>; - interrupts = <0 65 0>; + interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -700,7 +700,7 @@ tmu_cpu1: tmu@10064000 { compatible = "samsung,exynos5420-tmu"; reg = <0x10064000 0x100>; - interrupts = <0 183 0>; + interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TMU>; clock-names = "tmu_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -709,7 +709,7 @@ tmu_cpu2: tmu@10068000 { compatible = "samsung,exynos5420-tmu-ext-triminfo"; reg = <0x10068000 0x100>, <0x1006c000 0x4>; - interrupts = <0 184 0>; + interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TMU>, <&clock CLK_TMU>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -718,7 +718,7 @@ tmu_cpu3: tmu@1006c000 { compatible = "samsung,exynos5420-tmu-ext-triminfo"; reg = <0x1006c000 0x100>, <0x100a0000 0x4>; - interrupts = <0 185 0>; + interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -727,7 +727,7 @@ tmu_gpu: tmu@100a0000 { compatible = "samsung,exynos5420-tmu-ext-triminfo"; reg = <0x100a0000 0x100>, <0x10068000 0x4>; - interrupts = <0 215 0>; + interrupts = <0 215 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; clock-names = "tmu_apbif", "tmu_triminfo_apbif"; #include "exynos4412-tmu-sensor-conf.dtsi" @@ -799,7 +799,7 @@ sysmmu_scaler1r: sysmmu@0x12890000 { compatible = "samsung,exynos-sysmmu"; reg = <0x12890000 0x1000>; - interrupts = <0 186 0>; + interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_MSCL1>, <&clock CLK_MSCL1>; #iommu-cells = <0>; @@ -808,7 +808,7 @@ sysmmu_scaler2r: sysmmu@0x128A0000 { compatible = "samsung,exynos-sysmmu"; reg = <0x128A0000 0x1000>; - interrupts = <0 188 0>; + interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_MSCL2>, <&clock CLK_MSCL2>; #iommu-cells = <0>; @@ -867,7 +867,7 @@ sysmmu_jpeg1: sysmmu@0x11F20000 { compatible = "samsung,exynos-sysmmu"; reg = <0x11F20000 0x1000>; - interrupts = <0 169 0>; + interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_JPEG2>, <&clock CLK_JPEG2>; #iommu-cells = <0>; @@ -1445,7 +1445,7 @@ }; &usbdrd_dwc3_1 { - interrupts = <GIC_SPI 73 0>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; }; &usbdrd_phy1 { diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index e6bffd13cedd..97c9f0e38526 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -10,6 +10,8 @@ */ #include <dt-bindings/clock/exynos5440.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> / { compatible = "samsung,exynos5440", "samsung,exynos5"; @@ -41,7 +43,8 @@ <0x2E2000 0x1000>, <0x2E4000 0x2000>, <0x2E6000 0x2000>; - interrupts = <1 9 0xf04>; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; cpus { @@ -72,26 +75,26 @@ arm-pmu { compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu"; - interrupts = <0 52 4>, - <0 53 4>, - <0 54 4>, - <0 55 4>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; }; timer { compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; clock-frequency = <50000000>; }; cpufreq@160000 { compatible = "samsung,exynos5440-cpufreq"; reg = <0x160000 0x1000>; - interrupts = <0 57 0>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; operating-points = < /* KHz uV */ 1500000 1100000 @@ -108,7 +111,7 @@ serial_0: serial@B0000 { compatible = "samsung,exynos4210-uart"; reg = <0xB0000 0x1000>; - interrupts = <0 2 0>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_B_125>, <&clock CLK_B_125>; clock-names = "uart", "clk_uart_baud0"; }; @@ -116,7 +119,7 @@ serial_1: serial@C0000 { compatible = "samsung,exynos4210-uart"; reg = <0xC0000 0x1000>; - interrupts = <0 3 0>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_B_125>, <&clock CLK_B_125>; clock-names = "uart", "clk_uart_baud0"; }; @@ -124,7 +127,7 @@ spi_0: spi@D0000 { compatible = "samsung,exynos5440-spi"; reg = <0xD0000 0x100>; - interrupts = <0 4 0>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; samsung,spi-src-clk = <0>; @@ -136,8 +139,14 @@ pin_ctrl: pinctrl@E0000 { compatible = "samsung,exynos5440-pinctrl"; reg = <0xE0000 0x1000>; - interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, - <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; #gpio-cells = <2>; @@ -162,7 +171,7 @@ i2c@F0000 { compatible = "samsung,exynos5440-i2c"; reg = <0xF0000 0x1000>; - interrupts = <0 5 0>; + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_B_125>; @@ -172,7 +181,7 @@ i2c@100000 { compatible = "samsung,exynos5440-i2c"; reg = <0x100000 0x1000>; - interrupts = <0 6 0>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clock CLK_B_125>; @@ -182,7 +191,7 @@ watchdog@110000 { compatible = "samsung,s3c2410-wdt"; reg = <0x110000 0x1000>; - interrupts = <0 1 0>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_B_125>; clock-names = "watchdog"; }; @@ -191,7 +200,7 @@ compatible = "snps,dwmac-3.70a"; reg = <0x00230000 0x8000>; interrupt-parent = <&gic>; - interrupts = <0 31 4>; + interrupts = <GIC_SPI 31 4>; interrupt-names = "macirq"; phy-mode = "sgmii"; clocks = <&clock CLK_GMAC0>; @@ -209,7 +218,8 @@ rtc@130000 { compatible = "samsung,s3c6410-rtc"; reg = <0x130000 0x1000>; - interrupts = <0 17 0>, <0 16 0>; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_B_125>; clock-names = "rtc"; }; @@ -217,7 +227,7 @@ tmuctrl_0: tmuctrl@160118 { compatible = "samsung,exynos5440-tmu"; reg = <0x160118 0x230>, <0x160368 0x10>; - interrupts = <0 58 0>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_B_125>; clock-names = "tmu_apbif"; #include "exynos5440-tmu-sensor-conf.dtsi" @@ -226,7 +236,7 @@ tmuctrl_1: tmuctrl@16011C { compatible = "samsung,exynos5440-tmu"; reg = <0x16011C 0x230>, <0x160368 0x10>; - interrupts = <0 58 0>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_B_125>; clock-names = "tmu_apbif"; #include "exynos5440-tmu-sensor-conf.dtsi" @@ -235,7 +245,7 @@ tmuctrl_2: tmuctrl@160120 { compatible = "samsung,exynos5440-tmu"; reg = <0x160120 0x230>, <0x160368 0x10>; - interrupts = <0 58 0>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_B_125>; clock-names = "tmu_apbif"; #include "exynos5440-tmu-sensor-conf.dtsi" @@ -259,7 +269,7 @@ sata@210000 { compatible = "snps,exynos5440-ahci"; reg = <0x210000 0x10000>; - interrupts = <0 30 0>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_SATA>; clock-names = "sata"; }; @@ -267,7 +277,7 @@ ohci@220000 { compatible = "samsung,exynos5440-ohci"; reg = <0x220000 0x1000>; - interrupts = <0 29 0>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_USB>; clock-names = "usbhost"; }; @@ -275,7 +285,7 @@ ehci@221000 { compatible = "samsung,exynos5440-ehci"; reg = <0x221000 0x1000>; - interrupts = <0 29 0>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_USB>; clock-names = "usbhost"; }; @@ -285,7 +295,9 @@ reg = <0x290000 0x1000 0x270000 0x1000 0x271000 0x40>; - interrupts = <0 20 0>, <0 21 0>, <0 22 0>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>; clock-names = "pcie", "pcie_bus"; #address-cells = <3>; @@ -306,7 +318,9 @@ reg = <0x2a0000 0x1000 0x272000 0x1000 0x271040 0x40>; - interrupts = <0 23 0>, <0 24 0>, <0 25 0>; + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>; clock-names = "pcie", "pcie_bus"; #address-cells = <3>; diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi index 9d31cdce1959..0389e8a10d0b 100644 --- a/arch/arm/boot/dts/exynos54xx.dtsi +++ b/arch/arm/boot/dts/exynos54xx.dtsi @@ -62,34 +62,34 @@ <1 &combiner 23 4>, <2 &combiner 25 2>, <3 &combiner 25 3>, - <4 &gic 0 120 0>, - <5 &gic 0 121 0>, - <6 &gic 0 122 0>, - <7 &gic 0 123 0>, - <8 &gic 0 128 0>, - <9 &gic 0 129 0>, - <10 &gic 0 130 0>, - <11 &gic 0 131 0>; + <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, + <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>, + <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>, + <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>, + <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>, + <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>, + <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>, + <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>; }; }; watchdog: watchdog@101d0000 { compatible = "samsung,exynos5420-wdt"; reg = <0x101d0000 0x100>; - interrupts = <0 42 0>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; }; sss: sss@10830000 { compatible = "samsung,exynos4210-secss"; reg = <0x10830000 0x300>; - interrupts = <0 112 0>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; }; /* i2c_0-3 are defined in exynos5.dtsi */ hsi2c_4: i2c@12ca0000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12ca0000 0x1000>; - interrupts = <0 60 0>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -98,7 +98,7 @@ hsi2c_5: i2c@12cb0000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12cb0000 0x1000>; - interrupts = <0 61 0>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -107,7 +107,7 @@ hsi2c_6: i2c@12cc0000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12cc0000 0x1000>; - interrupts = <0 62 0>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -116,7 +116,7 @@ hsi2c_7: i2c@12cd0000 { compatible = "samsung,exynos5250-hsi2c"; reg = <0x12cd0000 0x1000>; - interrupts = <0 63 0>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -131,7 +131,7 @@ usbdrd_dwc3_0: dwc3@12000000 { compatible = "snps,dwc3"; reg = <0x12000000 0x10000>; - interrupts = <0 72 0>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>; phy-names = "usb2-phy", "usb3-phy"; }; @@ -166,7 +166,7 @@ usbhost2: usb@12110000 { compatible = "samsung,exynos4210-ehci"; reg = <0x12110000 0x100>; - interrupts = <0 71 0>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; @@ -179,7 +179,7 @@ usbhost1: usb@12120000 { compatible = "samsung,exynos4210-ohci"; reg = <0x12120000 0x100>; - interrupts = <0 71 0>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; |