diff options
| -rw-r--r-- | arch/arm/boot/dts/armada-370.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index 45eff24764c5..3b06aa835448 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -324,6 +324,38 @@ ethernet@74000 { compatible = "marvell,armada-370-neta"; }; + + crypto@90000 { + compatible = "marvell,armada-370-crypto"; + reg = <0x90000 0x10000>; + reg-names = "regs"; + interrupts = <48>; + clocks = <&gateclk 23>; + clock-names = "cesa0"; + marvell,crypto-srams = <&crypto_sram>; + marvell,crypto-sram-size = <0x7e0>; + }; + }; + + crypto_sram: sa-sram { + compatible = "mmio-sram"; + reg = <MBUS_ID(0x09, 0x01) 0 0x800>; + reg-names = "sram"; + clocks = <&gateclk 23>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 MBUS_ID(0x09, 0x01) 0 0x800>; + + /* + * The Armada 370 has an erratum preventing the use of + * the standard workflow for CPU idle support (relying + * on the BootROM code to enter/exit idle state). + * Reserve some amount of the crypto SRAM to put the + * cpuidle workaround. + */ + idle-sram@0 { + reg = <0x0 0x20>; + }; }; }; }; |