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author | Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-08-26 11:39:21 +0300 |
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committer | Claudiu Beznea <claudiu.beznea@microchip.com> | 2022-08-31 10:28:18 +0300 |
commit | 7a94b83a7dc551607b6c4400df29151e6a951f07 (patch) | |
tree | b10c9becc6b94ebf303853bad8918e79baff9a94 /usr/dummy-include | |
parent | a02875c4cbd6f3d2f33d70cc158a19ef02d4b84f (diff) | |
download | linux-7a94b83a7dc551607b6c4400df29151e6a951f07.tar.xz |
ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh
On SAMA7G5, when resuming from backup and self-refresh, the bootloader
performs DDR PHY recalibration by restoring the value of ZQ0SR0 (stored
in RAM by Linux before going to backup and self-refresh). It has been
discovered that the current procedure doesn't work for all possible values
that might go to ZQ0SR0 due to hardware bug. The workaround to this is to
avoid storing some values in ZQ0SR0. Thus Linux will read the ZQ0SR0
register and cache its value in RAM after processing it (using
modified_gray_code array). The bootloader will restore the processed value.
Fixes: d2d4716d8384 ("ARM: at91: pm: save ddr phy calibration data to securam")
Suggested-by: Frederic Schumacher <frederic.schumacher@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-4-claudiu.beznea@microchip.com
Diffstat (limited to 'usr/dummy-include')
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