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authorSergey Matsievskiy <matsievskiysv@gmail.com>2024-10-12 13:57:43 +0300
committerLinus Walleij <linus.walleij@linaro.org>2024-10-12 23:04:38 +0300
commit93b8ddc54507a227087c60a0013ed833b6ae7d3c (patch)
tree69ba3bf37f0eed038765f9b27e2ee0858c5da781 /tools
parent3fd976afe9743110f20a23f93b7ff9693f2be4bf (diff)
downloadlinux-93b8ddc54507a227087c60a0013ed833b6ae7d3c.tar.xz
pinctrl: ocelot: fix system hang on level based interrupts
The current implementation only calls chained_irq_enter() and chained_irq_exit() if it detects pending interrupts. ``` for (i = 0; i < info->stride; i++) { uregmap_read(info->map, id_reg + 4 * i, &reg); if (!reg) continue; chained_irq_enter(parent_chip, desc); ``` However, in case of GPIO pin configured in level mode and the parent controller configured in edge mode, GPIO interrupt might be lowered by the hardware. In the result, if the interrupt is short enough, the parent interrupt is still pending while the GPIO interrupt is cleared; chained_irq_enter() never gets called and the system hangs trying to service the parent interrupt. Moving chained_irq_enter() and chained_irq_exit() outside the for loop ensures that they are called even when GPIO interrupt is lowered by the hardware. The similar code with chained_irq_enter() / chained_irq_exit() functions wrapping interrupt checking loop may be found in many other drivers: ``` grep -r -A 10 chained_irq_enter drivers/pinctrl ``` Cc: stable@vger.kernel.org Signed-off-by: Sergey Matsievskiy <matsievskiysv@gmail.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/20241012105743.12450-2-matsievskiysv@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'tools')
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