diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2022-01-24 03:31:24 +0300 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2022-02-09 09:57:32 +0300 |
| commit | cf1f6877b088cd9ddeb5f3db8ade3a61e3a3f9eb (patch) | |
| tree | c6cfc7adbdff4ea1429685c8a3d5cb275576ff28 /tools/testing/cxl | |
| parent | bcc79ea34398845d814170ddc06a457b35ae1975 (diff) | |
| download | linux-cf1f6877b088cd9ddeb5f3db8ade3a61e3a3f9eb.tar.xz | |
cxl/memdev: Add numa_node attribute
While CXL memory targets will have their own memory target node,
individual memory devices may be affinitized like other PCI devices.
Emit that attribute for memdevs.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/164298428430.3018233.16409089892707993289.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/testing/cxl')
| -rw-r--r-- | tools/testing/cxl/test/cxl.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c index 40ed567952e6..cd2f20f2707f 100644 --- a/tools/testing/cxl/test/cxl.c +++ b/tools/testing/cxl/test/cxl.c @@ -583,6 +583,7 @@ static __init int cxl_test_init(void) if (!pdev) goto err_mem; pdev->dev.parent = &port->dev; + set_dev_node(&pdev->dev, i % 2); rc = platform_device_add(pdev); if (rc) { |