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| author | Paul Greenwalt <paul.greenwalt@intel.com> | 2019-10-09 17:09:43 +0300 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2019-11-07 03:41:45 +0300 |
| commit | cfbf13674be4ecb9a38048cd228c382825807b12 (patch) | |
| tree | b2e19b57efeb39d724ecd7fa1267a6db181103f7 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 031f21475297042d86534246c1b2948fc58172b6 (diff) | |
| download | linux-cfbf13674be4ecb9a38048cd228c382825807b12.tar.xz | |
ice: handle DCBx non-contiguous TC request
If DCBx request non-contiguous TCs, then the driver will configure default
traffic class (TC0). This is done to prevent Tx hang since the driver
currently does not support non-contiguous TC.
Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions