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authorCharlene Liu <Charlene.Liu@amd.com>2025-02-28 16:02:20 +0300
committerAlex Deucher <alexander.deucher@amd.com>2025-03-18 21:03:47 +0300
commit15b959534a39530a21d378190557cc8d1eab7b09 (patch)
treeda002f5bfdc3d0e835b9b78edc5e20250d6434e0 /tools/perf/scripts/python/intel-pt-events.py
parent20c13ca5ba84e68046c8ce6d93729b46e591d87b (diff)
downloadlinux-15b959534a39530a21d378190557cc8d1eab7b09.tar.xz
drm/amd/display: Use DPM table clk setting for dml2 soc dscclk
[WHY] Not like dppclk/dispclk, dml2 will calculate the minimum required clocks. For dscclk, it is used for pure comparision. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/intel-pt-events.py')
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