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| author | Victoria Milhoan <vicki.milhoan@freescale.com> | 2015-08-05 21:28:35 +0300 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2015-08-10 18:18:55 +0300 |
| commit | e7472422392461f59bc5d7ddd8542c6a48740336 (patch) | |
| tree | 778c4747bed011ecd99592dc5068cd8b20673a4f /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | bf20d772174bbb6b1a7c0b34f04f51caebe2d6aa (diff) | |
| download | linux-e7472422392461f59bc5d7ddd8542c6a48740336.tar.xz | |
crypto: caam - Add cache coherency support
Freescale i.MX6 ARM platforms do not support hardware cache coherency.
This patch adds cache coherency support to the CAAM driver.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions