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| author | Jon Hunter <jonathanh@nvidia.com> | 2020-07-12 13:25:05 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-07-15 12:07:39 +0300 |
| commit | 579db6e5d9b8cae1094a67809fb02ddede28ba09 (patch) | |
| tree | f2f3fcd832cedcfc9b475f0c5b4e5899d83a093e /tools/perf/scripts/python/exported-sql-viewer.py | |
| parent | 3f9efbbe57bc6e999f6f4d389da289f2733f0261 (diff) | |
| download | linux-579db6e5d9b8cae1094a67809fb02ddede28ba09.tar.xz | |
arm64: tegra: Enable DFLL support on Jetson Nano
Populate the DFLL node and corresponding PWM pin nodes in order to
enable CPUFREQ support on the Jetson Nano platform.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
0 files changed, 0 insertions, 0 deletions