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| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2017-09-04 12:48:43 +0300 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2017-10-04 06:36:49 +0300 |
| commit | ef833eab1ddec06982ea620086b03d67ef4ddf9b (patch) | |
| tree | 6d96b27c0b4e90d107c7ecf5a0853364d01a9402 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 9583833e9e3628177661e815e5ce80dd3955d82f (diff) | |
| download | linux-ef833eab1ddec06982ea620086b03d67ef4ddf9b.tar.xz | |
ARC: [plat-hsdk] use actual clk driver to manage cpu clk
With corresponding clk driver now merged upstream, switch to it.
- core_clk now represent the PLL (vs. fixed clk before)
- input_clk represent the clk signal src for PLL (basically xtal)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions