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| author | Jacopo Mondi <jacopo@jmondi.org> | 2018-08-14 16:21:45 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2018-09-03 07:25:22 +0300 |
| commit | 37c045d25e90038682b845de0a1db43c8301694d (patch) | |
| tree | 845db05d5b3e5b02f1c4ff25c3527a27f076d89c /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | cc07fd3c45c1e589f1f2bea4ac69e5d4ecb77e9d (diff) | |
| download | linux-37c045d25e90038682b845de0a1db43c8301694d.tar.xz | |
ARM: dts: imx6qdl: Add Engicam i.Core 1.5 MX6
The 1.5 version of Engicam's i.Core MX6 CPU module features a different clock
provider for the ethernet's PHY interface. Adjust the FEC ptp clock to
reference CLK_ENET_REF clock source, and set SION bit of
MX6QDL_PAD_GPIO_16__ENET_REF_CLK to adjust the input path of that pin.
The newly introduced imx6ql-icore-1.5.dtsi allows to collect in a single
place differences between version '1.0' and '1.5' of the module.
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions