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author | Mark Brown <broonie@kernel.org> | 2020-01-23 15:36:45 +0300 |
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committer | Mark Brown <broonie@kernel.org> | 2020-01-23 15:36:45 +0300 |
commit | a7196caf83ea9e9b56c5c8c95fbfe0d45acec46b (patch) | |
tree | d9147ac16e1af83463bad4e45b233bc8e51f2e0e /sound/soc/meson | |
parent | 20230620b44510ce968a719a1d6ee7483583178d (diff) | |
parent | d8e2e0d2491e78f3f7b451c3a93ba29950efe2cf (diff) | |
download | linux-a7196caf83ea9e9b56c5c8c95fbfe0d45acec46b.tar.xz |
Merge branch 'asoc-5.6' into asoc-next
Diffstat (limited to 'sound/soc/meson')
-rw-r--r-- | sound/soc/meson/axg-fifo.c | 61 | ||||
-rw-r--r-- | sound/soc/meson/axg-fifo.h | 9 | ||||
-rw-r--r-- | sound/soc/meson/axg-frddr.c | 36 | ||||
-rw-r--r-- | sound/soc/meson/axg-toddr.c | 24 |
4 files changed, 75 insertions, 55 deletions
diff --git a/sound/soc/meson/axg-fifo.c b/sound/soc/meson/axg-fifo.c index d6f3eefb8f09..c12b0d5e8ebf 100644 --- a/sound/soc/meson/axg-fifo.c +++ b/sound/soc/meson/axg-fifo.c @@ -34,7 +34,7 @@ static struct snd_pcm_hardware axg_fifo_hw = { .rate_max = 192000, .channels_min = 1, .channels_max = AXG_FIFO_CH_MAX, - .period_bytes_min = AXG_FIFO_MIN_DEPTH, + .period_bytes_min = AXG_FIFO_BURST, .period_bytes_max = UINT_MAX, .periods_min = 2, .periods_max = UINT_MAX, @@ -113,13 +113,10 @@ int axg_fifo_pcm_hw_params(struct snd_soc_component *component, { struct snd_pcm_runtime *runtime = ss->runtime; struct axg_fifo *fifo = axg_fifo_data(ss); + unsigned int burst_num, period, threshold; dma_addr_t end_ptr; - unsigned int burst_num; - int ret; - ret = snd_pcm_lib_malloc_pages(ss, params_buffer_bytes(params)); - if (ret < 0) - return ret; + period = params_period_bytes(params); /* Setup dma memory pointers */ end_ptr = runtime->dma_addr + runtime->dma_bytes - AXG_FIFO_BURST; @@ -127,9 +124,24 @@ int axg_fifo_pcm_hw_params(struct snd_soc_component *component, regmap_write(fifo->map, FIFO_FINISH_ADDR, end_ptr); /* Setup interrupt periodicity */ - burst_num = params_period_bytes(params) / AXG_FIFO_BURST; + burst_num = period / AXG_FIFO_BURST; regmap_write(fifo->map, FIFO_INT_ADDR, burst_num); + /* + * Start the fifo request on the smallest of the following: + * - Half the fifo size + * - Half the period size + */ + threshold = min(period / 2, fifo->depth / 2); + + /* + * With the threshold in bytes, register value is: + * V = (threshold / burst) - 1 + */ + threshold /= AXG_FIFO_BURST; + regmap_field_write(fifo->field_threshold, + threshold ? threshold - 1 : 0); + /* Enable block count irq */ regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_INT_EN(FIFO_INT_COUNT_REPEAT), @@ -167,7 +179,7 @@ int axg_fifo_pcm_hw_free(struct snd_soc_component *component, regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_INT_EN(FIFO_INT_COUNT_REPEAT), 0); - return snd_pcm_lib_free_pages(ss); + return 0; } EXPORT_SYMBOL_GPL(axg_fifo_pcm_hw_free); @@ -215,17 +227,17 @@ int axg_fifo_pcm_open(struct snd_soc_component *component, /* * Make sure the buffer and period size are multiple of the FIFO - * minimum depth size + * burst */ ret = snd_pcm_hw_constraint_step(ss->runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, - AXG_FIFO_MIN_DEPTH); + AXG_FIFO_BURST); if (ret) return ret; ret = snd_pcm_hw_constraint_step(ss->runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, - AXG_FIFO_MIN_DEPTH); + AXG_FIFO_BURST); if (ret) return ret; @@ -287,9 +299,9 @@ int axg_fifo_pcm_new(struct snd_soc_pcm_runtime *rtd, unsigned int type) struct snd_card *card = rtd->card->snd_card; size_t size = axg_fifo_hw.buffer_bytes_max; - snd_pcm_lib_preallocate_pages(rtd->pcm->streams[type].substream, - SNDRV_DMA_TYPE_DEV, card->dev, - size, size); + snd_pcm_set_managed_buffer(rtd->pcm->streams[type].substream, + SNDRV_DMA_TYPE_DEV, card->dev, + size, size); return 0; } EXPORT_SYMBOL_GPL(axg_fifo_pcm_new); @@ -307,6 +319,7 @@ int axg_fifo_probe(struct platform_device *pdev) const struct axg_fifo_match_data *data; struct axg_fifo *fifo; void __iomem *regs; + int ret; data = of_device_get_match_data(dev); if (!data) { @@ -352,6 +365,26 @@ int axg_fifo_probe(struct platform_device *pdev) return fifo->irq; } + fifo->field_threshold = + devm_regmap_field_alloc(dev, fifo->map, data->field_threshold); + if (IS_ERR(fifo->field_threshold)) + return PTR_ERR(fifo->field_threshold); + + ret = of_property_read_u32(dev->of_node, "amlogic,fifo-depth", + &fifo->depth); + if (ret) { + /* Error out for anything but a missing property */ + if (ret != -EINVAL) + return ret; + /* + * If the property is missing, it might be because of an old + * DT. In such case, assume the smallest known fifo depth + */ + fifo->depth = 256; + dev_warn(dev, "fifo depth not found, assume %u bytes\n", + fifo->depth); + } + return devm_snd_soc_register_component(dev, data->component_drv, data->dai_drv, 1); } diff --git a/sound/soc/meson/axg-fifo.h b/sound/soc/meson/axg-fifo.h index cf928d43b558..b63acd723c87 100644 --- a/sound/soc/meson/axg-fifo.h +++ b/sound/soc/meson/axg-fifo.h @@ -9,7 +9,9 @@ struct clk; struct platform_device; +struct reg_field; struct regmap; +struct regmap_field; struct reset_control; struct snd_soc_component_driver; @@ -29,8 +31,6 @@ struct snd_soc_pcm_runtime; SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE) #define AXG_FIFO_BURST 8 -#define AXG_FIFO_MIN_CNT 64 -#define AXG_FIFO_MIN_DEPTH (AXG_FIFO_BURST * AXG_FIFO_MIN_CNT) #define FIFO_INT_ADDR_FINISH BIT(0) #define FIFO_INT_ADDR_INT BIT(1) @@ -50,8 +50,6 @@ struct snd_soc_pcm_runtime; #define CTRL1_STATUS2_SEL_MASK GENMASK(11, 8) #define CTRL1_STATUS2_SEL(x) ((x) << 8) #define STATUS2_SEL_DDR_READ 0 -#define CTRL1_THRESHOLD_MASK GENMASK(23, 16) -#define CTRL1_THRESHOLD(x) ((x) << 16) #define CTRL1_FRDDR_DEPTH_MASK GENMASK(31, 24) #define CTRL1_FRDDR_DEPTH(x) ((x) << 24) #define FIFO_START_ADDR 0x08 @@ -67,12 +65,15 @@ struct axg_fifo { struct regmap *map; struct clk *pclk; struct reset_control *arb; + struct regmap_field *field_threshold; + unsigned int depth; int irq; }; struct axg_fifo_match_data { const struct snd_soc_component_driver *component_drv; struct snd_soc_dai_driver *dai_drv; + struct reg_field field_threshold; }; int axg_fifo_pcm_open(struct snd_soc_component *component, diff --git a/sound/soc/meson/axg-frddr.c b/sound/soc/meson/axg-frddr.c index 665d75d49d7b..c3ae8ac30745 100644 --- a/sound/soc/meson/axg-frddr.c +++ b/sound/soc/meson/axg-frddr.c @@ -50,7 +50,7 @@ static int axg_frddr_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai); - unsigned int fifo_depth, fifo_threshold; + unsigned int val; int ret; /* Enable pclk to access registers and clock the fifo ip */ @@ -61,18 +61,10 @@ static int axg_frddr_dai_startup(struct snd_pcm_substream *substream, /* Apply single buffer mode to the interface */ regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_FRDDR_PP_MODE, 0); - /* - * TODO: We could adapt the fifo depth and the fifo threshold - * depending on the expected memory throughput and lantencies - * For now, we'll just use the same values as the vendor kernel - * Depth and threshold are zero based. - */ - fifo_depth = AXG_FIFO_MIN_CNT - 1; - fifo_threshold = (AXG_FIFO_MIN_CNT / 2) - 1; - regmap_update_bits(fifo->map, FIFO_CTRL1, - CTRL1_FRDDR_DEPTH_MASK | CTRL1_THRESHOLD_MASK, - CTRL1_FRDDR_DEPTH(fifo_depth) | - CTRL1_THRESHOLD(fifo_threshold)); + /* Use all fifo depth */ + val = (fifo->depth / AXG_FIFO_BURST) - 1; + regmap_update_bits(fifo->map, FIFO_CTRL1, CTRL1_FRDDR_DEPTH_MASK, + CTRL1_FRDDR_DEPTH(val)); return 0; } @@ -151,7 +143,6 @@ static const struct snd_soc_component_driver axg_frddr_component_drv = { .num_dapm_routes = ARRAY_SIZE(axg_frddr_dapm_routes), .open = axg_fifo_pcm_open, .close = axg_fifo_pcm_close, - .ioctl = snd_soc_pcm_lib_ioctl, .hw_params = axg_fifo_pcm_hw_params, .hw_free = axg_fifo_pcm_hw_free, .pointer = axg_fifo_pcm_pointer, @@ -159,8 +150,9 @@ static const struct snd_soc_component_driver axg_frddr_component_drv = { }; static const struct axg_fifo_match_data axg_frddr_match_data = { - .component_drv = &axg_frddr_component_drv, - .dai_drv = &axg_frddr_dai_drv + .field_threshold = REG_FIELD(FIFO_CTRL1, 16, 23), + .component_drv = &axg_frddr_component_drv, + .dai_drv = &axg_frddr_dai_drv }; static const struct snd_soc_dai_ops g12a_frddr_ops = { @@ -275,7 +267,6 @@ static const struct snd_soc_component_driver g12a_frddr_component_drv = { .num_dapm_routes = ARRAY_SIZE(g12a_frddr_dapm_routes), .open = axg_fifo_pcm_open, .close = axg_fifo_pcm_close, - .ioctl = snd_soc_pcm_lib_ioctl, .hw_params = g12a_fifo_pcm_hw_params, .hw_free = axg_fifo_pcm_hw_free, .pointer = axg_fifo_pcm_pointer, @@ -283,8 +274,9 @@ static const struct snd_soc_component_driver g12a_frddr_component_drv = { }; static const struct axg_fifo_match_data g12a_frddr_match_data = { - .component_drv = &g12a_frddr_component_drv, - .dai_drv = &g12a_frddr_dai_drv + .field_threshold = REG_FIELD(FIFO_CTRL1, 16, 23), + .component_drv = &g12a_frddr_component_drv, + .dai_drv = &g12a_frddr_dai_drv }; /* On SM1, the output selection in on CTRL2 */ @@ -345,7 +337,6 @@ static const struct snd_soc_component_driver sm1_frddr_component_drv = { .num_dapm_routes = ARRAY_SIZE(g12a_frddr_dapm_routes), .open = axg_fifo_pcm_open, .close = axg_fifo_pcm_close, - .ioctl = snd_soc_pcm_lib_ioctl, .hw_params = g12a_fifo_pcm_hw_params, .hw_free = axg_fifo_pcm_hw_free, .pointer = axg_fifo_pcm_pointer, @@ -353,8 +344,9 @@ static const struct snd_soc_component_driver sm1_frddr_component_drv = { }; static const struct axg_fifo_match_data sm1_frddr_match_data = { - .component_drv = &sm1_frddr_component_drv, - .dai_drv = &g12a_frddr_dai_drv + .field_threshold = REG_FIELD(FIFO_CTRL1, 16, 23), + .component_drv = &sm1_frddr_component_drv, + .dai_drv = &g12a_frddr_dai_drv }; static const struct of_device_id axg_frddr_of_match[] = { diff --git a/sound/soc/meson/axg-toddr.c b/sound/soc/meson/axg-toddr.c index 7fef0b961496..e711abcf8c12 100644 --- a/sound/soc/meson/axg-toddr.c +++ b/sound/soc/meson/axg-toddr.c @@ -89,7 +89,6 @@ static int axg_toddr_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai); - unsigned int fifo_threshold; int ret; /* Enable pclk to access registers and clock the fifo ip */ @@ -107,11 +106,6 @@ static int axg_toddr_dai_startup(struct snd_pcm_substream *substream, /* Apply single buffer mode to the interface */ regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_TODDR_PP_MODE, 0); - /* TODDR does not have a configurable fifo depth */ - fifo_threshold = AXG_FIFO_MIN_CNT - 1; - regmap_update_bits(fifo->map, FIFO_CTRL1, CTRL1_THRESHOLD_MASK, - CTRL1_THRESHOLD(fifo_threshold)); - return 0; } @@ -183,7 +177,6 @@ static const struct snd_soc_component_driver axg_toddr_component_drv = { .num_dapm_routes = ARRAY_SIZE(axg_toddr_dapm_routes), .open = axg_fifo_pcm_open, .close = axg_fifo_pcm_close, - .ioctl = snd_soc_pcm_lib_ioctl, .hw_params = axg_fifo_pcm_hw_params, .hw_free = axg_fifo_pcm_hw_free, .pointer = axg_fifo_pcm_pointer, @@ -191,8 +184,9 @@ static const struct snd_soc_component_driver axg_toddr_component_drv = { }; static const struct axg_fifo_match_data axg_toddr_match_data = { - .component_drv = &axg_toddr_component_drv, - .dai_drv = &axg_toddr_dai_drv + .field_threshold = REG_FIELD(FIFO_CTRL1, 16, 23), + .component_drv = &axg_toddr_component_drv, + .dai_drv = &axg_toddr_dai_drv }; static const struct snd_soc_dai_ops g12a_toddr_ops = { @@ -222,7 +216,6 @@ static const struct snd_soc_component_driver g12a_toddr_component_drv = { .num_dapm_routes = ARRAY_SIZE(axg_toddr_dapm_routes), .open = axg_fifo_pcm_open, .close = axg_fifo_pcm_close, - .ioctl = snd_soc_pcm_lib_ioctl, .hw_params = g12a_fifo_pcm_hw_params, .hw_free = axg_fifo_pcm_hw_free, .pointer = axg_fifo_pcm_pointer, @@ -230,8 +223,9 @@ static const struct snd_soc_component_driver g12a_toddr_component_drv = { }; static const struct axg_fifo_match_data g12a_toddr_match_data = { - .component_drv = &g12a_toddr_component_drv, - .dai_drv = &g12a_toddr_dai_drv + .field_threshold = REG_FIELD(FIFO_CTRL1, 16, 23), + .component_drv = &g12a_toddr_component_drv, + .dai_drv = &g12a_toddr_dai_drv }; static const char * const sm1_toddr_sel_texts[] = { @@ -292,7 +286,6 @@ static const struct snd_soc_component_driver sm1_toddr_component_drv = { .num_dapm_routes = ARRAY_SIZE(sm1_toddr_dapm_routes), .open = axg_fifo_pcm_open, .close = axg_fifo_pcm_close, - .ioctl = snd_soc_pcm_lib_ioctl, .hw_params = g12a_fifo_pcm_hw_params, .hw_free = axg_fifo_pcm_hw_free, .pointer = axg_fifo_pcm_pointer, @@ -300,8 +293,9 @@ static const struct snd_soc_component_driver sm1_toddr_component_drv = { }; static const struct axg_fifo_match_data sm1_toddr_match_data = { - .component_drv = &sm1_toddr_component_drv, - .dai_drv = &g12a_toddr_dai_drv + .field_threshold = REG_FIELD(FIFO_CTRL1, 12, 23), + .component_drv = &sm1_toddr_component_drv, + .dai_drv = &g12a_toddr_dai_drv }; static const struct of_device_id axg_toddr_of_match[] = { |