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author | Akshu Agrawal <akshu.agrawal@amd.com> | 2018-09-10 11:06:30 +0300 |
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committer | Mark Brown <broonie@kernel.org> | 2018-09-10 14:20:52 +0300 |
commit | 2a665dba016d5493c7d826fec82b0cb643b30d42 (patch) | |
tree | 40d1b5d7a8266516c8bf0eb7feae21a72ae98913 /sound/ppc | |
parent | 6c92d5a2744e27619a8fcc9d74b91ee9f1cdebd1 (diff) | |
download | linux-2a665dba016d5493c7d826fec82b0cb643b30d42.tar.xz |
ASoC: AMD: Ensure reset bit is cleared before configuring
HW register descriptions says:
"DMA Channel Reset...Software must confirm that this bit is
cleared before reprogramming any of the channel configuration registers."
There could be cases where dma stop errored out leaving dma channel
in reset state. We need to ensure that before the start of another dma,
channel is out of the reset state.
Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/ppc')
0 files changed, 0 insertions, 0 deletions