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author | Robin Murphy <robin.murphy@arm.com> | 2018-07-11 22:40:35 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-07-15 14:52:59 +0300 |
commit | ccff2dfaceaca4517432f5c149594215fe9098cc (patch) | |
tree | b7cb5f2cb28ed1f5aff83ed395b7c2354ebd281a /scripts/Makefile.build | |
parent | 434d611cddef1ceed32bf416a363992b01a3ff9a (diff) | |
download | linux-ccff2dfaceaca4517432f5c149594215fe9098cc.tar.xz |
coresight: tpiu: Fix disabling timeouts
Probing the TPIU driver under UBSan triggers an out-of-bounds shift
warning in coresight_timeout():
...
[ 5.677530] UBSAN: Undefined behaviour in drivers/hwtracing/coresight/coresight.c:929:16
[ 5.685542] shift exponent 64 is too large for 64-bit type 'long unsigned int'
...
On closer inspection things are exponentially out of whack because we're
passing a bitmask where a bit number should be. Amusingly, it seems that
both calls will find their expected values by sheer luck and appear to
succeed: 1 << FFCR_FON_MAN ends up at bit 64 which whilst undefined
evaluates as zero in practice, while 1 << FFSR_FT_STOPPED finds bit 2
(TCPresent) which apparently is usually tied high.
Following the examples of other drivers, define separate FOO and FOO_BIT
macros for masks vs. indices, and put things right.
CC: Robert Walker <robert.walker@arm.com>
CC: Mike Leach <mike.leach@linaro.org>
CC: Mathieu Poirier <mathieu.poirier@linaro.org>
Fixes: 11595db8e17f ("coresight: Fix disabling of CoreSight TPIU")
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'scripts/Makefile.build')
0 files changed, 0 insertions, 0 deletions