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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-11-30 04:05:27 +0300 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-12-01 17:13:14 +0300 |
commit | 3a2429e1faf40b2aaa481aa4b001a74d222c7e8b (patch) | |
tree | 3541743160a49165927e16a4a2e43523aff3bda5 /scripts/Makefile.build | |
parent | bbda5ec671d3fe62faefa1cab7270aa586042a4b (diff) | |
download | linux-3a2429e1faf40b2aaa481aa4b001a74d222c7e8b.tar.xz |
kbuild: change if_changed_rule for multi-line recipe
The 'define' ... 'endef' directive is useful to confine a series of
shell commands into a single macro:
define foo
[action1]
[action2]
[action3]
endif
Each action is executed in a separate subshell.
However, rule_cc_o_c and rule_as_o_S in scripts/Makefile.build are
written as follows (with a trailing semicolon in each cmd_*):
define rule_cc_o_c
[action1] ; \
[action2] ; \
[action3] ;
endef
All shell commands are concatenated with '; \' so that it looks like
a single command from the Makefile point of view. This does not
exploit the benefits of 'define' ... 'endef' form because a single
shell command can be more simply written, like this:
rule_cc_o_c = \
[action1] ; \
[action2] ; \
[action3] ;
I guess the intention for the command concatenation was to let the
'@set -e' in if_changed_rule cover all the commands.
We can improve the readability by moving '@set -e' to the 'cmd' macro.
The combo of $(call echo-cmd,*) $(cmd_*) in rule_cc_o_c and rule_as_o_S
have been replaced with $(call cmd,*). The trailing back-slashes have
been removed.
Here is a note about the performance: the commands in rule_cc_o_c and
rule_as_o_S were previously executed all together in a single subshell,
but now each line in a separate subshell. This means Make will spawn
extra subshells [1]. I measured the build performance for
x86_64_defconfig + CONFIG_MODVERSIONS + CONFIG_TRIM_UNUSED_KSYMS
and I saw slight performance regression, but I believe code readability
and maintainability wins.
[1] Precisely, GNU Make may optimize this by executing the command
directly instead of forking a subshell, if no shell special
characters are found in the command line and omitting the subshell
will not change the behavior.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'scripts/Makefile.build')
-rw-r--r-- | scripts/Makefile.build | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 23ebf2508234..a0002246366b 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -260,20 +260,20 @@ cmd_gen_ksymdeps = \ endif define rule_cc_o_c - $(call echo-cmd,checksrc) $(cmd_checksrc) \ - $(call cmd_and_fixdep,cc_o_c) \ - $(cmd_gen_ksymdeps) \ - $(cmd_checkdoc) \ - $(call echo-cmd,objtool) $(cmd_objtool) \ - $(cmd_modversions_c) \ - $(call echo-cmd,record_mcount) $(cmd_record_mcount) + $(call cmd,checksrc) + $(call cmd_and_fixdep,cc_o_c) + $(call cmd,gen_ksymdeps) + $(call cmd,checkdoc) + $(call cmd,objtool) + $(call cmd,modversions_c) + $(call cmd,record_mcount) endef define rule_as_o_S - $(call cmd_and_fixdep,as_o_S) \ - $(cmd_gen_ksymdeps) \ - $(call echo-cmd,objtool) $(cmd_objtool) \ - $(cmd_modversions_S) + $(call cmd_and_fixdep,as_o_S) + $(call cmd,gen_ksymdeps) + $(call cmd,objtool) + $(call cmd,modversions_S) endef # List module undefined symbols (or empty line if not enabled) |