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| author | Marc Zyngier <maz@kernel.org> | 2020-12-31 14:39:01 +0300 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2021-02-03 13:59:26 +0300 |
| commit | 99b6a4013fe9331e462ccad351a8ac7a2cb330d6 (patch) | |
| tree | 122d2304249369e6f7262973507475d2395a81db /net/lapb/lapb_timer.c | |
| parent | cb95914685ca6514da9a1592b19255fe679557eb (diff) | |
| download | linux-99b6a4013fe9331e462ccad351a8ac7a2cb330d6.tar.xz | |
KVM: arm64: Add handling of AArch32 PCMEID{2,3} PMUv3 registers
Despite advertising support for AArch32 PMUv3p1, we fail to handle
the PMCEID{2,3} registers, which conveniently alias with the top
bits of PMCEID{0,1}_EL1.
Implement these registers with the usual AA32(HI/LO) aliasing
mechanism.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions