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authorKan Liang <kan.liang@linux.intel.com>2021-02-02 23:09:10 +0300
committerArnaldo Carvalho de Melo <acme@redhat.com>2021-02-08 22:25:00 +0300
commit590db42de068a1d11e51bd0796a9044621aeed2e (patch)
tree8a08575b6be5ba31cdbbaae1c95eda72f623cf82 /mm/mprotect.c
parentea8d0ed6eae37b01953a29bca98112d9e2507a84 (diff)
downloadlinux-590db42de068a1d11e51bd0796a9044621aeed2e.tar.xz
perf report: Support instruction latency
The instruction latency information can be recorded on some platforms, e.g., the Intel Sapphire Rapids server. With both memory latency (weight) and the new instruction latency information, users can easily locate the expensive load instructions, and also understand the time spent in different stages. The users can optimize their applications in different pipeline stages. The 'weight' field is shared among different architectures. Reusing the 'weight' field may impacts other architectures. Add a new field to store the instruction latency. Like the 'weight' support, introduce a 'ins_lat' for the global instruction latency, and a 'local_ins_lat' for the local instruction latency version. Add new sort functions, INSTR Latency and Local INSTR Latency, accordingly. Add local_ins_lat to the default_mem_sort_order[]. Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Jin Yao <yao.jin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Link: http://lore.kernel.org/lkml/1612296553-21962-7-git-send-email-kan.liang@linux.intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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