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authorChris Brandt <chris.brandt@renesas.com>2016-09-02 05:32:25 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2016-09-05 15:16:25 +0300
commitb452dfe92f651601d04d7b122d5b96e74d7ae030 (patch)
tree5fea9e92a904098003c2d096a4383a0bcf76f487 /lib/compat_audit.c
parent074969813350cda4c624a585489cc1b3550414bc (diff)
downloadlinux-b452dfe92f651601d04d7b122d5b96e74d7ae030.tar.xz
clk: renesas: rz: Select EXTAL vs USB clock
Check the MD_CLK pin to determine the current clock mode in order to set the pll clock parent correctly. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'lib/compat_audit.c')
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