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| author | Maxim Kochetkov <fido_max@inbox.ru> | 2023-06-22 22:22:45 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2023-06-25 01:39:38 +0300 |
| commit | f1bc9fc4a06de0108e0dca2a9a7e99ba1fc632f9 (patch) | |
| tree | 4efa8537a735fdbf76371bbd5e1da0a1ceda8c60 /ipc | |
| parent | ce3aee7114c575fab32a5e9e939d4bbb3dcca79f (diff) | |
| download | linux-f1bc9fc4a06de0108e0dca2a9a7e99ba1fc632f9.tar.xz | |
net: axienet: Move reset before 64-bit DMA detection
64-bit DMA detection will fail if axienet was started before (by boot
loader, boot ROM, etc). In this state axienet will not start properly.
XAXIDMA_TX_CDESC_OFFSET + 4 register (MM2S_CURDESC_MSB) is used to detect
64-bit DMA capability here. But datasheet says: When DMACR.RS is 1
(axienet is in enabled state), CURDESC_PTR becomes Read Only (RO) and
is used to fetch the first descriptor. So iowrite32()/ioread32() trick
to this register to detect 64-bit DMA will not work.
So move axienet reset before 64-bit DMA detection.
Fixes: f735c40ed93c ("net: axienet: Autodetect 64-bit DMA capability")
Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
Reviewed-by: Robert Hancock <robert.hancock@calian.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Link: https://lore.kernel.org/r/20230622192245.116864-1-fido_max@inbox.ru
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'ipc')
0 files changed, 0 insertions, 0 deletions