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| author | Vignesh Raghavendra <vigneshr@ti.com> | 2023-03-23 15:01:07 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2023-03-31 15:19:36 +0300 |
| commit | f806bea3093cb3568e01b4375d5e1d7c8c47c1d4 (patch) | |
| tree | a11fe3e3351ab450f429829e33c0205f2b0c146b /include | |
| parent | 86de3bbfe45e5a7e64d4f24a1c034725072420d8 (diff) | |
| download | linux-f806bea3093cb3568e01b4375d5e1d7c8c47c1d4.tar.xz | |
dmaengine: ti: k3-udma: Workaround errata i2234
Per [1], UDMA TR15 transactions may hang if ICNT0 is less than 64B
Work around is to set EOL flag is to 1 for ICNT0.
Since, there is no performance penalty / side effects of setting EOL
flag event ICNTO > 64B, just set the flag for all UDMAP TR15
descriptors.
[1] https://www.ti.com/lit/er/sprz455a/sprz455a.pdf
Errata doc for J721E DRA829/TDA4VM Processors Silicon Revision 1.1/1.0
(Rev. A)
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
[j-choudhary@ti.com: minor cleanups]
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Link: https://lore.kernel.org/r/20230323120107.27638-1-j-choudhary@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/dma/ti-cppi5.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/dma/ti-cppi5.h b/include/linux/dma/ti-cppi5.h index efa2f0309f00..c53c0f6e3b1a 100644 --- a/include/linux/dma/ti-cppi5.h +++ b/include/linux/dma/ti-cppi5.h @@ -616,6 +616,7 @@ static inline void *cppi5_hdesc_get_swdata(struct cppi5_host_desc_t *desc) #define CPPI5_TR_CSF_SUPR_EVT BIT(2) #define CPPI5_TR_CSF_EOL_ADV_SHIFT (4U) #define CPPI5_TR_CSF_EOL_ADV_MASK GENMASK(6, 4) +#define CPPI5_TR_CSF_EOL_ICNT0 BIT(4) #define CPPI5_TR_CSF_EOP BIT(7) /** |