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authorMaxime Chevallier <maxime.chevallier@bootlin.com>2022-09-02 11:32:03 +0300
committerDavid S. Miller <davem@davemloft.net>2022-09-05 12:16:53 +0300
commit4a502cf4d77e12119e7061a05d5789cd3129d185 (patch)
tree2fcf7431b6a9df81547da535c9e32c5663f7b60a /include
parent5adb0ed04535fdf827960ddcaddaeb88aa32ab3b (diff)
downloadlinux-4a502cf4d77e12119e7061a05d5789cd3129d185.tar.xz
net: pcs: add new PCS driver for altera TSE PCS
The Altera Triple Speed Ethernet has a SGMII/1000BaseC PCS that can be integrated in several ways. It can either be part of the TSE MAC's address space, accessed through 32 bits accesses on the mapped mdio device 0, or through a dedicated 16 bits register set. This driver allows using the TSE PCS outside of altera TSE's driver, since it can be used standalone by other MACs. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include')
-rw-r--r--include/linux/pcs-altera-tse.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/include/linux/pcs-altera-tse.h b/include/linux/pcs-altera-tse.h
new file mode 100644
index 000000000000..92ab9f08e835
--- /dev/null
+++ b/include/linux/pcs-altera-tse.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 Bootlin
+ *
+ * Maxime Chevallier <maxime.chevallier@bootlin.com>
+ */
+
+#ifndef __LINUX_PCS_ALTERA_TSE_H
+#define __LINUX_PCS_ALTERA_TSE_H
+
+struct phylink_pcs;
+struct net_device;
+
+struct phylink_pcs *alt_tse_pcs_create(struct net_device *ndev,
+ void __iomem *pcs_base, int reg_width);
+
+#endif /* __LINUX_PCS_ALTERA_TSE_H */