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author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-07-09 19:04:31 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-07-09 19:04:31 +0300 |
commit | 96407298ff6ef59c4554833d47d29c775d1e7652 (patch) | |
tree | 35e97d6bc77c0b05812e95cfcdb8b8f4086d138c /include | |
parent | 8a3367cc8005842efcefc0cb5c29780370818572 (diff) | |
parent | ede2001569c32e5bafd2203c7272bbd3249e942e (diff) | |
download | linux-96407298ff6ef59c4554833d47d29c775d1e7652.tar.xz |
Merge tag 'i3c/for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux
Pull ic3 updates from Boris Brezillon:
- Drop support for 10-bit I2C addresses
- Add support for limited bus mode
- Fix the Cadence DT binding doc
- Use struct_size() to allocate a DEFSLVS packet
* tag 'i3c/for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux:
i3c: master: Use struct_size() helper
dt-bindings: i3c: cdns: Use correct cells for I2C device
i3c: dw: add limited bus mode support
i3c: add mixed limited bus mode
i3c: fix i2c and i3c scl rate by bus mode
dt-bindings: i3c: Document dropped support for I2C 10 bit devices
i3c: Drop support for I2C 10 bit addresing
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/i3c/master.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h index f13fd8b1dd79..1f08fa8d69d2 100644 --- a/include/linux/i3c/master.h +++ b/include/linux/i3c/master.h @@ -48,7 +48,7 @@ struct i3c_i2c_dev_desc { #define I3C_LVR_I2C_INDEX(x) ((x) << 5) #define I3C_LVR_I2C_FM_MODE BIT(4) -#define I2C_MAX_ADDR GENMASK(9, 0) +#define I2C_MAX_ADDR GENMASK(6, 0) /** * struct i2c_dev_boardinfo - I2C device board information @@ -250,12 +250,17 @@ struct i3c_device { * the bus. The only impact in this mode is that the * high SCL pulse has to stay below 50ns to trick I2C * devices when transmitting I3C frames + * @I3C_BUS_MODE_MIXED_LIMITED: I2C devices without 50ns spike filter are + * present on the bus. However they allow + * compliance up to the maximum SDR SCL clock + * frequency. * @I3C_BUS_MODE_MIXED_SLOW: I2C devices without 50ns spike filter are present * on the bus */ enum i3c_bus_mode { I3C_BUS_MODE_PURE, I3C_BUS_MODE_MIXED_FAST, + I3C_BUS_MODE_MIXED_LIMITED, I3C_BUS_MODE_MIXED_SLOW, }; @@ -390,8 +395,6 @@ struct i3c_bus { * and i2c_put_dma_safe_msg_buf() helpers provided by the I2C * framework. * This method is mandatory. - * @i2c_funcs: expose the supported I2C functionalities. - * This method is mandatory. * @request_ibi: attach an IBI handler to an I3C device. This implies defining * an IBI handler and the constraints of the IBI (maximum payload * length and number of pre-allocated slots). @@ -437,7 +440,6 @@ struct i3c_master_controller_ops { void (*detach_i2c_dev)(struct i2c_dev_desc *dev); int (*i2c_xfers)(struct i2c_dev_desc *dev, const struct i2c_msg *xfers, int nxfers); - u32 (*i2c_funcs)(struct i3c_master_controller *master); int (*request_ibi)(struct i3c_dev_desc *dev, const struct i3c_ibi_setup *req); void (*free_ibi)(struct i3c_dev_desc *dev); |