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author | Emil Velikov <emil.velikov@collabora.com> | 2019-06-14 20:33:35 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-07-16 21:08:30 +0300 |
commit | cf034477321e8c88d667514923763b93a0892f49 (patch) | |
tree | 5cf8b31b34eb4ac437bed2b243d7ee1607062795 /include/uapi | |
parent | 54728170e00cecfac0394c6ee7ea4043778a512b (diff) | |
download | linux-cf034477321e8c88d667514923763b93a0892f49.tar.xz |
drm/amdgpu: extend AMDGPU_CTX_PRIORITY_NORMAL comment
Currently the AMDGPU_CTX_PRIORITY_* defines are used in both
drm_amdgpu_ctx_in::priority and drm_amdgpu_sched_in::priority.
Extend the comment to mention the CAP_SYS_NICE or DRM_MASTER requirement
is only applicable with the former.
Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/uapi')
-rw-r--r-- | include/uapi/drm/amdgpu_drm.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index d799858b9e53..11cc57322962 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -219,7 +219,10 @@ union drm_amdgpu_bo_list { #define AMDGPU_CTX_PRIORITY_VERY_LOW -1023 #define AMDGPU_CTX_PRIORITY_LOW -512 #define AMDGPU_CTX_PRIORITY_NORMAL 0 -/* Selecting a priority above NORMAL requires CAP_SYS_NICE or DRM_MASTER */ +/* + * When used in struct drm_amdgpu_ctx_in, a priority above NORMAL requires + * CAP_SYS_NICE or DRM_MASTER +*/ #define AMDGPU_CTX_PRIORITY_HIGH 512 #define AMDGPU_CTX_PRIORITY_VERY_HIGH 1023 @@ -229,6 +232,7 @@ struct drm_amdgpu_ctx_in { /** For future use, no flags defined so far */ __u32 flags; __u32 ctx_id; + /** AMDGPU_CTX_PRIORITY_* */ __s32 priority; }; @@ -281,6 +285,7 @@ struct drm_amdgpu_sched_in { /* AMDGPU_SCHED_OP_* */ __u32 op; __u32 fd; + /** AMDGPU_CTX_PRIORITY_* */ __s32 priority; __u32 ctx_id; }; |