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| author | Alexander Graf <agraf@suse.de> | 2012-10-31 16:36:18 +0400 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2012-10-31 16:36:18 +0400 |
| commit | 0588000eac9ba4178cebade437da3b28e8fad48f (patch) | |
| tree | 697e514a0a0193f17a54f372dd18c5cd3927e154 /include/uapi/linux/pci.h | |
| parent | 8b5869ad85f703ffeb25e656eab826f6b85b984c (diff) | |
| parent | 81c52c56e2b43589091ee29038bcf793d3f184ab (diff) | |
| download | linux-0588000eac9ba4178cebade437da3b28e8fad48f.tar.xz | |
Merge commit 'origin/queue' into for-queue
Conflicts:
arch/powerpc/include/asm/Kbuild
arch/powerpc/include/uapi/asm/Kbuild
Diffstat (limited to 'include/uapi/linux/pci.h')
| -rw-r--r-- | include/uapi/linux/pci.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/include/uapi/linux/pci.h b/include/uapi/linux/pci.h new file mode 100644 index 000000000000..3c292bc0d1c1 --- /dev/null +++ b/include/uapi/linux/pci.h @@ -0,0 +1,41 @@ +/* + * pci.h + * + * PCI defines and function prototypes + * Copyright 1994, Drew Eckhardt + * Copyright 1997--1999 Martin Mares <mj@ucw.cz> + * + * For more information, please consult the following manuals (look at + * http://www.pcisig.com/ for how to get them): + * + * PCI BIOS Specification + * PCI Local Bus Specification + * PCI to PCI Bridge Specification + * PCI System Design Guide + */ + +#ifndef _UAPILINUX_PCI_H +#define _UAPILINUX_PCI_H + +#include <linux/pci_regs.h> /* The pci register defines */ + +/* + * The PCI interface treats multi-function devices as independent + * devices. The slot/function address of each device is encoded + * in a single byte as follows: + * + * 7:3 = slot + * 2:0 = function + */ +#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) +#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) +#define PCI_FUNC(devfn) ((devfn) & 0x07) + +/* Ioctls for /proc/bus/pci/X/Y nodes. */ +#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8) +#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */ +#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */ +#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */ +#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */ + +#endif /* _UAPILINUX_PCI_H */ |