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| author | Eric Anholt <eric@anholt.net> | 2018-12-04 01:24:33 +0300 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2018-12-07 21:55:48 +0300 |
| commit | 36e7999dc19a1a6e76258020a49f7f7836018e46 (patch) | |
| tree | 315171e5eb6bd1a4c69273f2b5cea1f602b95a11 /include/uapi/drm/v3d_drm.h | |
| parent | dd847a7069747f1963962aee56a5694fbcc40caf (diff) | |
| download | linux-36e7999dc19a1a6e76258020a49f7f7836018e46.tar.xz | |
drm/v3d: Document cache flushing ABI.
Right now, userspace doesn't do any L2T writes, but we should lay out
our expectations for how it works.
v2: Explicitly mention the VCD cache flushing requirements and that
we'll flush the other caches before each of the CLs.
Signed-off-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20181203222438.25417-1-eric@anholt.net
Reviewed-by: Dave Emett <david.emett@broadcom.com>
Diffstat (limited to 'include/uapi/drm/v3d_drm.h')
| -rw-r--r-- | include/uapi/drm/v3d_drm.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/uapi/drm/v3d_drm.h b/include/uapi/drm/v3d_drm.h index 35c7d813c66e..ea70669d2138 100644 --- a/include/uapi/drm/v3d_drm.h +++ b/include/uapi/drm/v3d_drm.h @@ -52,6 +52,14 @@ extern "C" { * * This asks the kernel to have the GPU execute an optional binner * command list, and a render command list. + * + * The L1T, slice, L2C, L2T, and GCA caches will be flushed before + * each CL executes. The VCD cache should be flushed (if necessary) + * by the submitted CLs. The TLB writes are guaranteed to have been + * flushed by the time the render done IRQ happens, which is the + * trigger for out_sync. Any dirtying of cachelines by the job (only + * possible using TMU writes) must be flushed by the caller using the + * CL's cache flush commands. */ struct drm_v3d_submit_cl { /* Pointer to the binner command list. |