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authorConor Dooley <conor.dooley@microchip.com>2022-02-17 13:13:50 +0300
committerNicolas Ferre <nicolas.ferre@microchip.com>2022-02-25 14:50:59 +0300
commitd0054a470c33902f5ae88835ed8a8ecc3cf8faa4 (patch)
tree910fd52c07c58d0cf3f02763ecdf8ff7b6d704c9 /include/soc
parentf8e0f301c46112a15d0b9ab792602875f00010ef (diff)
downloadlinux-d0054a470c33902f5ae88835ed8a8ecc3cf8faa4.tar.xz
soc: add microchip polarfire soc system controller
This driver provides an interface for other drivers to access the functions of the system controller on the Microchip PolarFire SoC. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220217101349.2374873-2-conor.dooley@microchip.com
Diffstat (limited to 'include/soc')
-rw-r--r--include/soc/microchip/mpfs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/soc/microchip/mpfs.h b/include/soc/microchip/mpfs.h
index 2b64c95f3be5..6466515262bd 100644
--- a/include/soc/microchip/mpfs.h
+++ b/include/soc/microchip/mpfs.h
@@ -34,9 +34,9 @@ struct mpfs_mss_response {
#if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL)
-int mpfs_blocking_transaction(struct mpfs_sys_controller *mpfs_client, void *msg);
+int mpfs_blocking_transaction(struct mpfs_sys_controller *mpfs_client, struct mpfs_mss_msg *msg);
-struct mpfs_sys_controller *mpfs_sys_controller_get(struct device_node *mailbox_node);
+struct mpfs_sys_controller *mpfs_sys_controller_get(struct device *dev);
#endif /* if IS_ENABLED(CONFIG_POLARFIRE_SOC_SYS_CTRL) */