diff options
| author | Vladimir Oltean <vladimir.oltean@nxp.com> | 2020-09-30 01:27:25 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-09-30 04:26:12 +0300 |
| commit | e3aea296d86f0f2166f4ddc5e1325217f847e722 (patch) | |
| tree | dfb3add363ee5f00e50373cc0fa29dc655873e9f /include/soc | |
| parent | a61e365d7c183c556717bbf36dcf00c941ec044e (diff) | |
| download | linux-e3aea296d86f0f2166f4ddc5e1325217f847e722.tar.xz | |
net: mscc: ocelot: add definitions for VCAP ES0 keys, actions and target
As a preparation step for the offloading to ES0, let's create the
infrastructure for talking with this hardware block.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/soc')
| -rw-r--r-- | include/soc/mscc/ocelot.h | 1 | ||||
| -rw-r--r-- | include/soc/mscc/ocelot_vcap.h | 44 |
2 files changed, 44 insertions, 1 deletions
diff --git a/include/soc/mscc/ocelot.h b/include/soc/mscc/ocelot.h index d0073c94e22a..b0a9efce8813 100644 --- a/include/soc/mscc/ocelot.h +++ b/include/soc/mscc/ocelot.h @@ -123,6 +123,7 @@ enum ocelot_target { QSYS, REW, SYS, + S0, S1, S2, HSIO, diff --git a/include/soc/mscc/ocelot_vcap.h b/include/soc/mscc/ocelot_vcap.h index 7ac184047292..707e609ec919 100644 --- a/include/soc/mscc/ocelot_vcap.h +++ b/include/soc/mscc/ocelot_vcap.h @@ -14,9 +14,9 @@ */ enum { + VCAP_ES0, VCAP_IS1, VCAP_IS2, - /* VCAP_ES0, */ }; struct vcap_props { @@ -355,4 +355,46 @@ enum vcap_is1_action_field { VCAP_IS1_ACT_HIT_STICKY, }; +/* ================================================================= + * VCAP ES0 + * ================================================================= + */ + +enum { + ES0_ACTION_TYPE_NORMAL, + ES0_ACTION_TYPE_MAX, +}; + +enum vcap_es0_key_field { + VCAP_ES0_EGR_PORT, + VCAP_ES0_IGR_PORT, + VCAP_ES0_RSV, + VCAP_ES0_L2_MC, + VCAP_ES0_L2_BC, + VCAP_ES0_VID, + VCAP_ES0_DP, + VCAP_ES0_PCP, +}; + +enum vcap_es0_action_field { + VCAP_ES0_ACT_PUSH_OUTER_TAG, + VCAP_ES0_ACT_PUSH_INNER_TAG, + VCAP_ES0_ACT_TAG_A_TPID_SEL, + VCAP_ES0_ACT_TAG_A_VID_SEL, + VCAP_ES0_ACT_TAG_A_PCP_SEL, + VCAP_ES0_ACT_TAG_A_DEI_SEL, + VCAP_ES0_ACT_TAG_B_TPID_SEL, + VCAP_ES0_ACT_TAG_B_VID_SEL, + VCAP_ES0_ACT_TAG_B_PCP_SEL, + VCAP_ES0_ACT_TAG_B_DEI_SEL, + VCAP_ES0_ACT_VID_A_VAL, + VCAP_ES0_ACT_PCP_A_VAL, + VCAP_ES0_ACT_DEI_A_VAL, + VCAP_ES0_ACT_VID_B_VAL, + VCAP_ES0_ACT_PCP_B_VAL, + VCAP_ES0_ACT_DEI_B_VAL, + VCAP_ES0_ACT_RSV, + VCAP_ES0_ACT_HIT_STICKY, +}; + #endif /* _OCELOT_VCAP_H_ */ |