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authorVladimir Oltean <vladimir.oltean@nxp.com>2021-01-29 04:00:08 +0300
committerJakub Kicinski <kuba@kernel.org>2021-01-30 08:25:27 +0300
commit7c83a7c539abe9f980996063ac20532a7a7f6eb1 (patch)
tree70332869950333e9f5e4f5030bd05954b41410d8 /include/soc/mscc
parentadb3dccf090bc53ce177cd30bbe5b985336a6f66 (diff)
downloadlinux-7c83a7c539abe9f980996063ac20532a7a7f6eb1.tar.xz
net: dsa: add a second tagger for Ocelot switches based on tag_8021q
There are use cases for which the existing tagger, based on the NPI (Node Processor Interface) functionality, is insufficient. Namely: - Frames injected through the NPI port bypass the frame analyzer, so no source address learning is performed, no TSN stream classification, etc. - Flow control is not functional over an NPI port (PAUSE frames are encapsulated in the same Extraction Frame Header as all other frames) - There can be at most one NPI port configured for an Ocelot switch. But in NXP LS1028A and T1040 there are two Ethernet CPU ports. The non-NPI port is currently either disabled, or operated as a plain user port (albeit an internally-facing one). Having the ability to configure the two CPU ports symmetrically could pave the way for e.g. creating a LAG between them, to increase bandwidth seamlessly for the system. So there is a desire to have an alternative to the NPI mode. This change keeps the default tagger for the Seville and Felix switches as "ocelot", but it can be changed via the following device attribute: echo ocelot-8021q > /sys/class/<dsa-master>/dsa/tagging Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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