diff options
author | Stephen Boyd <sboyd@kernel.org> | 2023-08-31 00:39:58 +0300 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2023-08-31 00:39:58 +0300 |
commit | 41680df0975e04b959a28bf6ab85fd6a307ae0ea (patch) | |
tree | 36baf601d2281987d5dcaa8d04ccf3e11f548247 /include/linux | |
parent | 3462100cf38b192e7ef1b3a11c4f6d64c5e8066d (diff) | |
parent | 75d1d3a433f0a0748a89eb074830e9b635a19fd2 (diff) | |
download | linux-41680df0975e04b959a28bf6ab85fd6a307ae0ea.tar.xz |
Merge branch 'clk-qcom' into clk-next
* clk-qcom: (87 commits)
clk: qcom: Fix SM_GPUCC_8450 dependencies
clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC
clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags
clk: qcom: gcc-ipq5018: change some variable static
clk: qcom: gcc-ipq4019: add missing networking resets
dt-bindings: clock: qcom: ipq4019: add missing networking resets
clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC
dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
clk: qcom: gcc-qdu1000: Update the RCGs ops
clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops
clk: qcom: gcc-qdu1000: Add support for GDSCs
clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support
clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock
clk: qcom: gcc-qdu1000: Fix clkref clocks handling
clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling
dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs
clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock
clk: qcom: ipq5332: drop the mem noc clocks
clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks
...
Diffstat (limited to 'include/linux')
-rw-r--r-- | include/linux/soc/qcom/smd-rpm.h | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/include/linux/soc/qcom/smd-rpm.h b/include/linux/soc/qcom/smd-rpm.h index 2990f425fdef..8190878645f9 100644 --- a/include/linux/soc/qcom/smd-rpm.h +++ b/include/linux/soc/qcom/smd-rpm.h @@ -2,10 +2,13 @@ #ifndef __QCOM_SMD_RPM_H__ #define __QCOM_SMD_RPM_H__ +#include <linux/types.h> + struct qcom_smd_rpm; -#define QCOM_SMD_RPM_ACTIVE_STATE 0 -#define QCOM_SMD_RPM_SLEEP_STATE 1 +#define QCOM_SMD_RPM_ACTIVE_STATE 0 +#define QCOM_SMD_RPM_SLEEP_STATE 1 +#define QCOM_SMD_RPM_STATE_NUM 2 /* * Constants used for addressing resources in the RPM. @@ -44,6 +47,19 @@ struct qcom_smd_rpm; #define QCOM_SMD_RPM_PKA_CLK 0x616b70 #define QCOM_SMD_RPM_MCFG_CLK 0x6766636d +#define QCOM_RPM_KEY_SOFTWARE_ENABLE 0x6e657773 +#define QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY 0x62636370 +#define QCOM_RPM_SMD_KEY_RATE 0x007a484b +#define QCOM_RPM_SMD_KEY_ENABLE 0x62616e45 +#define QCOM_RPM_SMD_KEY_STATE 0x54415453 +#define QCOM_RPM_SCALING_ENABLE_ID 0x2 + +struct clk_smd_rpm_req { + __le32 key; + __le32 nbytes; + __le32 value; +}; + int qcom_rpm_smd_write(struct qcom_smd_rpm *rpm, int state, u32 resource_type, u32 resource_id, |