diff options
author | Joao Pinto <Joao.Pinto@synopsys.com> | 2017-03-10 21:24:51 +0300 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2017-03-13 09:41:02 +0300 |
commit | d976a525c371276cebd2517349d1d3568a0e48b5 (patch) | |
tree | 6cf6fd474cdc498716863ad728d74b01faaccc96 /include/linux/stmmac.h | |
parent | 429a372e3ec020534bd314dca94e5281dc453d29 (diff) | |
download | linux-d976a525c371276cebd2517349d1d3568a0e48b5.tar.xz |
net: stmmac: multiple queues dt configuration
This patch adds the multiple queues configuration in the Device Tree.
It was also created a set of structures to keep the RX and TX queues
configurations to be used in the driver.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/stmmac.h')
-rw-r--r-- | include/linux/stmmac.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index fc273e9d5f67..266ff2af91e5 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -28,6 +28,9 @@ #include <linux/platform_device.h> +#define MTL_MAX_RX_QUEUES 8 +#define MTL_MAX_TX_QUEUES 8 + #define STMMAC_RX_COE_NONE 0 #define STMMAC_RX_COE_TYPE1 1 #define STMMAC_RX_COE_TYPE2 2 @@ -44,6 +47,18 @@ #define STMMAC_CSR_150_250M 0x4 /* MDC = clk_scr_i/102 */ #define STMMAC_CSR_250_300M 0x5 /* MDC = clk_scr_i/122 */ +/* MTL algorithms identifiers */ +#define MTL_TX_ALGORITHM_WRR 0x0 +#define MTL_TX_ALGORITHM_WFQ 0x1 +#define MTL_TX_ALGORITHM_DWRR 0x2 +#define MTL_TX_ALGORITHM_SP 0x3 +#define MTL_RX_ALGORITHM_SP 0x4 +#define MTL_RX_ALGORITHM_WSP 0x5 + +/* RX Queue Mode */ +#define MTL_RX_DCB 0x0 +#define MTL_RX_AVB 0x1 + /* The MDC clock could be set higher than the IEEE 802.3 * specified frequency limit 0f 2.5 MHz, by programming a clock divider * of value different than the above defined values. The resultant MDIO @@ -109,6 +124,15 @@ struct stmmac_axi { bool axi_rb; }; +struct stmmac_rxq_cfg { + u8 mode_to_use; + u8 chan; +}; + +struct stmmac_txq_cfg { + u8 weight; +}; + struct plat_stmmacenet_data { int bus_id; int phy_addr; @@ -133,6 +157,12 @@ struct plat_stmmacenet_data { int unicast_filter_entries; int tx_fifo_size; int rx_fifo_size; + u8 rx_queues_to_use; + u8 tx_queues_to_use; + u8 rx_sched_algorithm; + u8 tx_sched_algorithm; + struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES]; + struct stmmac_txq_cfg tx_queues_cfg[MTL_MAX_TX_QUEUES]; void (*fix_mac_speed)(void *priv, unsigned int speed); int (*init)(struct platform_device *pdev, void *priv); void (*exit)(struct platform_device *pdev, void *priv); |