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| author | Mauro Lima <mauro.lima@eclypsium.com> | 2022-10-12 18:21:35 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2022-10-13 15:01:37 +0300 |
| commit | 6a43cd02ddbc597dc9a1f82c1e433f871a2f6f06 (patch) | |
| tree | aefb6073741de020f21d9d039982cc7442659276 /include/linux/spi | |
| parent | 5302e1ff315b40dfc9bb3f08911f5a788cc1de01 (diff) | |
| download | linux-6a43cd02ddbc597dc9a1f82c1e433f871a2f6f06.tar.xz | |
spi: intel: Fix the offset to get the 64K erase opcode
According to documentation, the 64K erase opcode is located in VSCC
range [16:23] instead of [8:15].
Use the proper value to shift the mask over the correct range.
Signed-off-by: Mauro Lima <mauro.lima@eclypsium.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20221012152135.28353-1-mauro.lima@eclypsium.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include/linux/spi')
0 files changed, 0 insertions, 0 deletions