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| author | Kan Liang <kan.liang@linux.intel.com> | 2020-10-19 19:45:29 +0300 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2020-10-29 13:00:41 +0300 |
| commit | 306e3e91edf1c6739a55312edd110d298ff498dd (patch) | |
| tree | b0b93898337d85d00c3b862b0c7c232b84610c04 /include/linux/perf_event.h | |
| parent | 43bc103a8044b9f7963aa1684efbdc9bd60939de (diff) | |
| download | linux-306e3e91edf1c6739a55312edd110d298ff498dd.tar.xz | |
perf/x86/intel: Add event constraint for CYCLE_ACTIVITY.STALLS_MEM_ANY
The event CYCLE_ACTIVITY.STALLS_MEM_ANY (0x14a3) should be available on
all 8 GP counters on ICL, but it's only scheduled on the first four
counters due to the current ICL constraint table.
Add a line for the CYCLE_ACTIVITY.STALLS_MEM_ANY event in the ICL
constraint table.
Correct the comments for the CYCLE_ACTIVITY.CYCLES_MEM_ANY event.
Fixes: 6017608936c1 ("perf/x86/intel: Add Icelake support")
Reported-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20201019164529.32154-1-kan.liang@linux.intel.com
Diffstat (limited to 'include/linux/perf_event.h')
0 files changed, 0 insertions, 0 deletions